notaz.gp2x.de / pcsx_rearmed.git / blame
? search:
summary | shortlog | log | commit | commitdiff | tree
blob | blame (incremental) | history | HEAD
cdrom: change pause timing again
[pcsx_rearmed.git] / plugins / dfsound / externals.h
CommitLineData
ef79bbde
P		 1/***************************************************************************\r
2 externals.h - description\r
3 -------------------\r
4 begin : Wed May 15 2002\r
5 copyright : (C) 2002 by Pete Bernert\r
6 email : BlackDove@addcom.de\r
7 ***************************************************************************/\r
8/***************************************************************************\r
9 * *\r
10 * This program is free software; you can redistribute it and/or modify *\r
11 * it under the terms of the GNU General Public License as published by *\r
12 * the Free Software Foundation; either version 2 of the License, or *\r
13 * (at your option) any later version. See also the license.txt file for *\r
14 * additional informations. *\r
15 * *\r
16 ***************************************************************************/\r
17\r
7a8d521f 18#ifndef __P_SOUND_EXTERNALS_H__\r
19#define __P_SOUND_EXTERNALS_H__\r
20\r
ef79bbde
P		 21#include <stdint.h>\r
22\r
23/////////////////////////////////////////////////////////\r
24// generic defines\r
25/////////////////////////////////////////////////////////\r
26\r
6c9db47c 27//#define log_unhandled printf\r
28#define log_unhandled(...)\r
29\r
f05d6ca2 30#ifdef __GNUC__\r
b72f17a1 31#define noinline __attribute__((noinline))\r
32#define unlikely(x) __builtin_expect((x), 0)\r
33#else\r
34#define noinline\r
35#define unlikely(x) x\r
36#endif\r
05c7cec7 37#if defined(__GNUC__) && !defined(_TMS320C6X)\r
38#define preload __builtin_prefetch\r
39#else\r
40#define preload(...)\r
41#endif\r
b72f17a1 42\r
ef79bbde
P		 43#define PSE_LT_SPU 4\r
44#define PSE_SPU_ERR_SUCCESS 0\r
45#define PSE_SPU_ERR -60\r
46#define PSE_SPU_ERR_NOTCONFIGURED PSE_SPU_ERR - 1\r
47#define PSE_SPU_ERR_INIT PSE_SPU_ERR - 2\r
48#ifndef max\r
49#define max(a,b) (((a) > (b)) ? (a) : (b))\r
50#define min(a,b) (((a) < (b)) ? (a) : (b))\r
51#endif\r
52\r
53////////////////////////////////////////////////////////////////////////\r
54// spu defines\r
55////////////////////////////////////////////////////////////////////////\r
56\r
ef79bbde
P		 57// num of channels\r
58#define MAXCHAN 24\r
59\r
1775933a 60// note: must be even due to the way reverb works now\r
4c8f1c25 61#define NSSIZE ((44100 / 50 + 32) & ~1)\r
ef79bbde
P		 62\r
63///////////////////////////////////////////////////////////\r
64// struct defines\r
65///////////////////////////////////////////////////////////\r
66\r
9ad8abfa 67enum ADSR_State {\r
68 ADSR_ATTACK = 0,\r
69 ADSR_DECAY = 1,\r
70 ADSR_SUSTAIN = 2,\r
71 ADSR_RELEASE = 3,\r
72};\r
73\r
ef79bbde 74// ADSR INFOS PER CHANNEL\r
ef79bbde
P		 75typedef struct\r
76{\r
9ad8abfa 77 unsigned char State:2; // ADSR_State\r
6d866bb7 78 unsigned char AttackModeExp:1;\r
79 unsigned char SustainModeExp:1;\r
80 unsigned char SustainIncrease:1;\r
81 unsigned char ReleaseModeExp:1;\r
82 unsigned char AttackRate;\r
83 unsigned char DecayRate;\r
84 unsigned char SustainLevel;\r
85 unsigned char SustainRate;\r
86 unsigned char ReleaseRate;\r
ef79bbde 87 int EnvelopeVol;\r
ef79bbde
P		 88} ADSRInfoEx;\r
89 \r
90///////////////////////////////////////////////////////////\r
91\r
ef79bbde
P		 92// MAIN CHANNEL STRUCT\r
93typedef struct\r
94{\r
ef79bbde
P		 95 int iSBPos; // mixing stuff\r
96 int spos;\r
97 int sinc;\r
650adfd2 98 int sinc_inv;\r
ef79bbde 99\r
ef79bbde
P		 100 unsigned char * pCurr; // current pos in sound mem\r
101 unsigned char * pLoop; // loop ptr in sound mem\r
102\r
6d866bb7 103 unsigned int bReverb:1; // can we do reverb on this channel? must have ctrl register bit, to get active\r
6d866bb7 104 unsigned int bRVBActive:1; // reverb active flag\r
105 unsigned int bNoise:1; // noise active flag\r
106 unsigned int bFMod:2; // freq mod (0=off, 1=sound channel, 2=freq channel)\r
e4f075af 107 unsigned int prevflags:3; // flags from previous block\r
16f3ca66 108 unsigned int bIgnoreLoop:1; // Ignore loop\r
d358733b 109 unsigned int bStarting:1; // starting after keyon\r
4b22d950 110 union {\r
111 struct {\r
112 int iLeftVolume; // left volume\r
113 int iRightVolume; // right volume\r
114 };\r
115 int iVolume[2];\r
116 };\r
6d866bb7 117 ADSRInfoEx ADSRX;\r
118 int iRawPitch; // raw pitch (0...3fff)\r
ef79bbde
P		 119} SPUCHAN;\r
120\r
121///////////////////////////////////////////////////////////\r
122\r
123typedef struct\r
124{\r
125 int StartAddr; // reverb area start addr in samples\r
126 int CurrAddr; // reverb area curr addr in samples\r
127\r
128 int VolLeft;\r
129 int VolRight;\r
ef79bbde
P		 130\r
131 int FB_SRC_A; // (offset)\r
132 int FB_SRC_B; // (offset)\r
133 int IIR_ALPHA; // (coef.)\r
134 int ACC_COEF_A; // (coef.)\r
135 int ACC_COEF_B; // (coef.)\r
136 int ACC_COEF_C; // (coef.)\r
137 int ACC_COEF_D; // (coef.)\r
138 int IIR_COEF; // (coef.)\r
139 int FB_ALPHA; // (coef.)\r
140 int FB_X; // (coef.)\r
141 int IIR_DEST_A0; // (offset)\r
142 int IIR_DEST_A1; // (offset)\r
143 int ACC_SRC_A0; // (offset)\r
144 int ACC_SRC_A1; // (offset)\r
145 int ACC_SRC_B0; // (offset)\r
146 int ACC_SRC_B1; // (offset)\r
147 int IIR_SRC_A0; // (offset)\r
148 int IIR_SRC_A1; // (offset)\r
149 int IIR_DEST_B0; // (offset)\r
150 int IIR_DEST_B1; // (offset)\r
151 int ACC_SRC_C0; // (offset)\r
152 int ACC_SRC_C1; // (offset)\r
153 int ACC_SRC_D0; // (offset)\r
154 int ACC_SRC_D1; // (offset)\r
155 int IIR_SRC_B1; // (offset)\r
156 int IIR_SRC_B0; // (offset)\r
157 int MIX_DEST_A0; // (offset)\r
158 int MIX_DEST_A1; // (offset)\r
159 int MIX_DEST_B0; // (offset)\r
160 int MIX_DEST_B1; // (offset)\r
161 int IN_COEF_L; // (coef.)\r
162 int IN_COEF_R; // (coef.)\r
1775933a 163\r
164 int dirty; // registers changed\r
165\r
1775933a 166 // MIX_DEST_xx - FB_SRC_x\r
7b2c4897 167 int FB_SRC_A0, FB_SRC_A1, FB_SRC_B0, FB_SRC_B1;\r
ef79bbde
P		 168} REVERBInfo;\r
169\r
ef79bbde
P		 170///////////////////////////////////////////////////////////\r
171\r
ef79bbde
P		 172// psx buffers / addresses\r
173\r
38e4048f 174typedef union\r
175{\r
176 int SB[28 + 4 + 4];\r
177 struct {\r
178 int sample[28];\r
179 union {\r
180 struct {\r
181 int pos;\r
d0af6d75 182 int val[4];\r
38e4048f 183 } gauss;\r
184 int simple[5]; // 28-32\r
185 } interp;\r
186 int sinc_old;\r
187 };\r
188} sample_buf;\r
de4a0279 189\r
3154bfab 190typedef struct\r
191{\r
192 unsigned short spuCtrl;\r
193 unsigned short spuStat;\r
ef79bbde 194\r
3154bfab 195 unsigned int spuAddr;\r
77d6fd63 196\r
3154bfab 197 unsigned int cycles_played;\r
3c7a8977 198 unsigned int cycles_dma_end;\r
3154bfab 199 int decode_pos;\r
200 int decode_dirty_ch;\r
201 unsigned int bSpuInit:1;\r
202 unsigned int bSPUIsOpen:1;\r
0c1151fe 203 unsigned int bMemDirty:1; // had external write to SPU RAM\r
ef79bbde 204\r
3154bfab 205 unsigned int dwNoiseVal; // global noise generator\r
206 unsigned int dwNoiseCount;\r
207 unsigned int dwNewChannel; // flags for faster testing, if new channel starts\r
5aa94fa0 208 unsigned int dwChannelsAudible; // not silent channels\r
3154bfab 209 unsigned int dwChannelDead; // silent+not useful channels\r
ef79bbde 210\r
7285d7ad 211 unsigned int XARepeat;\r
212 unsigned int XALastVal;\r
213\r
214 int iLeftXAVol;\r
215 int iRightXAVol;\r
216\r
67c020ee 217 int cdClearSamples; // extra samples to clear the capture buffers\r
38b8a211 218 struct { // channel volume in the cd controller\r
219 unsigned char ll, lr, rl, rr; // see cdr.Attenuator* in cdrom.c\r
220 } cdv; // applied on spu side for easier emulation\r
221\r
561aa7a9 222 unsigned int last_keyon_cycles;\r
223\r
7285d7ad 224 union {\r
225 unsigned char *spuMemC;\r
226 unsigned short *spuMem;\r
227 };\r
228 unsigned char * pSpuIrq;\r
229\r
3154bfab 230 unsigned char * pSpuBuffer;\r
231 short * pS;\r
ef79bbde 232\r
7285d7ad 233 SPUCHAN * s_chan;\r
234 REVERBInfo * rvb;\r
235\r
236 int * SSumLR;\r
237\r
c2eee46b 238 void (CALLBACK *irqCallback)(int);\r
7285d7ad 239 //void (CALLBACK *cddavCallback)(short, short);\r
3154bfab 240 void (CALLBACK *scheduleCallback)(unsigned int);\r
ef79bbde 241\r
b34d6a80 242 const xa_decode_t * xapGlobal;\r
3154bfab 243 unsigned int * XAFeed;\r
244 unsigned int * XAPlay;\r
245 unsigned int * XAStart;\r
246 unsigned int * XAEnd;\r
ef79bbde 247\r
3154bfab 248 unsigned int * CDDAFeed;\r
249 unsigned int * CDDAPlay;\r
250 unsigned int * CDDAStart;\r
251 unsigned int * CDDAEnd;\r
ef79bbde 252\r
3154bfab 253 unsigned short regArea[0x400];\r
38e4048f 254\r
255 sample_buf sb[MAXCHAN];\r
256 int interpolation;\r
42dde520 257\r
258#if P_HAVE_PTHREAD || defined(WANT_THREAD_CODE)\r
259 sample_buf * sb_thread;\r
260 sample_buf sb_thread_[MAXCHAN];\r
261#endif\r
3154bfab 262} SPUInfo;\r
ef79bbde 263\r
5fdcf5cd 264#define regAreaGet(offset) \\r
42dde520 265 spu.regArea[((offset) - 0xc00) >> 1]\r
5fdcf5cd 266#define regAreaGetCh(ch, offset) \\r
42dde520 267 spu.regArea[(((ch) << 4) | (offset)) >> 1]\r
16f3ca66 268\r
ef79bbde 269///////////////////////////////////////////////////////////\r
3154bfab 270// SPU.C globals\r
ef79bbde
P		 271///////////////////////////////////////////////////////////\r
272\r
3154bfab 273#ifndef _IN_SPU\r
ef79bbde 274\r
3154bfab 275extern SPUInfo spu;\r
ef79bbde 276\r
8fb79cd1 277void do_samples(unsigned int cycles_to, int force_no_thread);\r
3154bfab 278void schedule_next_irq(void);\r
a5ff8be2 279void check_irq_io(unsigned int addr);\r
25f460ec 280void do_irq_io(int cycles_after);\r
ef79bbde 281\r
8fb79cd1 282#define do_samples_if_needed(c, no_thread, samples) \\r
3154bfab 283 do { \\r
8fb79cd1 284 if ((no_thread) || (int)((c) - spu.cycles_played) >= (samples) * 768) \\r
285 do_samples(c, no_thread); \\r
3154bfab 286 } while (0)\r
ef79bbde
P		 287\r
288#endif\r
289\r
38b8a211 290void FeedXA(const xa_decode_t *xap);\r
291void FeedCDDA(unsigned char *pcm, int nBytes);\r
292\r
7a8d521f 293#endif /* __P_SOUND_EXTERNALS_H__ */\r
ARM optimized PCSX fork