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gpus: return DMA word count to avoid 1 list walk
[pcsx_rearmed.git] / plugins / gpu_unai / gpu.cpp
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1/***************************************************************************
2* Copyright (C) 2010 PCSX4ALL Team *
3* Copyright (C) 2010 Unai *
4* *
5* This program is free software; you can redistribute it and/or modify *
6* it under the terms of the GNU General Public License as published by *
7* the Free Software Foundation; either version 2 of the License, or *
8* (at your option) any later version. *
9* *
10* This program is distributed in the hope that it will be useful, *
11* but WITHOUT ANY WARRANTY; without even the implied warranty of *
12* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the *
13* GNU General Public License for more details. *
14* *
15* You should have received a copy of the GNU General Public License *
16* along with this program; if not, write to the *
17* Free Software Foundation, Inc., *
18* 51 Franklin Street, Fifth Floor, Boston, MA 02111-1307 USA. *
19***************************************************************************/
20
21#include "port.h"
22#include "gpu.h"
23#include "profiler.h"
24#include "debug.h"
25
26int skipCount = 2; /* frame skip (0,1,2,3...) */
27int skCount=0; /* internal frame skip */
28int linesInterlace = 0; /* internal lines interlace */
29int linesInterlace_user = 0; /* Lines interlace */
30
31bool isSkip=false; /* skip frame (info coming from GPU) */
32bool skipFrame=false; /* skip frame (according to frame skip) */
33bool alt_fps = false; /* Alternative FPS algorithm */
34bool show_fps = false; /* Show FPS statistics */
35
36bool isPAL=false; /* PAL video timing */
37bool progressInterlace_flag = false; /* Progressive interlace flag */
38bool progressInterlace = false; /* Progressive interlace option*/
39bool frameLimit = false; /* frames to wait */
40bool light = true; /* lighting */
41bool blend = true; /* blending */
42
43bool fb_dirty = false;
44
45bool enableAbbeyHack = false; /* Abe's Odyssey hack */
46u8 BLEND_MODE;
47u8 TEXT_MODE;
48u8 Masking;
49
50u16 PixelMSB;
51u16 PixelData;
52
53///////////////////////////////////////////////////////////////////////////////
54// GPU Global data
55///////////////////////////////////////////////////////////////////////////////
56
57///////////////////////////////////////////////////////////////////////////////
58// Dma Transfers info
59s32 px,py;
60s32 x_end,y_end;
61u16* pvram;
62
63u32 FrameToRead;
64u32 FrameToWrite;
65
66u32 GP0;
67s32 PacketCount;
68s32 PacketIndex;
69
70///////////////////////////////////////////////////////////////////////////////
71// Display status
72u32 DisplayArea [6];
73
74///////////////////////////////////////////////////////////////////////////////
75// Rasterizer status
76u32 TextureWindow [4];
77u32 DrawingArea [4];
78u32 DrawingOffset [2];
79
80///////////////////////////////////////////////////////////////////////////////
81// Rasterizer status
82
83u16* TBA;
84u16* CBA;
85
86///////////////////////////////////////////////////////////////////////////////
87// Inner Loops
88s32 u4, du4;
89s32 v4, dv4;
90s32 r4, dr4;
91s32 g4, dg4;
92s32 b4, db4;
93u32 lInc;
94u32 tInc, tMsk;
95
96GPUPacket PacketBuffer;
97// FRAME_BUFFER_SIZE is defined in bytes; 512K is guard memory for out of range reads
98u16 GPU_FrameBuffer[(FRAME_BUFFER_SIZE+512*1024)/2] __attribute__((aligned(16)));
99u32 GPU_GP1;
100
101///////////////////////////////////////////////////////////////////////////////
102// Inner loop driver instanciation file
103#include "gpu_inner.h"
104
105///////////////////////////////////////////////////////////////////////////////
106// GPU Raster Macros
107#define GPU_RGB16(rgb) ((((rgb)&0xF80000)>>9)|(((rgb)&0xF800)>>6)|(((rgb)&0xF8)>>3))
108
109#define GPU_EXPANDSIGN_POLY(x) (((s32)(x)<<20)>>20)
110//#define GPU_EXPANDSIGN_POLY(x) (((s32)(x)<<21)>>21)
111#define GPU_EXPANDSIGN_SPRT(x) (((s32)(x)<<21)>>21)
112
113//#define GPU_TESTRANGE(x) { if((u32)(x+1024) > 2047) return; }
114#define GPU_TESTRANGE(x) { if ((x<-1023) || (x>1023)) return; }
115
116#define GPU_SWAP(a,b,t) {(t)=(a);(a)=(b);(b)=(t);}
117
118///////////////////////////////////////////////////////////////////////////////
119// GPU internal image drawing functions
120#include "gpu_raster_image.h"
121
122///////////////////////////////////////////////////////////////////////////////
123// GPU internal line drawing functions
124#include "gpu_raster_line.h"
125
126///////////////////////////////////////////////////////////////////////////////
127// GPU internal polygon drawing functions
128#include "gpu_raster_polygon.h"
129
130///////////////////////////////////////////////////////////////////////////////
131// GPU internal sprite drawing functions
132#include "gpu_raster_sprite.h"
133
134///////////////////////////////////////////////////////////////////////////////
135// GPU command buffer execution/store
136#include "gpu_command.h"
137
138///////////////////////////////////////////////////////////////////////////////
139INLINE void gpuReset(void)
140{
141 GPU_GP1 = 0x14802000;
142 TextureWindow[0] = 0;
143 TextureWindow[1] = 0;
144 TextureWindow[2] = 255;
145 TextureWindow[3] = 255;
146 DrawingArea[2] = 256;
147 DrawingArea[3] = 240;
148 DisplayArea[2] = 256;
149 DisplayArea[3] = 240;
150 DisplayArea[5] = 240;
151}
152
153///////////////////////////////////////////////////////////////////////////////
154bool GPU_init(void)
155{
156 gpuReset();
157
158 // s_invTable
159 for(int i=1;i<=(1<<TABLE_BITS);++i)
160 {
161 double v = 1.0 / double(i);
162 #ifdef GPU_TABLE_10_BITS
163 v *= double(0xffffffff>>1);
164 #else
165 v *= double(0x80000000);
166 #endif
167 s_invTable[i-1]=s32(v);
168 }
169 return (0);
170}
171
172///////////////////////////////////////////////////////////////////////////////
173void GPU_shutdown(void)
174{
175}
176
177///////////////////////////////////////////////////////////////////////////////
178long GPU_freeze(unsigned int bWrite, GPUFreeze_t* p2)
179{
180 if (!p2) return (0);
181 if (p2->Version != 1) return (0);
182
183 if (bWrite)
184 {
185 p2->GPU_gp1 = GPU_GP1;
186 memset(p2->Control, 0, sizeof(p2->Control));
187 // save resolution and registers for P.E.Op.S. compatibility
188 p2->Control[3] = (3 << 24) | ((GPU_GP1 >> 23) & 1);
189 p2->Control[4] = (4 << 24) | ((GPU_GP1 >> 29) & 3);
190 p2->Control[5] = (5 << 24) | (DisplayArea[0] | (DisplayArea[1] << 10));
191 p2->Control[6] = (6 << 24) | (2560 << 12);
192 p2->Control[7] = (7 << 24) | (DisplayArea[4] | (DisplayArea[5] << 10));
193 p2->Control[8] = (8 << 24) | ((GPU_GP1 >> 17) & 0x3f) | ((GPU_GP1 >> 10) & 0x40);
194 memcpy(p2->FrameBuffer, (u16*)GPU_FrameBuffer, FRAME_BUFFER_SIZE);
195 return (1);
196 }
197 else
198 {
199 GPU_GP1 = p2->GPU_gp1;
200 memcpy((u16*)GPU_FrameBuffer, p2->FrameBuffer, FRAME_BUFFER_SIZE);
201 GPU_writeStatus((5 << 24) | p2->Control[5]);
202 GPU_writeStatus((7 << 24) | p2->Control[7]);
203 GPU_writeStatus((8 << 24) | p2->Control[8]);
204 gpuSetTexture(GPU_GP1);
205 return (1);
206 }
207 return (0);
208}
209
210///////////////////////////////////////////////////////////////////////////////
211// GPU DMA comunication
212
213///////////////////////////////////////////////////////////////////////////////
214u8 PacketSize[256] =
215{
216 0, 0, 2, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, // 0-15
217 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, // 16-31
218 3, 3, 3, 3, 6, 6, 6, 6, 4, 4, 4, 4, 8, 8, 8, 8, // 32-47
219 5, 5, 5, 5, 8, 8, 8, 8, 7, 7, 7, 7, 11, 11, 11, 11, // 48-63
220 2, 2, 2, 2, 0, 0, 0, 0, 3, 3, 3, 3, 3, 3, 3, 3, // 64-79
221 3, 3, 3, 3, 0, 0, 0, 0, 4, 4, 4, 4, 4, 4, 4, 4, // 80-95
222 2, 2, 2, 2, 3, 3, 3, 3, 1, 1, 1, 1, 2, 2, 2, 2, // 96-111
223 1, 1, 1, 1, 2, 2, 2, 2, 1, 1, 1, 1, 2, 2, 2, 2, // 112-127
224 3, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, // 128-
225 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, // 144
226 2, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, // 160
227 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, //
228 2, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, //
229 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, //
230 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, //
231 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 //
232};
233
234///////////////////////////////////////////////////////////////////////////////
235INLINE void gpuSendPacket()
236{
237#ifdef DEBUG_ANALYSIS
238 dbg_anacnt_GPU_sendPacket++;
239#endif
240 gpuSendPacketFunction(PacketBuffer.U4[0]>>24);
241}
242
243///////////////////////////////////////////////////////////////////////////////
244INLINE void gpuCheckPacket(u32 uData)
245{
246 if (PacketCount)
247 {
248 PacketBuffer.U4[PacketIndex++] = uData;
249 --PacketCount;
250 }
251 else
252 {
253 PacketBuffer.U4[0] = uData;
254 PacketCount = PacketSize[uData >> 24];
255 PacketIndex = 1;
256 }
257 if (!PacketCount) gpuSendPacket();
258}
259
260///////////////////////////////////////////////////////////////////////////////
261void GPU_writeDataMem(u32* dmaAddress, s32 dmaCount)
262{
263#ifdef DEBUG_ANALYSIS
264 dbg_anacnt_GPU_writeDataMem++;
265#endif
266 pcsx4all_prof_pause(PCSX4ALL_PROF_CPU);
267 pcsx4all_prof_start_with_pause(PCSX4ALL_PROF_GPU,PCSX4ALL_PROF_HW_WRITE);
268 u32 data;
269 const u16 *VIDEO_END=(GPU_FrameBuffer+(FRAME_BUFFER_SIZE/2)-1);
270 GPU_GP1 &= ~0x14000000;
271
272 while (dmaCount)
273 {
274 if (FrameToWrite)
275 {
276 while (dmaCount--)
277 {
278 data = *dmaAddress++;
279 if ((&pvram[px])>(VIDEO_END)) pvram-=512*1024;
280 pvram[px] = data;
281 if (++px>=x_end)
282 {
283 px = 0;
284 pvram += 1024;
285 if (++py>=y_end)
286 {
287 FrameToWrite = 0;
288 GPU_GP1 &= ~0x08000000;
289 break;
290 }
291 }
292 if ((&pvram[px])>(VIDEO_END)) pvram-=512*1024;
293 pvram[px] = data>>16;
294 if (++px>=x_end)
295 {
296 px = 0;
297 pvram += 1024;
298 if (++py>=y_end)
299 {
300 FrameToWrite = 0;
301 GPU_GP1 &= ~0x08000000;
302 break;
303 }
304 }
305 }
306 }
307 else
308 {
309 data = *dmaAddress++;
310 dmaCount--;
311 gpuCheckPacket(data);
312 }
313 }
314
315 GPU_GP1 = (GPU_GP1 | 0x14000000) & ~0x60000000;
316 fb_dirty = true;
317 pcsx4all_prof_end_with_resume(PCSX4ALL_PROF_GPU,PCSX4ALL_PROF_HW_WRITE);
318 pcsx4all_prof_resume(PCSX4ALL_PROF_CPU);
319}
320
321u32 *lUsedAddr[3];
322INLINE int CheckForEndlessLoop(u32 *laddr)
323{
324 if(laddr==lUsedAddr[1]) return 1;
325 if(laddr==lUsedAddr[2]) return 1;
326
327 if(laddr<lUsedAddr[0]) lUsedAddr[1]=laddr;
328 else lUsedAddr[2]=laddr;
329 lUsedAddr[0]=laddr;
330 return 0;
331}
332
333///////////////////////////////////////////////////////////////////////////////
334long GPU_dmaChain(u32* baseAddr, u32 dmaVAddr)
335{
336#ifdef DEBUG_ANALYSIS
337 dbg_anacnt_GPU_dmaChain++;
338#endif
339 pcsx4all_prof_start_with_pause(PCSX4ALL_PROF_GPU,PCSX4ALL_PROF_HW_WRITE);
340 u32 data, *address, count, offset;
341 unsigned int DMACommandCounter = 0;
342 long dma_words = 0;
343
344 GPU_GP1 &= ~0x14000000;
345 lUsedAddr[0]=lUsedAddr[1]=lUsedAddr[2]=(u32*)0x1fffff;
346 dmaVAddr &= 0x001FFFFF;
347 while (dmaVAddr != 0x1FFFFF)
348 {
349 address = (baseAddr + (dmaVAddr >> 2));
350 if(DMACommandCounter++ > 2000000) break;
351 if(CheckForEndlessLoop(address)) break;
352 data = *address++;
353 count = (data >> 24);
354 offset = data & 0x001FFFFF;
355 if (dmaVAddr != offset) dmaVAddr = offset;
356 else dmaVAddr = 0x1FFFFF;
357
358 if(count>0) GPU_writeDataMem(address,count);
359 dma_words += 1 + count;
360 }
361 GPU_GP1 = (GPU_GP1 | 0x14000000) & ~0x60000000;
362 pcsx4all_prof_end_with_resume(PCSX4ALL_PROF_GPU,PCSX4ALL_PROF_HW_WRITE);
363
364 return dma_words;
365}
366
367///////////////////////////////////////////////////////////////////////////////
368void GPU_writeData(u32 data)
369{
370 const u16 *VIDEO_END=(GPU_FrameBuffer+(FRAME_BUFFER_SIZE/2)-1);
371#ifdef DEBUG_ANALYSIS
372 dbg_anacnt_GPU_writeData++;
373#endif
374 pcsx4all_prof_pause(PCSX4ALL_PROF_CPU);
375 pcsx4all_prof_start_with_pause(PCSX4ALL_PROF_GPU,PCSX4ALL_PROF_HW_WRITE);
376 GPU_GP1 &= ~0x14000000;
377
378 if (FrameToWrite)
379 {
380 if ((&pvram[px])>(VIDEO_END)) pvram-=512*1024;
381 pvram[px]=(u16)data;
382 if (++px>=x_end)
383 {
384 px = 0;
385 pvram += 1024;
386 if (++py>=y_end)
387 {
388 FrameToWrite = 0;
389 GPU_GP1 &= ~0x08000000;
390 }
391 }
392 if (FrameToWrite)
393 {
394 if ((&pvram[px])>(VIDEO_END)) pvram-=512*1024;
395 pvram[px]=data>>16;
396 if (++px>=x_end)
397 {
398 px = 0;
399 pvram += 1024;
400 if (++py>=y_end)
401 {
402 FrameToWrite = 0;
403 GPU_GP1 &= ~0x08000000;
404 }
405 }
406 }
407 }
408 else
409 {
410 gpuCheckPacket(data);
411 }
412 GPU_GP1 |= 0x14000000;
413 fb_dirty = true;
414 pcsx4all_prof_end_with_resume(PCSX4ALL_PROF_GPU,PCSX4ALL_PROF_HW_WRITE);
415 pcsx4all_prof_resume(PCSX4ALL_PROF_CPU);
416
417}
418
419
420///////////////////////////////////////////////////////////////////////////////
421void GPU_readDataMem(u32* dmaAddress, s32 dmaCount)
422{
423 const u16 *VIDEO_END=(GPU_FrameBuffer+(FRAME_BUFFER_SIZE/2)-1);
424#ifdef DEBUG_ANALYSIS
425 dbg_anacnt_GPU_readDataMem++;
426#endif
427 if(!FrameToRead) return;
428
429 pcsx4all_prof_start_with_pause(PCSX4ALL_PROF_GPU,PCSX4ALL_PROF_HW_WRITE);
430 GPU_GP1 &= ~0x14000000;
431 do
432 {
433 if ((&pvram[px])>(VIDEO_END)) pvram-=512*1024;
434 // lower 16 bit
435 u32 data = (unsigned long)pvram[px];
436
437 if (++px>=x_end)
438 {
439 px = 0;
440 pvram += 1024;
441 }
442
443 if ((&pvram[px])>(VIDEO_END)) pvram-=512*1024;
444 // higher 16 bit (always, even if it's an odd width)
445 data |= (unsigned long)(pvram[px])<<16;
446
447 *dmaAddress++ = data;
448
449 if (++px>=x_end)
450 {
451 px = 0;
452 pvram += 1024;
453 if (++py>=y_end)
454 {
455 FrameToRead = 0;
456 GPU_GP1 &= ~0x08000000;
457 break;
458 }
459 }
460 } while (--dmaCount);
461
462 GPU_GP1 = (GPU_GP1 | 0x14000000) & ~0x60000000;
463 pcsx4all_prof_end_with_resume(PCSX4ALL_PROF_GPU,PCSX4ALL_PROF_HW_WRITE);
464}
465
466
467
468///////////////////////////////////////////////////////////////////////////////
469u32 GPU_readData(void)
470{
471 const u16 *VIDEO_END=(GPU_FrameBuffer+(FRAME_BUFFER_SIZE/2)-1);
472#ifdef DEBUG_ANALYSIS
473 dbg_anacnt_GPU_readData++;
474#endif
475 pcsx4all_prof_pause(PCSX4ALL_PROF_CPU);
476 pcsx4all_prof_start_with_pause(PCSX4ALL_PROF_GPU,PCSX4ALL_PROF_HW_READ);
477 GPU_GP1 &= ~0x14000000;
478 if (FrameToRead)
479 {
480 if ((&pvram[px])>(VIDEO_END)) pvram-=512*1024;
481 GP0 = pvram[px];
482 if (++px>=x_end)
483 {
484 px = 0;
485 pvram += 1024;
486 if (++py>=y_end)
487 {
488 FrameToRead = 0;
489 GPU_GP1 &= ~0x08000000;
490 }
491 }
492 if ((&pvram[px])>(VIDEO_END)) pvram-=512*1024;
493 GP0 |= pvram[px]<<16;
494 if (++px>=x_end)
495 {
496 px = 0;
497 pvram +=1024;
498 if (++py>=y_end)
499 {
500 FrameToRead = 0;
501 GPU_GP1 &= ~0x08000000;
502 }
503 }
504
505 }
506 GPU_GP1 |= 0x14000000;
507
508 pcsx4all_prof_end_with_resume(PCSX4ALL_PROF_GPU,PCSX4ALL_PROF_HW_READ);
509 pcsx4all_prof_resume(PCSX4ALL_PROF_CPU);
510 return (GP0);
511}
512
513///////////////////////////////////////////////////////////////////////////////
514u32 GPU_readStatus(void)
515{
516#ifdef DEBUG_ANALYSIS
517 dbg_anacnt_GPU_readStatus++;
518#endif
519 return GPU_GP1;
520}
521
522///////////////////////////////////////////////////////////////////////////////
523void GPU_writeStatus(u32 data)
524{
525#ifdef DEBUG_ANALYSIS
526 dbg_anacnt_GPU_writeStatus++;
527#endif
528 pcsx4all_prof_pause(PCSX4ALL_PROF_CPU);
529 pcsx4all_prof_start_with_pause(PCSX4ALL_PROF_GPU,PCSX4ALL_PROF_HW_WRITE);
530 switch (data >> 24) {
531 case 0x00:
532 gpuReset();
533 break;
534 case 0x01:
535 GPU_GP1 &= ~0x08000000;
536 PacketCount = FrameToRead = FrameToWrite = 0;
537 break;
538 case 0x02:
539 GPU_GP1 &= ~0x08000000;
540 PacketCount = FrameToRead = FrameToWrite = 0;
541 break;
542 case 0x03:
543 GPU_GP1 = (GPU_GP1 & ~0x00800000) | ((data & 1) << 23);
544 break;
545 case 0x04:
546 if (data == 0x04000000)
547 PacketCount = 0;
548 GPU_GP1 = (GPU_GP1 & ~0x60000000) | ((data & 3) << 29);
549 break;
550 case 0x05:
551 DisplayArea[0] = (data & 0x000003FF); //(short)(data & 0x3ff);
552 DisplayArea[1] = ((data & 0x0007FC00)>>10); //(data & 0x000FFC00) >> 10; //(short)((data>>10)&0x1ff);
553 fb_dirty = true;
554 break;
555 case 0x07:
556 DisplayArea[4] = data & 0x000003FF; //(short)(data & 0x3ff);
557 DisplayArea[5] = (data & 0x000FFC00) >> 10; //(short)((data>>10) & 0x3ff);
558 fb_dirty = true;
559 break;
560 case 0x08:
561 {
562 GPU_GP1 = (GPU_GP1 & ~0x007F0000) | ((data & 0x3F) << 17) | ((data & 0x40) << 10);
563 static u32 HorizontalResolution[8] = { 256, 368, 320, 384, 512, 512, 640, 640 };
564 DisplayArea[2] = HorizontalResolution[(GPU_GP1 >> 16) & 7];
565 static u32 VerticalResolution[4] = { 240, 480, 256, 480 };
566 DisplayArea[3] = VerticalResolution[(GPU_GP1 >> 19) & 3];
567 isPAL = (data & 0x08) ? true : false; // if 1 - PAL mode, else NTSC
568 }
569 fb_dirty = true;
570 break;
571 case 0x10:
572 switch (data & 0xffff) {
573 case 0:
574 case 1:
575 case 3:
576 GP0 = (DrawingArea[1] << 10) | DrawingArea[0];
577 break;
578 case 4:
579 GP0 = ((DrawingArea[3]-1) << 10) | (DrawingArea[2]-1);
580 break;
581 case 6:
582 case 5:
583 GP0 = (DrawingOffset[1] << 11) | DrawingOffset[0];
584 break;
585 case 7:
586 GP0 = 2;
587 break;
588 default:
589 GP0 = 0;
590 }
591 break;
592 }
593 pcsx4all_prof_end_with_resume(PCSX4ALL_PROF_GPU,PCSX4ALL_PROF_HW_WRITE);
594 pcsx4all_prof_resume(PCSX4ALL_PROF_CPU);
595}
596
597#ifndef REARMED
598
599// Blitting functions
600#include "gpu_blit.h"
601
602INLINE void gpuVideoOutput(void)
603{
604 static s16 old_res_horz, old_res_vert, old_rgb24;
605 s16 h0, x0, y0, w0, h1;
606
607 x0 = DisplayArea[0];
608 y0 = DisplayArea[1];
609
610 w0 = DisplayArea[2];
611 h0 = DisplayArea[3]; // video mode
612
613 h1 = DisplayArea[5] - DisplayArea[4]; // display needed
614 if (h0 == 480) h1 = Min2(h1*2,480);
615
616 u16* dest_screen16 = SCREEN;
617 u16* src_screen16 = &((u16*)GPU_FrameBuffer)[FRAME_OFFSET(x0,y0)];
618 u32 isRGB24 = (GPU_GP1 & 0x00200000 ? 32 : 0);
619
620 /* Clear the screen if resolution changed to prevent interlacing and clipping to clash */
621 if( (w0 != old_res_horz || h1 != old_res_vert || (s16)isRGB24 != old_rgb24) )
622 {
623 // Update old resolution
624 old_res_horz = w0;
625 old_res_vert = h1;
626 old_rgb24 = (s16)isRGB24;
627 // Finally, clear the screen for this special case
628 video_clear();
629 }
630
631 // Height centering
632 int sizeShift = 1;
633 if(h0==256) h0 = 240; else if(h0==480) sizeShift = 2;
634 if(h1>h0) { src_screen16 += ((h1-h0)>>sizeShift)*1024; h1 = h0; }
635 else if(h1<h0) dest_screen16 += ((h0-h1)>>sizeShift)*VIDEO_WIDTH;
636
637 /* Main blitter */
638 int incY = (h0==480) ? 2 : 1;
639 h0=(h0==480 ? 2048 : 1024);
640
641 if (!progressInterlace)
642 {
643 const int li=linesInterlace;
644 switch ( w0 )
645 {
646 case 256:
647 for(int y1=y0+h1; y0<y1; y0+=incY)
648 {
649 if( 0 == (y0&li) ) GPU_BlitWWDWW( src_screen16, dest_screen16, isRGB24);
650 dest_screen16 += VIDEO_WIDTH;
651 src_screen16 += h0;
652 }
653 break;
654 case 368:
655 for(int y1=y0+h1; y0<y1; y0+=incY)
656 {
657 if( 0 == (y0&li) ) GPU_BlitWWWWWWWWS( src_screen16, dest_screen16, isRGB24, 4);
658 dest_screen16 += VIDEO_WIDTH;
659 src_screen16 += h0;
660 }
661 break;
662 case 320:
663 for(int y1=y0+h1; y0<y1; y0+=incY)
664 {
665 if( 0 == (y0&li) ) GPU_BlitWW( src_screen16, dest_screen16, isRGB24);
666 dest_screen16 += VIDEO_WIDTH;
667 src_screen16 += h0;
668 }
669 break;
670 case 384:
671 for(int y1=y0+h1; y0<y1; y0+=incY)
672 {
673 if( 0 == (y0&li) ) GPU_BlitWWWWWS( src_screen16, dest_screen16, isRGB24);
674 dest_screen16 += VIDEO_WIDTH;
675 src_screen16 += h0;
676 }
677 break;
678 case 512:
679 for(int y1=y0+h1; y0<y1; y0+=incY)
680 {
681 if( 0 == (y0&li) ) GPU_BlitWWSWWSWS( src_screen16, dest_screen16, isRGB24);
682 dest_screen16 += VIDEO_WIDTH;
683 src_screen16 += h0;
684 }
685 break;
686 case 640:
687 for(int y1=y0+h1; y0<y1; y0+=incY)
688 {
689 if( 0 == (y0&li) ) GPU_BlitWS( src_screen16, dest_screen16, isRGB24);
690 dest_screen16 += VIDEO_WIDTH;
691 src_screen16 += h0;
692 }
693 break;
694 }
695 }
696 else
697 {
698 const int li=linesInterlace;
699 bool flag=progressInterlace_flag; /* progressive interlace */
700 switch ( w0 )
701 {
702 case 256:
703 for(int y1=y0+h1; y0<y1; y0+=incY)
704 {
705 if(( 0 == (y0&li) ) && (flag=!flag)) GPU_BlitWWDWW( src_screen16, dest_screen16, isRGB24);
706 dest_screen16 += VIDEO_WIDTH;
707 src_screen16 += h0;
708 }
709 break;
710 case 368:
711 for(int y1=y0+h1; y0<y1; y0+=incY)
712 {
713 if(( 0 == (y0&li) ) && (flag=!flag)) GPU_BlitWWWWWWWWS( src_screen16, dest_screen16, isRGB24, 4);
714 dest_screen16 += VIDEO_WIDTH;
715 src_screen16 += h0;
716 }
717 break;
718 case 320:
719 for(int y1=y0+h1; y0<y1; y0+=incY)
720 {
721 if(( 0 == (y0&li) ) && (flag=!flag)) GPU_BlitWW( src_screen16, dest_screen16, isRGB24);
722 dest_screen16 += VIDEO_WIDTH;
723 src_screen16 += h0;
724 }
725 break;
726 case 384:
727 for(int y1=y0+h1; y0<y1; y0+=incY)
728 {
729 if(( 0 == (y0&li) ) && (flag=!flag)) GPU_BlitWWWWWS( src_screen16, dest_screen16, isRGB24);
730 dest_screen16 += VIDEO_WIDTH;
731 src_screen16 += h0;
732 }
733 break;
734 case 512:
735 for(int y1=y0+h1; y0<y1; y0+=incY)
736 {
737 if(( 0 == (y0&li) ) && (flag=!flag)) GPU_BlitWWSWWSWS( src_screen16, dest_screen16, isRGB24);
738 dest_screen16 += VIDEO_WIDTH;
739 src_screen16 += h0;
740 }
741 break;
742 case 640:
743 for(int y1=y0+h1; y0<y1; y0+=incY)
744 {
745 if(( 0 == (y0&li) ) && (flag=!flag)) GPU_BlitWS( src_screen16, dest_screen16, isRGB24);
746 dest_screen16 += VIDEO_WIDTH;
747 src_screen16 += h0;
748 }
749 break;
750 }
751 progressInterlace_flag=!flag;
752 }
753 video_flip();
754}
755
756///////////////////////////////////////////////////////////////////////////////
757void GPU_updateLace(void)
758{
759#ifdef ENABLE_GPU_LOG_SUPPORT
760 fprintf(stdout,"GPU_updateLace()\n");
761#endif
762#ifdef DEBUG_ANALYSIS
763 dbg_anacnt_GPU_updateLace++;
764#endif
765 pcsx4all_prof_start_with_pause(PCSX4ALL_PROF_GPU,PCSX4ALL_PROF_COUNTERS);
766#ifdef PROFILER_PCSX4ALL
767 pcsx4all_prof_frames++;
768#endif
769#ifdef DEBUG_FRAME
770 if(isdbg_frame())
771 {
772 static int passed=0;
773 if (!passed) dbg_enable();
774 else pcsx4all_exit();
775 passed++;
776 }
777#endif
778
779 // Frame skip table
780 static const unsigned char skipTable[12][12] =
781 {
782 { 0,0,0,0,0,0,0,0,0,0,0,0 },
783 { 0,0,0,0,0,0,0,0,0,0,0,1 },
784 { 0,0,0,0,0,1,0,0,0,0,0,1 },
785 { 0,0,0,1,0,0,0,1,0,0,0,1 },
786 { 0,0,1,0,0,1,0,0,1,0,0,1 },
787 { 0,1,0,0,1,0,1,0,0,1,0,1 },
788 { 0,1,0,1,0,1,0,1,0,1,0,1 },
789 { 0,1,0,1,1,0,1,0,1,1,0,1 },
790 { 0,1,1,0,1,1,0,1,1,0,1,1 },
791 { 0,1,1,1,0,1,1,1,0,1,1,1 },
792 { 0,1,1,1,1,1,0,1,1,1,1,1 },
793 { 0,1,1,1,1,1,1,1,1,1,1,1 }
794 };
795
796 // Interlace bit toggle
797 GPU_GP1 ^= 0x80000000;
798
799 // Update display
800 if ((!skipFrame) && (!isSkip) && (!(((GPU_GP1&0x08000000))||((GPU_GP1&0x00800000)))))
801 {
802 gpuVideoOutput(); // Display updated
803
804 if (DisplayArea[3] == 480)
805 {
806 if (linesInterlace_user) linesInterlace = 3; // 1/4 of lines
807 else linesInterlace = 1; // if 480 we only need half of lines
808 }
809 else if (linesInterlace != linesInterlace_user)
810 {
811 linesInterlace = linesInterlace_user; // resolution changed from 480 to lower one
812 video_clear();
813 }
814
815 // Limit FPS
816 if (frameLimit)
817 {
818 static unsigned next=get_ticks();
819 unsigned now=get_ticks();
820 if (!skipFrame)
821 {
822 if (now<next) wait_ticks(next-now);
823 }
824 next+=(isPAL?(1000000/50):((unsigned)(1000000.0/59.94)));
825 }
826 }
827
828 // Show FPS statistics
829 if (show_fps)
830 {
831 static u32 real_fps=0;
832 static u32 prev=get_ticks();
833 static char msg[24]="FPS=000/00 SPD=000%";
834 u32 now=get_ticks();
835 real_fps++;
836 if ((now-prev)>=1000000)
837 {
838 u32 expected_fps=(isPAL?50:60);
839 sprintf(msg,"FPS=%3d/%2d SPD=%3d%%",((real_fps*(12-skipCount))/12),((expected_fps*(12-skipCount))/12),((real_fps*100)/expected_fps));
840 prev=now;
841 real_fps=0;
842 }
843 port_printf(5,5,msg);
844 }
845
846 // Update frame-skip
847 if (!alt_fps)
848 {
849 // Video frame-skip
850 skipFrame=skipTable[skipCount][skCount];
851 skCount--; if (skCount<0) skCount=11;
852 isSkip=skipFrame;
853 }
854 else
855 {
856 // Game frame-skip
857 if (!isSkip)
858 {
859 skipFrame=skipTable[skipCount][skCount];
860 skCount--; if (skCount<0) skCount=11;
861 isSkip=true;
862 }
863 }
864
865 pcsx4all_prof_end_with_resume(PCSX4ALL_PROF_GPU,PCSX4ALL_PROF_COUNTERS);
866}
867
868#else
869
870#include "../../frontend/plugin_lib.h"
871#include "../../frontend/arm_utils.h"
872
873extern "C" {
874
875static const struct rearmed_cbs *cbs;
876static void *screen_buf;
877
878static void blit(void)
879{
880 static s16 old_res_horz, old_res_vert, old_rgb24;
881 s16 isRGB24 = (GPU_GP1 & 0x00200000) ? 1 : 0;
882 s16 h0, x0, y0, w0, h1;
883 u16 *srcs;
884 u8 *dest;
885
886 x0 = DisplayArea[0] & ~1; // alignment needed by blitter
887 y0 = DisplayArea[1];
888 srcs = &((u16*)GPU_FrameBuffer)[FRAME_OFFSET(x0,y0)];
889
890 w0 = DisplayArea[2];
891 h0 = DisplayArea[3]; // video mode
892
893 h1 = DisplayArea[5] - DisplayArea[4]; // display needed
894 if (h0 == 480) h1 = Min2(h1*2,480);
895
896 if (h1 <= 0)
897 return;
898
899 if (w0 != old_res_horz || h1 != old_res_vert || isRGB24 != old_rgb24)
900 {
901 old_res_horz = w0;
902 old_res_vert = h1;
903 old_rgb24 = (s16)isRGB24;
904 screen_buf = cbs->pl_fbdev_set_mode(w0, h1, isRGB24 ? 24 : 16);
905 }
906 dest = (u8 *)screen_buf;
907
908 if (isRGB24)
909 {
910#ifndef MAEMO
911 for (; h1-- > 0; dest += w0 * 3, srcs += 1024)
912 {
913 bgr888_to_rgb888(dest, srcs, w0 * 3);
914 }
915#else
916 for (; h1-- > 0; dest += w0 * 2, srcs += 1024)
917 {
918 bgr888_to_rgb565(dest, srcs, w0 * 3);
919 }
920#endif
921 }
922 else
923 {
924 for (; h1-- > 0; dest += w0 * 2, srcs += 1024)
925 {
926 bgr555_to_rgb565(dest, srcs, w0 * 2);
927 }
928 }
929
930 screen_buf = cbs->pl_fbdev_flip();
931}
932
933void GPU_updateLace(void)
934{
935 // Interlace bit toggle
936 GPU_GP1 ^= 0x80000000;
937
938 if (!fb_dirty || (GPU_GP1&0x08800000))
939 return;
940
941 if (!isSkip) {
942 blit();
943
944 fb_dirty = false;
945 if (cbs->fskip_advice)
946 isSkip = true;
947 }
948 else
949 isSkip = false;
950}
951
952long GPUopen(unsigned long *, char *, char *)
953{
954 cbs->pl_fbdev_open();
955 screen_buf = cbs->pl_fbdev_flip();
956 return 0;
957}
958
959long GPUclose(void)
960{
961 cbs->pl_fbdev_close();
962 return 0;
963}
964
965long GPUfreeze(unsigned int ulGetFreezeData, GPUFreeze_t* p2)
966{
967 if (ulGetFreezeData > 1)
968 return 0;
969
970 return GPU_freeze(ulGetFreezeData, p2);
971}
972
973void GPUrearmedCallbacks(const struct rearmed_cbs *cbs_)
974{
975 cbs = cbs_;
976}
977
978} /* extern "C" */
979
980#endif
ARM optimized PCSX fork