frontend: get rid of HOME hack
[pcsx_rearmed.git] / frontend / plat_pollux.c
1 /*
2  * (C) GraÅžvydas "notaz" Ignotas, 2009-2011
3  *
4  * This work is licensed under the terms of the GNU GPLv2 or later.
5  * See the COPYING file in the top-level directory.
6  */
7
8 #include <stdio.h>
9 #include <stdlib.h>
10 #include <string.h>
11 #include <sys/types.h>
12 #include <sys/stat.h>
13 #include <fcntl.h>
14 #include <sys/ioctl.h>
15 #include <unistd.h>
16 #include <linux/fb.h>
17 #include <sys/mman.h>
18
19 #include "common/input.h"
20 #include "common/menu.h"
21 #include "warm/warm.h"
22 #include "plugin_lib.h"
23 #include "cspace.h"
24 #include "blit320.h"
25 #include "main.h"
26 #include "menu.h"
27 #include "plat.h"
28 #include "pcnt.h"
29
30 static int fbdev = -1, memdev = -1, battdev = -1;
31 static volatile unsigned short *memregs;
32 static volatile unsigned int   *memregl;
33 static void *fb_vaddrs[2];
34 static unsigned int fb_paddrs[2];
35 static int fb_work_buf;
36 static int cpu_clock_allowed, have_warm;
37 static unsigned int saved_video_regs[2][6];
38 #define FB_VRAM_SIZE (320*240*2*2*2) // 2 buffers with space for 24bpp mode
39
40 static unsigned short *psx_vram;
41 static unsigned int psx_vram_padds[512];
42 static int psx_step, psx_width, psx_height, psx_bpp;
43 static int psx_offset_x, psx_offset_y;
44 static int fb_offset_x, fb_offset_y;
45
46 // TODO: get rid of this
47 struct vout_fbdev;
48 struct vout_fbdev *layer_fb;
49 int g_layer_x, g_layer_y, g_layer_w, g_layer_h;
50
51 int omap_enable_layer(int enabled)
52 {
53         return 0;
54 }
55
56 static void *fb_flip(void)
57 {
58         memregl[0x406C>>2] = memregl[0x446C>>2] = fb_paddrs[fb_work_buf];
59         memregl[0x4058>>2] |= 0x10;
60         memregl[0x4458>>2] |= 0x10;
61         fb_work_buf ^= 1;
62         return fb_vaddrs[fb_work_buf];
63 }
64
65 static void pollux_changemode(int bpp, int is_bgr)
66 {
67         int code = 0, bytes = 2;
68         unsigned int r;
69
70         printf("changemode: %dbpp %s\n", bpp, is_bgr ? "bgr" : "rgb");
71
72         memregl[0x4004>>2] = 0x00ef013f;
73         memregl[0x4000>>2] |= 1 << 3;
74
75         switch (bpp)
76         {
77                 case 8:
78                         code = 0x443a;
79                         bytes = 1;
80                         break;
81                 case 16:
82                         code = is_bgr ? 0xc342 : 0x4432;
83                         bytes = 2;
84                         break;
85                 case 24:
86                         code = is_bgr ? 0xc653 : 0x4653;
87                         bytes = 3;
88                         break;
89                 default:
90                         printf("unhandled bpp request: %d\n", bpp);
91                         return;
92         }
93
94         // program both MLCs so that TV-out works
95         memregl[0x405c>>2] = memregl[0x445c>>2] = bytes;
96         memregl[0x4060>>2] = memregl[0x4460>>2] = 320 * bytes;
97
98         r = memregl[0x4058>>2];
99         r = (r & 0xffff) | (code << 16) | 0x10;
100         memregl[0x4058>>2] = r;
101
102         r = memregl[0x4458>>2];
103         r = (r & 0xffff) | (code << 16) | 0x10;
104         memregl[0x4458>>2] = r;
105 }
106
107 /* note: both PLLs are programmed the same way,
108  * the databook incorrectly states that PLL1 differs */
109 static int decode_pll(unsigned int reg)
110 {
111         long long v;
112         int p, m, s;
113
114         p = (reg >> 18) & 0x3f;
115         m = (reg >> 8) & 0x3ff;
116         s = reg & 0xff;
117
118         if (p == 0)
119                 p = 1;
120
121         v = 27000000; // master clock
122         v = v * m / (p << s);
123         return v;
124 }
125
126 int plat_cpu_clock_get(void)
127 {
128         return decode_pll(memregl[0xf004>>2]) / 1000000;
129 }
130
131 int plat_cpu_clock_apply(int mhz)
132 {
133         int adiv, mdiv, pdiv, sdiv = 0;
134         int i, vf000, vf004;
135
136         if (!cpu_clock_allowed)
137                 return -1;
138         if (mhz == plat_cpu_clock_get())
139                 return 0;
140
141         // m = MDIV, p = PDIV, s = SDIV
142         #define SYS_CLK_FREQ 27
143         pdiv = 9;
144         mdiv = (mhz * pdiv) / SYS_CLK_FREQ;
145         if (mdiv & ~0x3ff)
146                 return -1;
147         vf004 = (pdiv<<18) | (mdiv<<8) | sdiv;
148
149         // attempt to keep the AHB divider close to 250, but not higher
150         for (adiv = 1; mhz / adiv > 250; adiv++)
151                 ;
152
153         vf000 = memregl[0xf000>>2];
154         vf000 = (vf000 & ~0x3c0) | ((adiv - 1) << 6);
155         memregl[0xf000>>2] = vf000;
156         memregl[0xf004>>2] = vf004;
157         memregl[0xf07c>>2] |= 0x8000;
158         for (i = 0; (memregl[0xf07c>>2] & 0x8000) && i < 0x100000; i++)
159                 ;
160
161         printf("clock set to %dMHz, AHB set to %dMHz\n", mhz, mhz / adiv);
162
163         // stupid pll share hack - must restart audio
164         extern long SPUopen(void);
165         extern long SPUclose(void);
166         SPUclose();
167         SPUopen();
168
169         return 0;
170 }
171
172 int plat_get_bat_capacity(void)
173 {
174         unsigned short magic_val = 0;
175
176         if (battdev < 0)
177                 return -1;
178         if (read(battdev, &magic_val, sizeof(magic_val)) != sizeof(magic_val))
179                 return -1;
180         switch (magic_val) {
181         default:
182         case 1: return 100;
183         case 2: return 66;
184         case 3: return 40;
185         case 4: return 0;
186         }
187 }
188
189 #define TIMER_BASE3 0x1980
190 #define TIMER_REG(x) memregl[(TIMER_BASE3 + x) >> 2]
191
192 static __attribute__((unused)) unsigned int timer_get(void)
193 {
194         TIMER_REG(0x08) |= 0x48;  /* run timer, latch value */
195         return TIMER_REG(0);
196 }
197
198 static void timer_cleanup(void)
199 {
200         TIMER_REG(0x40) = 0x0c; /* be sure clocks are on */
201         TIMER_REG(0x08) = 0x23; /* stop the timer, clear irq in case it's pending */
202         TIMER_REG(0x00) = 0;    /* clear counter */
203         TIMER_REG(0x40) = 0;    /* clocks off */
204         TIMER_REG(0x44) = 0;    /* dividers back to default */
205 }
206
207 void plat_video_menu_enter(int is_rom_loaded)
208 {
209         if (pl_vout_buf != NULL) {
210                 if (psx_bpp == 16)
211                         // have to do rgb conversion for menu bg
212                         bgr555_to_rgb565(pl_vout_buf, pl_vout_buf, 320*240*2);
213                 else
214                         memset(pl_vout_buf, 0, 320*240*2);
215         }
216
217         pollux_changemode(16, 0);
218 }
219
220 void plat_video_menu_begin(void)
221 {
222 }
223
224 void plat_video_menu_end(void)
225 {
226         g_menuscreen_ptr = fb_flip();
227 }
228
229 void plat_video_menu_leave(void)
230 {
231         if (psx_vram == NULL) {
232                 fprintf(stderr, "GPU plugin did not provide vram\n");
233                 exit(1);
234         }
235
236         in_set_config_int(in_name_to_id("evdev:pollux-analog"),
237                         IN_CFG_ABS_DEAD_ZONE, analog_deadzone);
238
239         memset(g_menuscreen_ptr, 0, 320*240 * psx_bpp/8);
240         g_menuscreen_ptr = fb_flip();
241         memset(g_menuscreen_ptr, 0, 320*240 * psx_bpp/8);
242
243         pollux_changemode(psx_bpp, 1);
244 }
245
246 static void pl_vout_set_raw_vram(void *vram)
247 {
248         int i;
249
250         psx_vram = vram;
251
252         if (vram == NULL)
253                 return;
254
255         if ((long)psx_vram & 0x7ff)
256                 fprintf(stderr, "GPU plugin did not align vram\n");
257
258         for (i = 0; i < 512; i++) {
259                 psx_vram[i * 1024] = 0; // touch
260                 psx_vram_padds[i] = warm_virt2phys(&psx_vram[i * 1024]);
261         }
262 }
263
264 static void spend_cycles(int loops)
265 {
266         asm volatile (
267                 "   mov  r0,%0    ;\n"
268                 "0: subs r0,r0,#1 ;\n"
269                 "   bgt  0b"
270                 :: "r" (loops) : "cc", "r0");
271 }
272
273 #define DMA_BASE6 0x0300
274 #define DMA_REG(x) memregl[(DMA_BASE6 + x) >> 2]
275
276 /* this takes ~1.5ms, while ldm/stm ~1.95ms */
277 static void raw_flip_dma(int x, int y)
278 {
279         unsigned int dst = fb_paddrs[fb_work_buf] +
280                         (fb_offset_y * 320 + fb_offset_x) * psx_bpp / 8;
281         int spsx_line = y + psx_offset_y;
282         int spsx_offset = (x + psx_offset_x) & 0x3f8;
283         int dst_stride = 320 * psx_bpp / 8;
284         int len = psx_width * psx_bpp / 8;
285         int i;
286
287         warm_cache_op_all(WOP_D_CLEAN);
288         pcnt_start(PCNT_BLIT);
289
290         dst &= ~7;
291         len &= ~7;
292
293         if (DMA_REG(0x0c) & 0x90000) {
294                 printf("already runnig DMA?\n");
295                 DMA_REG(0x0c) = 0x100000;
296         }
297         if ((DMA_REG(0x2c) & 0x0f) < 5) {
298                 printf("DMA queue busy?\n");
299                 DMA_REG(0x24) = 1;
300         }
301
302         for (i = psx_height; i > 0; i--, spsx_line += psx_step, dst += dst_stride) {
303                 while ((DMA_REG(0x2c) & 0x0f) < 4)
304                         spend_cycles(10);
305
306                 // XXX: it seems we must always set all regs, what is autoincrement there for?
307                 DMA_REG(0x20) = 1;              // queue wait cmd
308                 DMA_REG(0x10) = psx_vram_padds[spsx_line & 511] + spsx_offset * 2; // DMA src
309                 DMA_REG(0x14) = dst;            // DMA dst
310                 DMA_REG(0x18) = len - 1;        // len
311                 DMA_REG(0x1c) = 0x80000;        // go
312         }
313
314         if (psx_bpp == 16) {
315                 pl_vout_buf = g_menuscreen_ptr;
316                 pl_print_hud(320, fb_offset_y + psx_height, fb_offset_x);
317         }
318
319         g_menuscreen_ptr = fb_flip();
320         pl_flip_cnt++;
321
322         pcnt_end(PCNT_BLIT);
323 }
324
325 #define make_flip_func(name, blitfunc)                                                  \
326 static void name(int x, int y)                                                          \
327 {                                                                                       \
328         unsigned short *vram = psx_vram;                                                \
329         unsigned char *dst = (unsigned char *)g_menuscreen_ptr +                        \
330                         (fb_offset_y * 320 + fb_offset_x) * psx_bpp / 8;                \
331         unsigned int src = (y + psx_offset_y) * 1024 + x + psx_offset_x;                \
332         int dst_stride = 320 * psx_bpp / 8;                                             \
333         int len = psx_width * psx_bpp / 8;                                              \
334         int i;                                                                          \
335                                                                                         \
336         pcnt_start(PCNT_BLIT);                                                          \
337                                                                                         \
338         for (i = psx_height; i > 0; i--, src += psx_step * 1024, dst += dst_stride) {   \
339                 src &= 1024*512-1;                                                      \
340                 blitfunc(dst, vram + src, len);                                         \
341         }                                                                               \
342                                                                                         \
343         if (psx_bpp == 16) {                                                            \
344                 pl_vout_buf = g_menuscreen_ptr;                                         \
345                 pl_print_hud(320, fb_offset_y + psx_height, fb_offset_x);               \
346         }                                                                               \
347                                                                                         \
348         g_menuscreen_ptr = fb_flip();                                                   \
349         pl_flip_cnt++;                                                                  \
350                                                                                         \
351         pcnt_end(PCNT_BLIT);                                                            \
352 }
353
354 make_flip_func(raw_flip_soft, memcpy)
355 make_flip_func(raw_flip_soft_368, blit320_368)
356 make_flip_func(raw_flip_soft_512, blit320_512)
357 make_flip_func(raw_flip_soft_640, blit320_640)
358
359 static void *pl_vout_set_mode(int w, int h, int bpp)
360 {
361         static int old_w, old_h, old_bpp;
362         int poff_w, poff_h, w_max;
363
364         if (!w || !h || !bpp || (w == old_w && h == old_h && bpp == old_bpp))
365                 return NULL;
366
367         printf("psx mode: %dx%d@%d\n", w, h, bpp);
368
369         switch (w + (bpp != 16)) {
370         case 640:
371                 pl_rearmed_cbs.pl_vout_raw_flip = raw_flip_soft_640;
372                 w_max = 640;
373                 break;
374         case 512:
375                 pl_rearmed_cbs.pl_vout_raw_flip = raw_flip_soft_512;
376                 w_max = 512;
377                 break;
378         case 384:
379         case 368:
380                 pl_rearmed_cbs.pl_vout_raw_flip = raw_flip_soft_368;
381                 w_max = 368;
382                 break;
383         default:
384                 pl_rearmed_cbs.pl_vout_raw_flip = have_warm ? raw_flip_dma : raw_flip_soft;
385                 w_max = 320;
386                 break;
387         }
388
389         psx_step = 1;
390         if (h > 256) {
391                 psx_step = 2;
392                 h /= 2;
393         }
394
395         poff_w = poff_h = 0;
396         if (w > w_max) {
397                 poff_w = w / 2 - w_max / 2;
398                 w = w_max;
399         }
400         fb_offset_x = 0;
401         if (w < 320)
402                 fb_offset_x = 320/2 - w / 2;
403         if (h > 240) {
404                 poff_h = h / 2 - 240/2;
405                 h = 240;
406         }
407         fb_offset_y = 240/2 - h / 2;
408
409         psx_offset_x = poff_w;
410         psx_offset_y = poff_h;
411         psx_width = w;
412         psx_height = h;
413         psx_bpp = bpp;
414
415         if (fb_offset_x || fb_offset_y) {
416                 // not fullscreen, must clear borders
417                 memset(g_menuscreen_ptr, 0, 320*240 * psx_bpp/8);
418                 g_menuscreen_ptr = fb_flip();
419                 memset(g_menuscreen_ptr, 0, 320*240 * psx_bpp/8);
420         }
421
422         pollux_changemode(bpp, 1);
423
424         return NULL;
425 }
426
427 static void *pl_vout_flip(void)
428 {
429         return NULL;
430 }
431
432 static void save_multiple_regs(unsigned int *dest, int base, int count)
433 {
434         const volatile unsigned int *regs = memregl + base / 4;
435         int i;
436
437         for (i = 0; i < count; i++)
438                 dest[i] = regs[i];
439 }
440
441 static void restore_multiple_regs(int base, const unsigned int *src, int count)
442 {
443         volatile unsigned int *regs = memregl + base / 4;
444         int i;
445
446         for (i = 0; i < count; i++)
447                 regs[i] = src[i];
448 }
449
450 void plat_init(void)
451 {
452         const char *main_fb_name = "/dev/fb0";
453         struct fb_fix_screeninfo fbfix;
454         int rate, timer_div, timer_div2;
455         int fbdev, ret, warm_ret;
456
457         memdev = open("/dev/mem", O_RDWR);
458         if (memdev == -1) {
459                 perror("open(/dev/mem) failed");
460                 exit(1);
461         }
462
463         memregs = mmap(0, 0x20000, PROT_READ|PROT_WRITE, MAP_SHARED, memdev, 0xc0000000);
464         if (memregs == MAP_FAILED) {
465                 perror("mmap(memregs) failed");
466                 exit(1);
467         }
468         memregl = (volatile void *)memregs;
469
470         // save video regs of both MLCs
471         save_multiple_regs(saved_video_regs[0], 0x4058, ARRAY_SIZE(saved_video_regs[0]));
472         save_multiple_regs(saved_video_regs[1], 0x4458, ARRAY_SIZE(saved_video_regs[1]));
473
474         fbdev = open(main_fb_name, O_RDWR);
475         if (fbdev == -1) {
476                 fprintf(stderr, "%s: ", main_fb_name);
477                 perror("open");
478                 exit(1);
479         }
480
481         ret = ioctl(fbdev, FBIOGET_FSCREENINFO, &fbfix);
482         if (ret == -1) {
483                 perror("ioctl(fbdev) failed");
484                 exit(1);
485         }
486         printf("framebuffer: \"%s\" @ %08lx\n", fbfix.id, fbfix.smem_start);
487         fb_paddrs[0] = fbfix.smem_start;
488         fb_paddrs[1] = fb_paddrs[0] + 320*240*4; // leave space for 24bpp
489
490         fb_vaddrs[0] = mmap(0, FB_VRAM_SIZE, PROT_READ|PROT_WRITE,
491                                 MAP_SHARED, memdev, fb_paddrs[0]);
492         if (fb_vaddrs[0] == MAP_FAILED) {
493                 perror("mmap(fb_vaddrs) failed");
494                 exit(1);
495         }
496         fb_vaddrs[1] = (char *)fb_vaddrs[0] + 320*240*4;
497
498         pollux_changemode(16, 0);
499         g_menuscreen_w = 320;
500         g_menuscreen_h = 240;
501         g_menuscreen_ptr = fb_flip();
502
503         g_menubg_ptr = calloc(320*240*2, 1);
504         if (g_menubg_ptr == NULL) {
505                 fprintf(stderr, "OOM\n");
506                 exit(1);
507         }
508
509         warm_ret = warm_init();
510         have_warm = warm_ret == 0;
511         warm_change_cb_upper(WCB_B_BIT, 1);
512
513         /* some firmwares have sys clk on PLL0, we can't adjust CPU clock
514          * by reprogramming the PLL0 then, as it overclocks system bus */
515         if ((memregl[0xf000>>2] & 0x03000030) == 0x01000000)
516                 cpu_clock_allowed = 1;
517         else {
518                 cpu_clock_allowed = 0;
519                 fprintf(stderr, "unexpected PLL config (%08x), overclocking disabled\n",
520                         memregl[0xf000>>2]);
521         }
522
523         /* find what PLL1 runs at, for the timer */
524         rate = decode_pll(memregl[0xf008>>2]);
525         printf("PLL1 @ %dHz\n", rate);
526
527         /* setup timer */
528         timer_div = (rate + 500000) / 1000000;
529         timer_div2 = 0;
530         while (timer_div > 256) {
531                 timer_div /= 2;
532                 timer_div2++;
533         }
534         if (1 <= timer_div && timer_div <= 256 && timer_div2 < 4) {
535                 int timer_rate = (rate >> timer_div2) / timer_div;
536                 if (TIMER_REG(0x08) & 8) {
537                         fprintf(stderr, "warning: timer in use, overriding!\n");
538                         timer_cleanup();
539                 }
540                 if (timer_rate != 1000000)
541                         fprintf(stderr, "warning: timer drift %d us\n", timer_rate - 1000000);
542
543                 timer_div2 = (timer_div2 + 3) & 3;
544                 TIMER_REG(0x44) = ((timer_div - 1) << 4) | 2;   /* using PLL1 */
545                 TIMER_REG(0x40) = 0x0c;                         /* clocks on */
546                 TIMER_REG(0x08) = 0x68 | timer_div2;            /* run timer, clear irq, latch value */
547         }
548         else
549                 fprintf(stderr, "warning: could not make use of timer\n");
550
551         /* setup DMA */
552         DMA_REG(0x0c) = 0x20000; // pending IRQ clear
553
554         battdev = open("/dev/pollux_batt", O_RDONLY);
555         if (battdev < 0)
556                 perror("Warning: could't open pollux_batt");
557
558         // hmh
559         plat_rescan_inputs();
560
561         pl_rearmed_cbs.pl_vout_flip = pl_vout_flip;
562         pl_rearmed_cbs.pl_vout_raw_flip = have_warm ? raw_flip_dma : raw_flip_soft;
563         pl_rearmed_cbs.pl_vout_set_mode = pl_vout_set_mode;
564         pl_rearmed_cbs.pl_vout_set_raw_vram = pl_vout_set_raw_vram;
565
566         psx_width = 320;
567         psx_height = 240;
568         psx_bpp = 16;
569 }
570
571 void plat_finish(void)
572 {
573         warm_finish();
574         timer_cleanup();
575
576         memset(fb_vaddrs[0], 0, FB_VRAM_SIZE);
577         restore_multiple_regs(0x4058, saved_video_regs[0], ARRAY_SIZE(saved_video_regs[0]));
578         restore_multiple_regs(0x4458, saved_video_regs[1], ARRAY_SIZE(saved_video_regs[1]));
579         memregl[0x4058>>2] |= 0x10;
580         memregl[0x4458>>2] |= 0x10;
581         munmap(fb_vaddrs[0], FB_VRAM_SIZE);
582         close(fbdev);
583
584         if (battdev >= 0)
585                 close(battdev);
586         munmap((void *)memregs, 0x20000);
587         close(memdev);
588 }
589
590 void in_update_analogs(void)
591 {
592 }
593
594 /* Caanoo stuff, perhaps move later */
595 #include <linux/input.h>
596
597 struct in_default_bind in_evdev_defbinds[] = {
598         { KEY_UP,       IN_BINDTYPE_PLAYER12, DKEY_UP },
599         { KEY_DOWN,     IN_BINDTYPE_PLAYER12, DKEY_DOWN },
600         { KEY_LEFT,     IN_BINDTYPE_PLAYER12, DKEY_LEFT },
601         { KEY_RIGHT,    IN_BINDTYPE_PLAYER12, DKEY_RIGHT },
602         { BTN_TOP,      IN_BINDTYPE_PLAYER12, DKEY_TRIANGLE },
603         { BTN_THUMB,    IN_BINDTYPE_PLAYER12, DKEY_CROSS },
604         { BTN_THUMB2,   IN_BINDTYPE_PLAYER12, DKEY_CIRCLE },
605         { BTN_TRIGGER,  IN_BINDTYPE_PLAYER12, DKEY_SQUARE },
606         { BTN_BASE3,    IN_BINDTYPE_PLAYER12, DKEY_START },
607         { BTN_BASE4,    IN_BINDTYPE_PLAYER12, DKEY_SELECT },
608         { BTN_TOP2,     IN_BINDTYPE_PLAYER12, DKEY_L1 },
609         { BTN_PINKIE,   IN_BINDTYPE_PLAYER12, DKEY_R1 },
610         { BTN_BASE,     IN_BINDTYPE_EMU, SACTION_ENTER_MENU },
611         { 0, 0, 0 },
612 };
613
614 static const char * const caanoo_keys[KEY_MAX + 1] = {
615         [0 ... KEY_MAX] = NULL,
616         [KEY_UP]        = "Up",
617         [KEY_LEFT]      = "Left",
618         [KEY_RIGHT]     = "Right",
619         [KEY_DOWN]      = "Down",
620         [BTN_TRIGGER]   = "A",
621         [BTN_THUMB]     = "X",
622         [BTN_THUMB2]    = "B",
623         [BTN_TOP]       = "Y",
624         [BTN_TOP2]      = "L",
625         [BTN_PINKIE]    = "R",
626         [BTN_BASE]      = "Home",
627         [BTN_BASE2]     = "Lock",
628         [BTN_BASE3]     = "I",
629         [BTN_BASE4]     = "II",
630         [BTN_BASE5]     = "Push",
631 };
632
633 int plat_rescan_inputs(void)
634 {
635         in_probe();
636         in_set_config(in_name_to_id("evdev:pollux-analog"), IN_CFG_KEY_NAMES,
637                       caanoo_keys, sizeof(caanoo_keys));
638         return 0;
639 }