1 /* * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * *
2 * Mupen64plus/PCSX - assem_arm.c *
3 * Copyright (C) 2009-2011 Ari64 *
4 * Copyright (C) 2010-2021 GraÅžvydas "notaz" Ignotas *
6 * This program is free software; you can redistribute it and/or modify *
7 * it under the terms of the GNU General Public License as published by *
8 * the Free Software Foundation; either version 2 of the License, or *
9 * (at your option) any later version. *
11 * This program is distributed in the hope that it will be useful, *
12 * but WITHOUT ANY WARRANTY; without even the implied warranty of *
13 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the *
14 * GNU General Public License for more details. *
16 * You should have received a copy of the GNU General Public License *
17 * along with this program; if not, write to the *
18 * Free Software Foundation, Inc., *
19 * 51 Franklin Street, Fifth Floor, Boston, MA 02110-1301, USA. *
20 * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * */
25 #include "../gte_arm.h"
26 #include "../gte_neon.h"
28 #include "arm_features.h"
31 #define CALLER_SAVE_REGS 0x100f
33 #define CALLER_SAVE_REGS 0x120f
36 #define unused __attribute__((unused))
39 #pragma GCC diagnostic ignored "-Wunused-function"
40 #pragma GCC diagnostic ignored "-Wunused-variable"
41 #pragma GCC diagnostic ignored "-Wunused-but-set-variable"
44 void indirect_jump_indexed();
57 void jump_vaddr_r10();
58 void jump_vaddr_r12();
60 void * const jump_vaddr_reg[16] = {
79 void invalidate_addr_r0();
80 void invalidate_addr_r1();
81 void invalidate_addr_r2();
82 void invalidate_addr_r3();
83 void invalidate_addr_r4();
84 void invalidate_addr_r5();
85 void invalidate_addr_r6();
86 void invalidate_addr_r7();
87 void invalidate_addr_r8();
88 void invalidate_addr_r9();
89 void invalidate_addr_r10();
90 void invalidate_addr_r12();
92 const u_int invalidate_addr_reg[16] = {
93 (int)invalidate_addr_r0,
94 (int)invalidate_addr_r1,
95 (int)invalidate_addr_r2,
96 (int)invalidate_addr_r3,
97 (int)invalidate_addr_r4,
98 (int)invalidate_addr_r5,
99 (int)invalidate_addr_r6,
100 (int)invalidate_addr_r7,
101 (int)invalidate_addr_r8,
102 (int)invalidate_addr_r9,
103 (int)invalidate_addr_r10,
105 (int)invalidate_addr_r12,
110 static u_int needs_clear_cache[1<<(TARGET_SIZE_2-17)];
114 static void set_jump_target(void *addr, void *target_)
116 u_int target = (u_int)target_;
118 u_int *ptr2=(u_int *)ptr;
120 assert((target-(u_int)ptr2-8)<1024);
121 assert(((uintptr_t)addr&3)==0);
122 assert((target&3)==0);
123 *ptr2=(*ptr2&0xFFFFF000)|((target-(u_int)ptr2-8)>>2)|0xF00;
124 //printf("target=%x addr=%p insn=%x\n",target,addr,*ptr2);
126 else if(ptr[3]==0x72) {
127 // generated by emit_jno_unlikely
128 if((target-(u_int)ptr2-8)<1024) {
129 assert(((uintptr_t)addr&3)==0);
130 assert((target&3)==0);
131 *ptr2=(*ptr2&0xFFFFF000)|((target-(u_int)ptr2-8)>>2)|0xF00;
133 else if((target-(u_int)ptr2-8)<4096&&!((target-(u_int)ptr2-8)&15)) {
134 assert(((uintptr_t)addr&3)==0);
135 assert((target&3)==0);
136 *ptr2=(*ptr2&0xFFFFF000)|((target-(u_int)ptr2-8)>>4)|0xE00;
138 else *ptr2=(0x7A000000)|(((target-(u_int)ptr2-8)<<6)>>8);
141 assert((ptr[3]&0x0e)==0xa);
142 *ptr2=(*ptr2&0xFF000000)|(((target-(u_int)ptr2-8)<<6)>>8);
146 // This optionally copies the instruction from the target of the branch into
147 // the space before the branch. Works, but the difference in speed is
148 // usually insignificant.
150 static void set_jump_target_fillslot(int addr,u_int target,int copy)
152 u_char *ptr=(u_char *)addr;
153 u_int *ptr2=(u_int *)ptr;
154 assert(!copy||ptr2[-1]==0xe28dd000);
157 assert((target-(u_int)ptr2-8)<4096);
158 *ptr2=(*ptr2&0xFFFFF000)|(target-(u_int)ptr2-8);
161 assert((ptr[3]&0x0e)==0xa);
162 u_int target_insn=*(u_int *)target;
163 if((target_insn&0x0e100000)==0) { // ALU, no immediate, no flags
166 if((target_insn&0x0c100000)==0x04100000) { // Load
169 if(target_insn&0x08000000) {
173 ptr2[-1]=target_insn;
176 *ptr2=(*ptr2&0xFF000000)|(((target-(u_int)ptr2-8)<<6)>>8);
182 static void add_literal(int addr,int val)
184 assert(literalcount<sizeof(literals)/sizeof(literals[0]));
185 literals[literalcount][0]=addr;
186 literals[literalcount][1]=val;
190 // from a pointer to external jump stub (which was produced by emit_extjump2)
191 // find where the jumping insn is
192 static void *find_extjump_insn(void *stub)
194 int *ptr=(int *)(stub+4);
195 assert((*ptr&0x0fff0000)==0x059f0000); // ldr rx, [pc, #ofs]
196 u_int offset=*ptr&0xfff;
197 void **l_ptr=(void *)ptr+offset+8;
201 // find where external branch is liked to using addr of it's stub:
202 // get address that insn one after stub loads (dyna_linker arg1),
203 // treat it as a pointer to branch insn,
204 // return addr where that branch jumps to
205 static void *get_pointer(void *stub)
207 //printf("get_pointer(%x)\n",(int)stub);
208 int *i_ptr=find_extjump_insn(stub);
209 assert((*i_ptr&0x0f000000)==0x0a000000); // b
210 return (u_char *)i_ptr+((*i_ptr<<8)>>6)+8;
213 // Find the "clean" entry point from a "dirty" entry point
214 // by skipping past the call to verify_code
215 static void *get_clean_addr(void *addr)
217 signed int *ptr = addr;
223 if((*ptr&0xFF000000)!=0xeb000000) ptr++;
224 assert((*ptr&0xFF000000)==0xeb000000); // bl instruction
226 if((*ptr&0xFF000000)==0xea000000) {
227 return (char *)ptr+((*ptr<<8)>>6)+8; // follow jump
232 static int verify_dirty(const u_int *ptr)
236 // get from literal pool
237 assert((*ptr&0xFFFF0000)==0xe59f0000);
239 u_int source=*(u_int*)((void *)ptr+offset+8);
241 assert((*ptr&0xFFFF0000)==0xe59f0000);
243 u_int copy=*(u_int*)((void *)ptr+offset+8);
245 assert((*ptr&0xFFFF0000)==0xe59f0000);
247 u_int len=*(u_int*)((void *)ptr+offset+8);
252 assert((*ptr&0xFFF00000)==0xe3000000);
253 u_int source=(ptr[0]&0xFFF)+((ptr[0]>>4)&0xF000)+((ptr[2]<<16)&0xFFF0000)+((ptr[2]<<12)&0xF0000000);
254 u_int copy=(ptr[1]&0xFFF)+((ptr[1]>>4)&0xF000)+((ptr[3]<<16)&0xFFF0000)+((ptr[3]<<12)&0xF0000000);
255 u_int len=(ptr[4]&0xFFF)+((ptr[4]>>4)&0xF000);
258 if((*ptr&0xFF000000)!=0xeb000000) ptr++;
259 assert((*ptr&0xFF000000)==0xeb000000); // bl instruction
260 //printf("verify_dirty: %x %x %x\n",source,copy,len);
261 return !memcmp((void *)source,(void *)copy,len);
264 // This doesn't necessarily find all clean entry points, just
265 // guarantees that it's not dirty
266 static int isclean(void *addr)
269 u_int *ptr=((u_int *)addr)+4;
271 u_int *ptr=((u_int *)addr)+6;
273 if((*ptr&0xFF000000)!=0xeb000000) ptr++;
274 if((*ptr&0xFF000000)!=0xeb000000) return 1; // bl instruction
275 if((int)ptr+((*ptr<<8)>>6)+8==(int)verify_code) return 0;
276 if((int)ptr+((*ptr<<8)>>6)+8==(int)verify_code_ds) return 0;
280 // get source that block at addr was compiled from (host pointers)
281 static void get_bounds(void *addr, u_char **start, u_char **end)
286 // get from literal pool
287 assert((*ptr&0xFFFF0000)==0xe59f0000);
289 u_int source=*(u_int*)((void *)ptr+offset+8);
291 //assert((*ptr&0xFFFF0000)==0xe59f0000);
293 //u_int copy=*(u_int*)((void *)ptr+offset+8);
295 assert((*ptr&0xFFFF0000)==0xe59f0000);
297 u_int len=*(u_int*)((void *)ptr+offset+8);
302 assert((*ptr&0xFFF00000)==0xe3000000);
303 u_int source=(ptr[0]&0xFFF)+((ptr[0]>>4)&0xF000)+((ptr[2]<<16)&0xFFF0000)+((ptr[2]<<12)&0xF0000000);
304 //u_int copy=(ptr[1]&0xFFF)+((ptr[1]>>4)&0xF000)+((ptr[3]<<16)&0xFFF0000)+((ptr[3]<<12)&0xF0000000);
305 u_int len=(ptr[4]&0xFFF)+((ptr[4]>>4)&0xF000);
308 if((*ptr&0xFF000000)!=0xeb000000) ptr++;
309 assert((*ptr&0xFF000000)==0xeb000000); // bl instruction
310 *start=(u_char *)source;
311 *end=(u_char *)source+len;
314 // Allocate a specific ARM register.
315 static void alloc_arm_reg(struct regstat *cur,int i,signed char reg,int hr)
320 // see if it's already allocated (and dealloc it)
321 for(n=0;n<HOST_REGS;n++)
323 if(n!=EXCLUDE_REG&&cur->regmap[n]==reg) {
324 dirty=(cur->dirty>>n)&1;
330 cur->dirty&=~(1<<hr);
331 cur->dirty|=dirty<<hr;
332 cur->isconst&=~(1<<hr);
335 // Alloc cycle count into dedicated register
336 static void alloc_cc(struct regstat *cur,int i)
338 alloc_arm_reg(cur,i,CCREG,HOST_CCREG);
343 static unused char regname[16][4] = {
361 static void output_w32(u_int word)
363 *((u_int *)out)=word;
367 static u_int rd_rn_rm(u_int rd, u_int rn, u_int rm)
372 return((rn<<16)|(rd<<12)|rm);
375 static u_int rd_rn_imm_shift(u_int rd, u_int rn, u_int imm, u_int shift)
380 assert((shift&1)==0);
381 return((rn<<16)|(rd<<12)|(((32-shift)&30)<<7)|imm);
384 static u_int genimm(u_int imm,u_int *encoded)
392 *encoded=((i&30)<<7)|imm;
395 imm=(imm>>2)|(imm<<30);i-=2;
400 static void genimm_checked(u_int imm,u_int *encoded)
402 u_int ret=genimm(imm,encoded);
407 static u_int genjmp(u_int addr)
409 if (addr < 3) return 0; // a branch that will be patched later
410 int offset = addr-(int)out-8;
411 if (offset < -33554432 || offset >= 33554432) {
412 SysPrintf("genjmp: out of range: %08x\n", offset);
416 return ((u_int)offset>>2)&0xffffff;
419 static unused void emit_breakpoint(void)
421 assem_debug("bkpt #0\n");
422 //output_w32(0xe1200070);
423 output_w32(0xe7f001f0);
426 static void emit_mov(int rs,int rt)
428 assem_debug("mov %s,%s\n",regname[rt],regname[rs]);
429 output_w32(0xe1a00000|rd_rn_rm(rt,0,rs));
432 static void emit_movs(int rs,int rt)
434 assem_debug("movs %s,%s\n",regname[rt],regname[rs]);
435 output_w32(0xe1b00000|rd_rn_rm(rt,0,rs));
438 static void emit_add(int rs1,int rs2,int rt)
440 assem_debug("add %s,%s,%s\n",regname[rt],regname[rs1],regname[rs2]);
441 output_w32(0xe0800000|rd_rn_rm(rt,rs1,rs2));
444 static void emit_adds(int rs1,int rs2,int rt)
446 assem_debug("adds %s,%s,%s\n",regname[rt],regname[rs1],regname[rs2]);
447 output_w32(0xe0900000|rd_rn_rm(rt,rs1,rs2));
449 #define emit_adds_ptr emit_adds
451 static void emit_adcs(int rs1,int rs2,int rt)
453 assem_debug("adcs %s,%s,%s\n",regname[rt],regname[rs1],regname[rs2]);
454 output_w32(0xe0b00000|rd_rn_rm(rt,rs1,rs2));
457 static void emit_neg(int rs, int rt)
459 assem_debug("rsb %s,%s,#0\n",regname[rt],regname[rs]);
460 output_w32(0xe2600000|rd_rn_rm(rt,rs,0));
463 static void emit_sub(int rs1,int rs2,int rt)
465 assem_debug("sub %s,%s,%s\n",regname[rt],regname[rs1],regname[rs2]);
466 output_w32(0xe0400000|rd_rn_rm(rt,rs1,rs2));
469 static void emit_zeroreg(int rt)
471 assem_debug("mov %s,#0\n",regname[rt]);
472 output_w32(0xe3a00000|rd_rn_rm(rt,0,0));
475 static void emit_loadlp(u_int imm,u_int rt)
477 add_literal((int)out,imm);
478 assem_debug("ldr %s,pc+? [=%x]\n",regname[rt],imm);
479 output_w32(0xe5900000|rd_rn_rm(rt,15,0));
482 static void emit_movw(u_int imm,u_int rt)
485 assem_debug("movw %s,#%d (0x%x)\n",regname[rt],imm,imm);
486 output_w32(0xe3000000|rd_rn_rm(rt,0,0)|(imm&0xfff)|((imm<<4)&0xf0000));
489 static void emit_movt(u_int imm,u_int rt)
491 assem_debug("movt %s,#%d (0x%x)\n",regname[rt],imm&0xffff0000,imm&0xffff0000);
492 output_w32(0xe3400000|rd_rn_rm(rt,0,0)|((imm>>16)&0xfff)|((imm>>12)&0xf0000));
495 static void emit_movimm(u_int imm,u_int rt)
498 if(genimm(imm,&armval)) {
499 assem_debug("mov %s,#%d\n",regname[rt],imm);
500 output_w32(0xe3a00000|rd_rn_rm(rt,0,0)|armval);
501 }else if(genimm(~imm,&armval)) {
502 assem_debug("mvn %s,#%d\n",regname[rt],imm);
503 output_w32(0xe3e00000|rd_rn_rm(rt,0,0)|armval);
504 }else if(imm<65536) {
506 assem_debug("mov %s,#%d\n",regname[rt],imm&0xFF00);
507 output_w32(0xe3a00000|rd_rn_imm_shift(rt,0,imm>>8,8));
508 assem_debug("add %s,%s,#%d\n",regname[rt],regname[rt],imm&0xFF);
509 output_w32(0xe2800000|rd_rn_imm_shift(rt,rt,imm&0xff,0));
517 emit_movw(imm&0x0000FFFF,rt);
518 emit_movt(imm&0xFFFF0000,rt);
523 static void emit_pcreladdr(u_int rt)
525 assem_debug("add %s,pc,#?\n",regname[rt]);
526 output_w32(0xe2800000|rd_rn_rm(rt,15,0));
529 static void emit_loadreg(int r, int hr)
532 SysPrintf("64bit load in 32bit mode!\n");
539 int addr = (int)&psxRegs.GPR.r[r];
541 //case HIREG: addr = &hi; break;
542 //case LOREG: addr = &lo; break;
543 case CCREG: addr = (int)&cycle_count; break;
544 case CSREG: addr = (int)&Status; break;
545 case INVCP: addr = (int)&invc_ptr; break;
546 default: assert(r < 34); break;
548 u_int offset = addr-(u_int)&dynarec_local;
550 assem_debug("ldr %s,fp+%d\n",regname[hr],offset);
551 output_w32(0xe5900000|rd_rn_rm(hr,FP,0)|offset);
555 static void emit_storereg(int r, int hr)
558 SysPrintf("64bit store in 32bit mode!\n");
562 int addr = (int)&psxRegs.GPR.r[r];
564 //case HIREG: addr = &hi; break;
565 //case LOREG: addr = &lo; break;
566 case CCREG: addr = (int)&cycle_count; break;
567 default: assert(r < 34); break;
569 u_int offset = addr-(u_int)&dynarec_local;
571 assem_debug("str %s,fp+%d\n",regname[hr],offset);
572 output_w32(0xe5800000|rd_rn_rm(hr,FP,0)|offset);
575 static void emit_test(int rs, int rt)
577 assem_debug("tst %s,%s\n",regname[rs],regname[rt]);
578 output_w32(0xe1100000|rd_rn_rm(0,rs,rt));
581 static void emit_testimm(int rs,int imm)
584 assem_debug("tst %s,#%d\n",regname[rs],imm);
585 genimm_checked(imm,&armval);
586 output_w32(0xe3100000|rd_rn_rm(0,rs,0)|armval);
589 static void emit_testeqimm(int rs,int imm)
592 assem_debug("tsteq %s,$%d\n",regname[rs],imm);
593 genimm_checked(imm,&armval);
594 output_w32(0x03100000|rd_rn_rm(0,rs,0)|armval);
597 static void emit_not(int rs,int rt)
599 assem_debug("mvn %s,%s\n",regname[rt],regname[rs]);
600 output_w32(0xe1e00000|rd_rn_rm(rt,0,rs));
603 static void emit_and(u_int rs1,u_int rs2,u_int rt)
605 assem_debug("and %s,%s,%s\n",regname[rt],regname[rs1],regname[rs2]);
606 output_w32(0xe0000000|rd_rn_rm(rt,rs1,rs2));
609 static void emit_or(u_int rs1,u_int rs2,u_int rt)
611 assem_debug("orr %s,%s,%s\n",regname[rt],regname[rs1],regname[rs2]);
612 output_w32(0xe1800000|rd_rn_rm(rt,rs1,rs2));
615 static void emit_orrshl_imm(u_int rs,u_int imm,u_int rt)
620 assem_debug("orr %s,%s,%s,lsl #%d\n",regname[rt],regname[rt],regname[rs],imm);
621 output_w32(0xe1800000|rd_rn_rm(rt,rt,rs)|(imm<<7));
624 static void emit_orrshr_imm(u_int rs,u_int imm,u_int rt)
629 assem_debug("orr %s,%s,%s,lsr #%d\n",regname[rt],regname[rt],regname[rs],imm);
630 output_w32(0xe1800020|rd_rn_rm(rt,rt,rs)|(imm<<7));
633 static void emit_xor(u_int rs1,u_int rs2,u_int rt)
635 assem_debug("eor %s,%s,%s\n",regname[rt],regname[rs1],regname[rs2]);
636 output_w32(0xe0200000|rd_rn_rm(rt,rs1,rs2));
639 static void emit_xorsar_imm(u_int rs1,u_int rs2,u_int imm,u_int rt)
641 assem_debug("eor %s,%s,%s,asr #%d\n",regname[rt],regname[rs1],regname[rs2],imm);
642 output_w32(0xe0200040|rd_rn_rm(rt,rs1,rs2)|(imm<<7));
645 static void emit_addimm(u_int rs,int imm,u_int rt)
651 if(genimm(imm,&armval)) {
652 assem_debug("add %s,%s,#%d\n",regname[rt],regname[rs],imm);
653 output_w32(0xe2800000|rd_rn_rm(rt,rs,0)|armval);
654 }else if(genimm(-imm,&armval)) {
655 assem_debug("sub %s,%s,#%d\n",regname[rt],regname[rs],-imm);
656 output_w32(0xe2400000|rd_rn_rm(rt,rs,0)|armval);
658 }else if(rt!=rs&&(u_int)imm<65536) {
659 emit_movw(imm&0x0000ffff,rt);
661 }else if(rt!=rs&&(u_int)-imm<65536) {
662 emit_movw(-imm&0x0000ffff,rt);
665 }else if((u_int)-imm<65536) {
666 assem_debug("sub %s,%s,#%d\n",regname[rt],regname[rs],(-imm)&0xFF00);
667 assem_debug("sub %s,%s,#%d\n",regname[rt],regname[rt],(-imm)&0xFF);
668 output_w32(0xe2400000|rd_rn_imm_shift(rt,rs,(-imm)>>8,8));
669 output_w32(0xe2400000|rd_rn_imm_shift(rt,rt,(-imm)&0xff,0));
672 int shift = (ffs(imm) - 1) & ~1;
673 int imm8 = imm & (0xff << shift);
674 genimm_checked(imm8,&armval);
675 assem_debug("add %s,%s,#0x%x\n",regname[rt],regname[rs],imm8);
676 output_w32(0xe2800000|rd_rn_rm(rt,rs,0)|armval);
683 else if(rs!=rt) emit_mov(rs,rt);
686 static void emit_addimm_and_set_flags(int imm,int rt)
688 assert(imm>-65536&&imm<65536);
690 if(genimm(imm,&armval)) {
691 assem_debug("adds %s,%s,#%d\n",regname[rt],regname[rt],imm);
692 output_w32(0xe2900000|rd_rn_rm(rt,rt,0)|armval);
693 }else if(genimm(-imm,&armval)) {
694 assem_debug("subs %s,%s,#%d\n",regname[rt],regname[rt],imm);
695 output_w32(0xe2500000|rd_rn_rm(rt,rt,0)|armval);
697 assem_debug("sub %s,%s,#%d\n",regname[rt],regname[rt],(-imm)&0xFF00);
698 assem_debug("subs %s,%s,#%d\n",regname[rt],regname[rt],(-imm)&0xFF);
699 output_w32(0xe2400000|rd_rn_imm_shift(rt,rt,(-imm)>>8,8));
700 output_w32(0xe2500000|rd_rn_imm_shift(rt,rt,(-imm)&0xff,0));
702 assem_debug("add %s,%s,#%d\n",regname[rt],regname[rt],imm&0xFF00);
703 assem_debug("adds %s,%s,#%d\n",regname[rt],regname[rt],imm&0xFF);
704 output_w32(0xe2800000|rd_rn_imm_shift(rt,rt,imm>>8,8));
705 output_w32(0xe2900000|rd_rn_imm_shift(rt,rt,imm&0xff,0));
709 static void emit_addimm_no_flags(u_int imm,u_int rt)
711 emit_addimm(rt,imm,rt);
714 static void emit_addnop(u_int r)
717 assem_debug("add %s,%s,#0 (nop)\n",regname[r],regname[r]);
718 output_w32(0xe2800000|rd_rn_rm(r,r,0));
721 static void emit_andimm(int rs,int imm,int rt)
726 }else if(genimm(imm,&armval)) {
727 assem_debug("and %s,%s,#%d\n",regname[rt],regname[rs],imm);
728 output_w32(0xe2000000|rd_rn_rm(rt,rs,0)|armval);
729 }else if(genimm(~imm,&armval)) {
730 assem_debug("bic %s,%s,#%d\n",regname[rt],regname[rs],imm);
731 output_w32(0xe3c00000|rd_rn_rm(rt,rs,0)|armval);
732 }else if(imm==65535) {
734 assem_debug("bic %s,%s,#FF000000\n",regname[rt],regname[rs]);
735 output_w32(0xe3c00000|rd_rn_rm(rt,rs,0)|0x4FF);
736 assem_debug("bic %s,%s,#00FF0000\n",regname[rt],regname[rt]);
737 output_w32(0xe3c00000|rd_rn_rm(rt,rt,0)|0x8FF);
739 assem_debug("uxth %s,%s\n",regname[rt],regname[rs]);
740 output_w32(0xe6ff0070|rd_rn_rm(rt,0,rs));
743 assert(imm>0&&imm<65535);
745 assem_debug("mov r14,#%d\n",imm&0xFF00);
746 output_w32(0xe3a00000|rd_rn_imm_shift(HOST_TEMPREG,0,imm>>8,8));
747 assem_debug("add r14,r14,#%d\n",imm&0xFF);
748 output_w32(0xe2800000|rd_rn_imm_shift(HOST_TEMPREG,HOST_TEMPREG,imm&0xff,0));
750 emit_movw(imm,HOST_TEMPREG);
752 assem_debug("and %s,%s,r14\n",regname[rt],regname[rs]);
753 output_w32(0xe0000000|rd_rn_rm(rt,rs,HOST_TEMPREG));
757 static void emit_orimm(int rs,int imm,int rt)
761 if(rs!=rt) emit_mov(rs,rt);
762 }else if(genimm(imm,&armval)) {
763 assem_debug("orr %s,%s,#%d\n",regname[rt],regname[rs],imm);
764 output_w32(0xe3800000|rd_rn_rm(rt,rs,0)|armval);
766 assert(imm>0&&imm<65536);
767 assem_debug("orr %s,%s,#%d\n",regname[rt],regname[rs],imm&0xFF00);
768 assem_debug("orr %s,%s,#%d\n",regname[rt],regname[rs],imm&0xFF);
769 output_w32(0xe3800000|rd_rn_imm_shift(rt,rs,imm>>8,8));
770 output_w32(0xe3800000|rd_rn_imm_shift(rt,rt,imm&0xff,0));
774 static void emit_xorimm(int rs,int imm,int rt)
778 if(rs!=rt) emit_mov(rs,rt);
779 }else if(genimm(imm,&armval)) {
780 assem_debug("eor %s,%s,#%d\n",regname[rt],regname[rs],imm);
781 output_w32(0xe2200000|rd_rn_rm(rt,rs,0)|armval);
783 assert(imm>0&&imm<65536);
784 assem_debug("eor %s,%s,#%d\n",regname[rt],regname[rs],imm&0xFF00);
785 assem_debug("eor %s,%s,#%d\n",regname[rt],regname[rs],imm&0xFF);
786 output_w32(0xe2200000|rd_rn_imm_shift(rt,rs,imm>>8,8));
787 output_w32(0xe2200000|rd_rn_imm_shift(rt,rt,imm&0xff,0));
791 static void emit_shlimm(int rs,u_int imm,int rt)
796 assem_debug("lsl %s,%s,#%d\n",regname[rt],regname[rs],imm);
797 output_w32(0xe1a00000|rd_rn_rm(rt,0,rs)|(imm<<7));
800 static void emit_lsls_imm(int rs,int imm,int rt)
804 assem_debug("lsls %s,%s,#%d\n",regname[rt],regname[rs],imm);
805 output_w32(0xe1b00000|rd_rn_rm(rt,0,rs)|(imm<<7));
808 static unused void emit_lslpls_imm(int rs,int imm,int rt)
812 assem_debug("lslpls %s,%s,#%d\n",regname[rt],regname[rs],imm);
813 output_w32(0x51b00000|rd_rn_rm(rt,0,rs)|(imm<<7));
816 static void emit_shrimm(int rs,u_int imm,int rt)
820 assem_debug("lsr %s,%s,#%d\n",regname[rt],regname[rs],imm);
821 output_w32(0xe1a00000|rd_rn_rm(rt,0,rs)|0x20|(imm<<7));
824 static void emit_sarimm(int rs,u_int imm,int rt)
828 assem_debug("asr %s,%s,#%d\n",regname[rt],regname[rs],imm);
829 output_w32(0xe1a00000|rd_rn_rm(rt,0,rs)|0x40|(imm<<7));
832 static void emit_rorimm(int rs,u_int imm,int rt)
836 assem_debug("ror %s,%s,#%d\n",regname[rt],regname[rs],imm);
837 output_w32(0xe1a00000|rd_rn_rm(rt,0,rs)|0x60|(imm<<7));
840 static void emit_signextend16(int rs,int rt)
843 emit_shlimm(rs,16,rt);
844 emit_sarimm(rt,16,rt);
846 assem_debug("sxth %s,%s\n",regname[rt],regname[rs]);
847 output_w32(0xe6bf0070|rd_rn_rm(rt,0,rs));
851 static void emit_signextend8(int rs,int rt)
854 emit_shlimm(rs,24,rt);
855 emit_sarimm(rt,24,rt);
857 assem_debug("sxtb %s,%s\n",regname[rt],regname[rs]);
858 output_w32(0xe6af0070|rd_rn_rm(rt,0,rs));
862 static void emit_shl(u_int rs,u_int shift,u_int rt)
868 assem_debug("lsl %s,%s,%s\n",regname[rt],regname[rs],regname[shift]);
869 output_w32(0xe1a00000|rd_rn_rm(rt,0,rs)|0x10|(shift<<8));
872 static void emit_shr(u_int rs,u_int shift,u_int rt)
877 assem_debug("lsr %s,%s,%s\n",regname[rt],regname[rs],regname[shift]);
878 output_w32(0xe1a00000|rd_rn_rm(rt,0,rs)|0x30|(shift<<8));
881 static void emit_sar(u_int rs,u_int shift,u_int rt)
886 assem_debug("asr %s,%s,%s\n",regname[rt],regname[rs],regname[shift]);
887 output_w32(0xe1a00000|rd_rn_rm(rt,0,rs)|0x50|(shift<<8));
890 static unused void emit_orrshl(u_int rs,u_int shift,u_int rt)
895 assem_debug("orr %s,%s,%s,lsl %s\n",regname[rt],regname[rt],regname[rs],regname[shift]);
896 output_w32(0xe1800000|rd_rn_rm(rt,rt,rs)|0x10|(shift<<8));
899 static unused void emit_orrshr(u_int rs,u_int shift,u_int rt)
904 assem_debug("orr %s,%s,%s,lsr %s\n",regname[rt],regname[rt],regname[rs],regname[shift]);
905 output_w32(0xe1800000|rd_rn_rm(rt,rt,rs)|0x30|(shift<<8));
908 static void emit_cmpimm(int rs,int imm)
911 if(genimm(imm,&armval)) {
912 assem_debug("cmp %s,#%d\n",regname[rs],imm);
913 output_w32(0xe3500000|rd_rn_rm(0,rs,0)|armval);
914 }else if(genimm(-imm,&armval)) {
915 assem_debug("cmn %s,#%d\n",regname[rs],imm);
916 output_w32(0xe3700000|rd_rn_rm(0,rs,0)|armval);
919 emit_movimm(imm,HOST_TEMPREG);
920 assem_debug("cmp %s,r14\n",regname[rs]);
921 output_w32(0xe1500000|rd_rn_rm(0,rs,HOST_TEMPREG));
924 emit_movimm(-imm,HOST_TEMPREG);
925 assem_debug("cmn %s,r14\n",regname[rs]);
926 output_w32(0xe1700000|rd_rn_rm(0,rs,HOST_TEMPREG));
930 static void emit_cmovne_imm(int imm,int rt)
932 assem_debug("movne %s,#%d\n",regname[rt],imm);
934 genimm_checked(imm,&armval);
935 output_w32(0x13a00000|rd_rn_rm(rt,0,0)|armval);
938 static void emit_cmovl_imm(int imm,int rt)
940 assem_debug("movlt %s,#%d\n",regname[rt],imm);
942 genimm_checked(imm,&armval);
943 output_w32(0xb3a00000|rd_rn_rm(rt,0,0)|armval);
946 static void emit_cmovb_imm(int imm,int rt)
948 assem_debug("movcc %s,#%d\n",regname[rt],imm);
950 genimm_checked(imm,&armval);
951 output_w32(0x33a00000|rd_rn_rm(rt,0,0)|armval);
954 static void emit_cmovae_imm(int imm,int rt)
956 assem_debug("movcs %s,#%d\n",regname[rt],imm);
958 genimm_checked(imm,&armval);
959 output_w32(0x23a00000|rd_rn_rm(rt,0,0)|armval);
962 static void emit_cmovne_reg(int rs,int rt)
964 assem_debug("movne %s,%s\n",regname[rt],regname[rs]);
965 output_w32(0x11a00000|rd_rn_rm(rt,0,rs));
968 static void emit_cmovl_reg(int rs,int rt)
970 assem_debug("movlt %s,%s\n",regname[rt],regname[rs]);
971 output_w32(0xb1a00000|rd_rn_rm(rt,0,rs));
974 static void emit_cmovb_reg(int rs,int rt)
976 assem_debug("movcc %s,%s\n",regname[rt],regname[rs]);
977 output_w32(0x31a00000|rd_rn_rm(rt,0,rs));
980 static void emit_cmovs_reg(int rs,int rt)
982 assem_debug("movmi %s,%s\n",regname[rt],regname[rs]);
983 output_w32(0x41a00000|rd_rn_rm(rt,0,rs));
986 static void emit_slti32(int rs,int imm,int rt)
988 if(rs!=rt) emit_zeroreg(rt);
990 if(rs==rt) emit_movimm(0,rt);
991 emit_cmovl_imm(1,rt);
994 static void emit_sltiu32(int rs,int imm,int rt)
996 if(rs!=rt) emit_zeroreg(rt);
998 if(rs==rt) emit_movimm(0,rt);
999 emit_cmovb_imm(1,rt);
1002 static void emit_cmp(int rs,int rt)
1004 assem_debug("cmp %s,%s\n",regname[rs],regname[rt]);
1005 output_w32(0xe1500000|rd_rn_rm(0,rs,rt));
1008 static void emit_set_gz32(int rs, int rt)
1010 //assem_debug("set_gz32\n");
1013 emit_cmovl_imm(0,rt);
1016 static void emit_set_nz32(int rs, int rt)
1018 //assem_debug("set_nz32\n");
1019 if(rs!=rt) emit_movs(rs,rt);
1020 else emit_test(rs,rs);
1021 emit_cmovne_imm(1,rt);
1024 static void emit_set_if_less32(int rs1, int rs2, int rt)
1026 //assem_debug("set if less (%%%s,%%%s),%%%s\n",regname[rs1],regname[rs2],regname[rt]);
1027 if(rs1!=rt&&rs2!=rt) emit_zeroreg(rt);
1029 if(rs1==rt||rs2==rt) emit_movimm(0,rt);
1030 emit_cmovl_imm(1,rt);
1033 static void emit_set_if_carry32(int rs1, int rs2, int rt)
1035 //assem_debug("set if carry (%%%s,%%%s),%%%s\n",regname[rs1],regname[rs2],regname[rt]);
1036 if(rs1!=rt&&rs2!=rt) emit_zeroreg(rt);
1038 if(rs1==rt||rs2==rt) emit_movimm(0,rt);
1039 emit_cmovb_imm(1,rt);
1042 static int can_jump_or_call(const void *a)
1044 intptr_t offset = (u_char *)a - out - 8;
1045 return (-33554432 <= offset && offset < 33554432);
1048 static void emit_call(const void *a_)
1051 assem_debug("bl %x (%x+%x)%s\n",a,(int)out,a-(int)out-8,func_name(a_));
1052 u_int offset=genjmp(a);
1053 output_w32(0xeb000000|offset);
1056 static void emit_jmp(const void *a_)
1059 assem_debug("b %x (%x+%x)%s\n",a,(int)out,a-(int)out-8,func_name(a_));
1060 u_int offset=genjmp(a);
1061 output_w32(0xea000000|offset);
1064 static void emit_jne(const void *a_)
1067 assem_debug("bne %x\n",a);
1068 u_int offset=genjmp(a);
1069 output_w32(0x1a000000|offset);
1072 static void emit_jeq(const void *a_)
1075 assem_debug("beq %x\n",a);
1076 u_int offset=genjmp(a);
1077 output_w32(0x0a000000|offset);
1080 static void emit_js(const void *a_)
1083 assem_debug("bmi %x\n",a);
1084 u_int offset=genjmp(a);
1085 output_w32(0x4a000000|offset);
1088 static void emit_jns(const void *a_)
1091 assem_debug("bpl %x\n",a);
1092 u_int offset=genjmp(a);
1093 output_w32(0x5a000000|offset);
1096 static void emit_jl(const void *a_)
1099 assem_debug("blt %x\n",a);
1100 u_int offset=genjmp(a);
1101 output_w32(0xba000000|offset);
1104 static void emit_jge(const void *a_)
1107 assem_debug("bge %x\n",a);
1108 u_int offset=genjmp(a);
1109 output_w32(0xaa000000|offset);
1112 static void emit_jno(const void *a_)
1115 assem_debug("bvc %x\n",a);
1116 u_int offset=genjmp(a);
1117 output_w32(0x7a000000|offset);
1120 static void emit_jc(const void *a_)
1123 assem_debug("bcs %x\n",a);
1124 u_int offset=genjmp(a);
1125 output_w32(0x2a000000|offset);
1128 static void emit_jcc(const void *a_)
1131 assem_debug("bcc %x\n",a);
1132 u_int offset=genjmp(a);
1133 output_w32(0x3a000000|offset);
1136 static unused void emit_callreg(u_int r)
1139 assem_debug("blx %s\n",regname[r]);
1140 output_w32(0xe12fff30|r);
1143 static void emit_jmpreg(u_int r)
1145 assem_debug("mov pc,%s\n",regname[r]);
1146 output_w32(0xe1a00000|rd_rn_rm(15,0,r));
1149 static void emit_ret(void)
1154 static void emit_readword_indexed(int offset, int rs, int rt)
1156 assert(offset>-4096&&offset<4096);
1157 assem_debug("ldr %s,%s+%d\n",regname[rt],regname[rs],offset);
1159 output_w32(0xe5900000|rd_rn_rm(rt,rs,0)|offset);
1161 output_w32(0xe5100000|rd_rn_rm(rt,rs,0)|(-offset));
1165 static void emit_readword_dualindexedx4(int rs1, int rs2, int rt)
1167 assem_debug("ldr %s,%s,%s lsl #2\n",regname[rt],regname[rs1],regname[rs2]);
1168 output_w32(0xe7900000|rd_rn_rm(rt,rs1,rs2)|0x100);
1170 #define emit_readptr_dualindexedx_ptrlen emit_readword_dualindexedx4
1172 static void emit_ldr_dualindexed(int rs1, int rs2, int rt)
1174 assem_debug("ldr %s,%s,%s\n",regname[rt],regname[rs1],regname[rs2]);
1175 output_w32(0xe7900000|rd_rn_rm(rt,rs1,rs2));
1178 static void emit_ldrcc_dualindexed(int rs1, int rs2, int rt)
1180 assem_debug("ldrcc %s,%s,%s\n",regname[rt],regname[rs1],regname[rs2]);
1181 output_w32(0x37900000|rd_rn_rm(rt,rs1,rs2));
1184 static void emit_ldrccb_dualindexed(int rs1, int rs2, int rt)
1186 assem_debug("ldrccb %s,%s,%s\n",regname[rt],regname[rs1],regname[rs2]);
1187 output_w32(0x37d00000|rd_rn_rm(rt,rs1,rs2));
1190 static void emit_ldrccsb_dualindexed(int rs1, int rs2, int rt)
1192 assem_debug("ldrccsb %s,%s,%s\n",regname[rt],regname[rs1],regname[rs2]);
1193 output_w32(0x319000d0|rd_rn_rm(rt,rs1,rs2));
1196 static void emit_ldrcch_dualindexed(int rs1, int rs2, int rt)
1198 assem_debug("ldrcch %s,%s,%s\n",regname[rt],regname[rs1],regname[rs2]);
1199 output_w32(0x319000b0|rd_rn_rm(rt,rs1,rs2));
1202 static void emit_ldrccsh_dualindexed(int rs1, int rs2, int rt)
1204 assem_debug("ldrccsh %s,%s,%s\n",regname[rt],regname[rs1],regname[rs2]);
1205 output_w32(0x319000f0|rd_rn_rm(rt,rs1,rs2));
1208 static void emit_movsbl_indexed(int offset, int rs, int rt)
1210 assert(offset>-256&&offset<256);
1211 assem_debug("ldrsb %s,%s+%d\n",regname[rt],regname[rs],offset);
1213 output_w32(0xe1d000d0|rd_rn_rm(rt,rs,0)|((offset<<4)&0xf00)|(offset&0xf));
1215 output_w32(0xe15000d0|rd_rn_rm(rt,rs,0)|(((-offset)<<4)&0xf00)|((-offset)&0xf));
1219 static void emit_movswl_indexed(int offset, int rs, int rt)
1221 assert(offset>-256&&offset<256);
1222 assem_debug("ldrsh %s,%s+%d\n",regname[rt],regname[rs],offset);
1224 output_w32(0xe1d000f0|rd_rn_rm(rt,rs,0)|((offset<<4)&0xf00)|(offset&0xf));
1226 output_w32(0xe15000f0|rd_rn_rm(rt,rs,0)|(((-offset)<<4)&0xf00)|((-offset)&0xf));
1230 static void emit_movzbl_indexed(int offset, int rs, int rt)
1232 assert(offset>-4096&&offset<4096);
1233 assem_debug("ldrb %s,%s+%d\n",regname[rt],regname[rs],offset);
1235 output_w32(0xe5d00000|rd_rn_rm(rt,rs,0)|offset);
1237 output_w32(0xe5500000|rd_rn_rm(rt,rs,0)|(-offset));
1241 static void emit_movzwl_indexed(int offset, int rs, int rt)
1243 assert(offset>-256&&offset<256);
1244 assem_debug("ldrh %s,%s+%d\n",regname[rt],regname[rs],offset);
1246 output_w32(0xe1d000b0|rd_rn_rm(rt,rs,0)|((offset<<4)&0xf00)|(offset&0xf));
1248 output_w32(0xe15000b0|rd_rn_rm(rt,rs,0)|(((-offset)<<4)&0xf00)|((-offset)&0xf));
1252 static void emit_ldrd(int offset, int rs, int rt)
1254 assert(offset>-256&&offset<256);
1255 assem_debug("ldrd %s,%s+%d\n",regname[rt],regname[rs],offset);
1257 output_w32(0xe1c000d0|rd_rn_rm(rt,rs,0)|((offset<<4)&0xf00)|(offset&0xf));
1259 output_w32(0xe14000d0|rd_rn_rm(rt,rs,0)|(((-offset)<<4)&0xf00)|((-offset)&0xf));
1263 static void emit_readword(void *addr, int rt)
1265 uintptr_t offset = (u_char *)addr - (u_char *)&dynarec_local;
1266 assert(offset<4096);
1267 assem_debug("ldr %s,fp+%d\n",regname[rt],offset);
1268 output_w32(0xe5900000|rd_rn_rm(rt,FP,0)|offset);
1270 #define emit_readptr emit_readword
1272 static void emit_writeword_indexed(int rt, int offset, int rs)
1274 assert(offset>-4096&&offset<4096);
1275 assem_debug("str %s,%s+%d\n",regname[rt],regname[rs],offset);
1277 output_w32(0xe5800000|rd_rn_rm(rt,rs,0)|offset);
1279 output_w32(0xe5000000|rd_rn_rm(rt,rs,0)|(-offset));
1283 static void emit_writehword_indexed(int rt, int offset, int rs)
1285 assert(offset>-256&&offset<256);
1286 assem_debug("strh %s,%s+%d\n",regname[rt],regname[rs],offset);
1288 output_w32(0xe1c000b0|rd_rn_rm(rt,rs,0)|((offset<<4)&0xf00)|(offset&0xf));
1290 output_w32(0xe14000b0|rd_rn_rm(rt,rs,0)|(((-offset)<<4)&0xf00)|((-offset)&0xf));
1294 static void emit_writebyte_indexed(int rt, int offset, int rs)
1296 assert(offset>-4096&&offset<4096);
1297 assem_debug("strb %s,%s+%d\n",regname[rt],regname[rs],offset);
1299 output_w32(0xe5c00000|rd_rn_rm(rt,rs,0)|offset);
1301 output_w32(0xe5400000|rd_rn_rm(rt,rs,0)|(-offset));
1305 static void emit_strcc_dualindexed(int rs1, int rs2, int rt)
1307 assem_debug("strcc %s,%s,%s\n",regname[rt],regname[rs1],regname[rs2]);
1308 output_w32(0x37800000|rd_rn_rm(rt,rs1,rs2));
1311 static void emit_strccb_dualindexed(int rs1, int rs2, int rt)
1313 assem_debug("strccb %s,%s,%s\n",regname[rt],regname[rs1],regname[rs2]);
1314 output_w32(0x37c00000|rd_rn_rm(rt,rs1,rs2));
1317 static void emit_strcch_dualindexed(int rs1, int rs2, int rt)
1319 assem_debug("strcch %s,%s,%s\n",regname[rt],regname[rs1],regname[rs2]);
1320 output_w32(0x318000b0|rd_rn_rm(rt,rs1,rs2));
1323 static void emit_writeword(int rt, void *addr)
1325 uintptr_t offset = (u_char *)addr - (u_char *)&dynarec_local;
1326 assert(offset<4096);
1327 assem_debug("str %s,fp+%d\n",regname[rt],offset);
1328 output_w32(0xe5800000|rd_rn_rm(rt,FP,0)|offset);
1331 static void emit_umull(u_int rs1, u_int rs2, u_int hi, u_int lo)
1333 assem_debug("umull %s, %s, %s, %s\n",regname[lo],regname[hi],regname[rs1],regname[rs2]);
1338 output_w32(0xe0800090|(hi<<16)|(lo<<12)|(rs2<<8)|rs1);
1341 static void emit_smull(u_int rs1, u_int rs2, u_int hi, u_int lo)
1343 assem_debug("smull %s, %s, %s, %s\n",regname[lo],regname[hi],regname[rs1],regname[rs2]);
1348 output_w32(0xe0c00090|(hi<<16)|(lo<<12)|(rs2<<8)|rs1);
1351 static void emit_clz(int rs,int rt)
1353 assem_debug("clz %s,%s\n",regname[rt],regname[rs]);
1354 output_w32(0xe16f0f10|rd_rn_rm(rt,0,rs));
1357 static void emit_subcs(int rs1,int rs2,int rt)
1359 assem_debug("subcs %s,%s,%s\n",regname[rt],regname[rs1],regname[rs2]);
1360 output_w32(0x20400000|rd_rn_rm(rt,rs1,rs2));
1363 static void emit_shrcc_imm(int rs,u_int imm,int rt)
1367 assem_debug("lsrcc %s,%s,#%d\n",regname[rt],regname[rs],imm);
1368 output_w32(0x31a00000|rd_rn_rm(rt,0,rs)|0x20|(imm<<7));
1371 static void emit_shrne_imm(int rs,u_int imm,int rt)
1375 assem_debug("lsrne %s,%s,#%d\n",regname[rt],regname[rs],imm);
1376 output_w32(0x11a00000|rd_rn_rm(rt,0,rs)|0x20|(imm<<7));
1379 static void emit_negmi(int rs, int rt)
1381 assem_debug("rsbmi %s,%s,#0\n",regname[rt],regname[rs]);
1382 output_w32(0x42600000|rd_rn_rm(rt,rs,0));
1385 static void emit_negsmi(int rs, int rt)
1387 assem_debug("rsbsmi %s,%s,#0\n",regname[rt],regname[rs]);
1388 output_w32(0x42700000|rd_rn_rm(rt,rs,0));
1391 static void emit_bic_lsl(u_int rs1,u_int rs2,u_int shift,u_int rt)
1393 assem_debug("bic %s,%s,%s lsl %s\n",regname[rt],regname[rs1],regname[rs2],regname[shift]);
1394 output_w32(0xe1C00000|rd_rn_rm(rt,rs1,rs2)|0x10|(shift<<8));
1397 static void emit_bic_lsr(u_int rs1,u_int rs2,u_int shift,u_int rt)
1399 assem_debug("bic %s,%s,%s lsr %s\n",regname[rt],regname[rs1],regname[rs2],regname[shift]);
1400 output_w32(0xe1C00000|rd_rn_rm(rt,rs1,rs2)|0x30|(shift<<8));
1403 static void emit_teq(int rs, int rt)
1405 assem_debug("teq %s,%s\n",regname[rs],regname[rt]);
1406 output_w32(0xe1300000|rd_rn_rm(0,rs,rt));
1409 static unused void emit_rsbimm(int rs, int imm, int rt)
1412 genimm_checked(imm,&armval);
1413 assem_debug("rsb %s,%s,#%d\n",regname[rt],regname[rs],imm);
1414 output_w32(0xe2600000|rd_rn_rm(rt,rs,0)|armval);
1417 // Conditionally select one of two immediates, optimizing for small code size
1418 // This will only be called if HAVE_CMOV_IMM is defined
1419 static void emit_cmov2imm_e_ne_compact(int imm1,int imm2,u_int rt)
1422 if(genimm(imm2-imm1,&armval)) {
1423 emit_movimm(imm1,rt);
1424 assem_debug("addne %s,%s,#%d\n",regname[rt],regname[rt],imm2-imm1);
1425 output_w32(0x12800000|rd_rn_rm(rt,rt,0)|armval);
1426 }else if(genimm(imm1-imm2,&armval)) {
1427 emit_movimm(imm1,rt);
1428 assem_debug("subne %s,%s,#%d\n",regname[rt],regname[rt],imm1-imm2);
1429 output_w32(0x12400000|rd_rn_rm(rt,rt,0)|armval);
1433 emit_movimm(imm1,rt);
1434 add_literal((int)out,imm2);
1435 assem_debug("ldrne %s,pc+? [=%x]\n",regname[rt],imm2);
1436 output_w32(0x15900000|rd_rn_rm(rt,15,0));
1438 emit_movw(imm1&0x0000FFFF,rt);
1439 if((imm1&0xFFFF)!=(imm2&0xFFFF)) {
1440 assem_debug("movwne %s,#%d (0x%x)\n",regname[rt],imm2&0xFFFF,imm2&0xFFFF);
1441 output_w32(0x13000000|rd_rn_rm(rt,0,0)|(imm2&0xfff)|((imm2<<4)&0xf0000));
1443 emit_movt(imm1&0xFFFF0000,rt);
1444 if((imm1&0xFFFF0000)!=(imm2&0xFFFF0000)) {
1445 assem_debug("movtne %s,#%d (0x%x)\n",regname[rt],imm2&0xffff0000,imm2&0xffff0000);
1446 output_w32(0x13400000|rd_rn_rm(rt,0,0)|((imm2>>16)&0xfff)|((imm2>>12)&0xf0000));
1452 // special case for checking invalid_code
1453 static void emit_cmpmem_indexedsr12_reg(int base,int r,int imm)
1455 assert(imm<128&&imm>=0);
1457 assem_debug("ldrb lr,%s,%s lsr #12\n",regname[base],regname[r]);
1458 output_w32(0xe7d00000|rd_rn_rm(HOST_TEMPREG,base,r)|0x620);
1459 emit_cmpimm(HOST_TEMPREG,imm);
1462 static void emit_callne(int a)
1464 assem_debug("blne %x\n",a);
1465 u_int offset=genjmp(a);
1466 output_w32(0x1b000000|offset);
1469 // Used to preload hash table entries
1470 static unused void emit_prefetchreg(int r)
1472 assem_debug("pld %s\n",regname[r]);
1473 output_w32(0xf5d0f000|rd_rn_rm(0,r,0));
1476 // Special case for mini_ht
1477 static void emit_ldreq_indexed(int rs, u_int offset, int rt)
1479 assert(offset<4096);
1480 assem_debug("ldreq %s,[%s, #%d]\n",regname[rt],regname[rs],offset);
1481 output_w32(0x05900000|rd_rn_rm(rt,rs,0)|offset);
1484 static void emit_orrne_imm(int rs,int imm,int rt)
1487 genimm_checked(imm,&armval);
1488 assem_debug("orrne %s,%s,#%d\n",regname[rt],regname[rs],imm);
1489 output_w32(0x13800000|rd_rn_rm(rt,rs,0)|armval);
1492 static void emit_andne_imm(int rs,int imm,int rt)
1495 genimm_checked(imm,&armval);
1496 assem_debug("andne %s,%s,#%d\n",regname[rt],regname[rs],imm);
1497 output_w32(0x12000000|rd_rn_rm(rt,rs,0)|armval);
1500 static unused void emit_addpl_imm(int rs,int imm,int rt)
1503 genimm_checked(imm,&armval);
1504 assem_debug("addpl %s,%s,#%d\n",regname[rt],regname[rs],imm);
1505 output_w32(0x52800000|rd_rn_rm(rt,rs,0)|armval);
1508 static void emit_jno_unlikely(int a)
1511 assem_debug("addvc pc,pc,#? (%x)\n",/*a-(int)out-8,*/a);
1512 output_w32(0x72800000|rd_rn_rm(15,15,0));
1515 static void save_regs_all(u_int reglist)
1518 if(!reglist) return;
1519 assem_debug("stmia fp,{");
1522 assem_debug("r%d,",i);
1524 output_w32(0xe88b0000|reglist);
1527 static void restore_regs_all(u_int reglist)
1530 if(!reglist) return;
1531 assem_debug("ldmia fp,{");
1534 assem_debug("r%d,",i);
1536 output_w32(0xe89b0000|reglist);
1539 // Save registers before function call
1540 static void save_regs(u_int reglist)
1542 reglist&=CALLER_SAVE_REGS; // only save the caller-save registers, r0-r3, r12
1543 save_regs_all(reglist);
1546 // Restore registers after function call
1547 static void restore_regs(u_int reglist)
1549 reglist&=CALLER_SAVE_REGS;
1550 restore_regs_all(reglist);
1553 /* Stubs/epilogue */
1555 static void literal_pool(int n)
1557 if(!literalcount) return;
1559 if((int)out-literals[0][0]<4096-n) return;
1563 for(i=0;i<literalcount;i++)
1565 u_int l_addr=(u_int)out;
1568 if(literals[j][1]==literals[i][1]) {
1569 //printf("dup %08x\n",literals[i][1]);
1570 l_addr=literals[j][0];
1574 ptr=(u_int *)literals[i][0];
1575 u_int offset=l_addr-(u_int)ptr-8;
1576 assert(offset<4096);
1577 assert(!(offset&3));
1579 if(l_addr==(u_int)out) {
1580 literals[i][0]=l_addr; // remember for dupes
1581 output_w32(literals[i][1]);
1587 static void literal_pool_jumpover(int n)
1589 if(!literalcount) return;
1591 if((int)out-literals[0][0]<4096-n) return;
1596 set_jump_target(jaddr, out);
1599 // parsed by get_pointer, find_extjump_insn
1600 static void emit_extjump2(u_char *addr, u_int target, void *linker)
1602 u_char *ptr=(u_char *)addr;
1603 assert((ptr[3]&0x0e)==0xa);
1606 emit_loadlp(target,0);
1607 emit_loadlp((u_int)addr,1);
1608 assert(addr>=ndrc->translation_cache&&addr<(ndrc->translation_cache+(1<<TARGET_SIZE_2)));
1609 //assert((target>=0x80000000&&target<0x80800000)||(target>0xA4000000&&target<0xA4001000));
1611 #ifdef DEBUG_CYCLE_COUNT
1612 emit_readword(&last_count,ECX);
1613 emit_add(HOST_CCREG,ECX,HOST_CCREG);
1614 emit_readword(&next_interupt,ECX);
1615 emit_writeword(HOST_CCREG,&Count);
1616 emit_sub(HOST_CCREG,ECX,HOST_CCREG);
1617 emit_writeword(ECX,&last_count);
1620 emit_far_jump(linker);
1623 static void check_extjump2(void *src)
1626 assert((ptr[1] & 0x0fff0000) == 0x059f0000); // ldr rx, [pc, #ofs]
1630 // put rt_val into rt, potentially making use of rs with value rs_val
1631 static void emit_movimm_from(u_int rs_val,int rs,u_int rt_val,int rt)
1635 if(genimm(rt_val,&armval)) {
1636 assem_debug("mov %s,#%d\n",regname[rt],rt_val);
1637 output_w32(0xe3a00000|rd_rn_rm(rt,0,0)|armval);
1640 if(genimm(~rt_val,&armval)) {
1641 assem_debug("mvn %s,#%d\n",regname[rt],rt_val);
1642 output_w32(0xe3e00000|rd_rn_rm(rt,0,0)|armval);
1646 if(genimm(diff,&armval)) {
1647 assem_debug("add %s,%s,#%d\n",regname[rt],regname[rs],diff);
1648 output_w32(0xe2800000|rd_rn_rm(rt,rs,0)|armval);
1650 }else if(genimm(-diff,&armval)) {
1651 assem_debug("sub %s,%s,#%d\n",regname[rt],regname[rs],-diff);
1652 output_w32(0xe2400000|rd_rn_rm(rt,rs,0)|armval);
1655 emit_movimm(rt_val,rt);
1658 // return 1 if above function can do it's job cheaply
1659 static int is_similar_value(u_int v1,u_int v2)
1663 if(v1==v2) return 1;
1665 for(xs=diff;xs!=0&&(xs&3)==0;xs>>=2)
1667 if(xs<0x100) return 1;
1668 for(xs=-diff;xs!=0&&(xs&3)==0;xs>>=2)
1670 if(xs<0x100) return 1;
1674 static void mov_loadtype_adj(enum stub_type type,int rs,int rt)
1677 case LOADB_STUB: emit_signextend8(rs,rt); break;
1678 case LOADBU_STUB: emit_andimm(rs,0xff,rt); break;
1679 case LOADH_STUB: emit_signextend16(rs,rt); break;
1680 case LOADHU_STUB: emit_andimm(rs,0xffff,rt); break;
1681 case LOADW_STUB: if(rs!=rt) emit_mov(rs,rt); break;
1686 #include "pcsxmem.h"
1687 #include "pcsxmem_inline.c"
1689 static void do_readstub(int n)
1691 assem_debug("do_readstub %x\n",start+stubs[n].a*4);
1693 set_jump_target(stubs[n].addr, out);
1694 enum stub_type type=stubs[n].type;
1697 const struct regstat *i_regs=(struct regstat *)stubs[n].c;
1698 u_int reglist=stubs[n].e;
1699 const signed char *i_regmap=i_regs->regmap;
1701 if(dops[i].itype==C1LS||dops[i].itype==C2LS||dops[i].itype==LOADLR) {
1702 rt=get_reg(i_regmap,FTEMP);
1704 rt=get_reg(i_regmap,dops[i].rt1);
1707 int r,temp=-1,temp2=HOST_TEMPREG,regs_saved=0;
1708 void *restore_jump = NULL;
1710 for(r=0;r<=12;r++) {
1711 if(((1<<r)&0x13ff)&&((1<<r)®list)==0) {
1715 if(rt>=0&&dops[i].rt1!=0)
1722 if((regs_saved||(reglist&2)==0)&&temp!=1&&rs!=1)
1724 emit_readword(&mem_rtab,temp);
1725 emit_shrimm(rs,12,temp2);
1726 emit_readword_dualindexedx4(temp,temp2,temp2);
1727 emit_lsls_imm(temp2,1,temp2);
1728 if(dops[i].itype==C1LS||dops[i].itype==C2LS||(rt>=0&&dops[i].rt1!=0)) {
1730 case LOADB_STUB: emit_ldrccsb_dualindexed(temp2,rs,rt); break;
1731 case LOADBU_STUB: emit_ldrccb_dualindexed(temp2,rs,rt); break;
1732 case LOADH_STUB: emit_ldrccsh_dualindexed(temp2,rs,rt); break;
1733 case LOADHU_STUB: emit_ldrcch_dualindexed(temp2,rs,rt); break;
1734 case LOADW_STUB: emit_ldrcc_dualindexed(temp2,rs,rt); break;
1740 emit_jcc(0); // jump to reg restore
1743 emit_jcc(stubs[n].retaddr); // return address
1748 if(type==LOADB_STUB||type==LOADBU_STUB)
1749 handler=jump_handler_read8;
1750 if(type==LOADH_STUB||type==LOADHU_STUB)
1751 handler=jump_handler_read16;
1752 if(type==LOADW_STUB)
1753 handler=jump_handler_read32;
1755 pass_args(rs,temp2);
1756 int cc=get_reg(i_regmap,CCREG);
1758 emit_loadreg(CCREG,2);
1759 emit_addimm(cc<0?2:cc,CLOCK_ADJUST((int)stubs[n].d),2);
1760 emit_far_call(handler);
1761 if(dops[i].itype==C1LS||dops[i].itype==C2LS||(rt>=0&&dops[i].rt1!=0)) {
1762 mov_loadtype_adj(type,0,rt);
1765 set_jump_target(restore_jump, out);
1766 restore_regs(reglist);
1767 emit_jmp(stubs[n].retaddr); // return address
1770 static void inline_readstub(enum stub_type type, int i, u_int addr,
1771 const signed char regmap[], int target, int adj, u_int reglist)
1773 int rs=get_reg(regmap,target);
1774 int rt=get_reg(regmap,target);
1775 if(rs<0) rs=get_reg(regmap,-1);
1778 uintptr_t host_addr = 0;
1780 int cc=get_reg(regmap,CCREG);
1781 if(pcsx_direct_read(type,addr,CLOCK_ADJUST(adj),cc,target?rs:-1,rt))
1783 handler = get_direct_memhandler(mem_rtab, addr, type, &host_addr);
1784 if (handler == NULL) {
1785 if(rt<0||dops[i].rt1==0)
1788 emit_movimm_from(addr,rs,host_addr,rs);
1790 case LOADB_STUB: emit_movsbl_indexed(0,rs,rt); break;
1791 case LOADBU_STUB: emit_movzbl_indexed(0,rs,rt); break;
1792 case LOADH_STUB: emit_movswl_indexed(0,rs,rt); break;
1793 case LOADHU_STUB: emit_movzwl_indexed(0,rs,rt); break;
1794 case LOADW_STUB: emit_readword_indexed(0,rs,rt); break;
1799 is_dynamic=pcsxmem_is_handler_dynamic(addr);
1801 if(type==LOADB_STUB||type==LOADBU_STUB)
1802 handler=jump_handler_read8;
1803 if(type==LOADH_STUB||type==LOADHU_STUB)
1804 handler=jump_handler_read16;
1805 if(type==LOADW_STUB)
1806 handler=jump_handler_read32;
1809 // call a memhandler
1810 if(rt>=0&&dops[i].rt1!=0)
1814 emit_movimm(addr,0);
1818 emit_loadreg(CCREG,2);
1820 emit_movimm(((u_int *)mem_rtab)[addr>>12]<<1,1);
1821 emit_addimm(cc<0?2:cc,CLOCK_ADJUST(adj),2);
1824 emit_readword(&last_count,3);
1825 emit_addimm(cc<0?2:cc,CLOCK_ADJUST(adj),2);
1827 emit_writeword(2,&Count);
1830 emit_far_call(handler);
1832 if(rt>=0&&dops[i].rt1!=0) {
1834 case LOADB_STUB: emit_signextend8(0,rt); break;
1835 case LOADBU_STUB: emit_andimm(0,0xff,rt); break;
1836 case LOADH_STUB: emit_signextend16(0,rt); break;
1837 case LOADHU_STUB: emit_andimm(0,0xffff,rt); break;
1838 case LOADW_STUB: if(rt!=0) emit_mov(0,rt); break;
1842 restore_regs(reglist);
1845 static void do_writestub(int n)
1847 assem_debug("do_writestub %x\n",start+stubs[n].a*4);
1849 set_jump_target(stubs[n].addr, out);
1850 enum stub_type type=stubs[n].type;
1853 const struct regstat *i_regs=(struct regstat *)stubs[n].c;
1854 u_int reglist=stubs[n].e;
1855 const signed char *i_regmap=i_regs->regmap;
1857 if(dops[i].itype==C1LS||dops[i].itype==C2LS) {
1858 rt=get_reg(i_regmap,r=FTEMP);
1860 rt=get_reg(i_regmap,r=dops[i].rs2);
1864 int rtmp,temp=-1,temp2=HOST_TEMPREG,regs_saved=0;
1865 void *restore_jump = NULL;
1866 int reglist2=reglist|(1<<rs)|(1<<rt);
1867 for(rtmp=0;rtmp<=12;rtmp++) {
1868 if(((1<<rtmp)&0x13ff)&&((1<<rtmp)®list2)==0) {
1875 for(rtmp=0;rtmp<=3;rtmp++)
1876 if(rtmp!=rs&&rtmp!=rt)
1879 if((regs_saved||(reglist2&8)==0)&&temp!=3&&rs!=3&&rt!=3)
1881 emit_readword(&mem_wtab,temp);
1882 emit_shrimm(rs,12,temp2);
1883 emit_readword_dualindexedx4(temp,temp2,temp2);
1884 emit_lsls_imm(temp2,1,temp2);
1886 case STOREB_STUB: emit_strccb_dualindexed(temp2,rs,rt); break;
1887 case STOREH_STUB: emit_strcch_dualindexed(temp2,rs,rt); break;
1888 case STOREW_STUB: emit_strcc_dualindexed(temp2,rs,rt); break;
1893 emit_jcc(0); // jump to reg restore
1896 emit_jcc(stubs[n].retaddr); // return address (invcode check)
1902 case STOREB_STUB: handler=jump_handler_write8; break;
1903 case STOREH_STUB: handler=jump_handler_write16; break;
1904 case STOREW_STUB: handler=jump_handler_write32; break;
1911 int cc=get_reg(i_regmap,CCREG);
1913 emit_loadreg(CCREG,2);
1914 emit_addimm(cc<0?2:cc,CLOCK_ADJUST((int)stubs[n].d),2);
1915 // returns new cycle_count
1916 emit_far_call(handler);
1917 emit_addimm(0,-CLOCK_ADJUST((int)stubs[n].d),cc<0?2:cc);
1919 emit_storereg(CCREG,2);
1921 set_jump_target(restore_jump, out);
1922 restore_regs(reglist);
1923 emit_jmp(stubs[n].retaddr);
1926 static void inline_writestub(enum stub_type type, int i, u_int addr,
1927 const signed char regmap[], int target, int adj, u_int reglist)
1929 int rs=get_reg(regmap,-1);
1930 int rt=get_reg(regmap,target);
1933 uintptr_t host_addr = 0;
1934 void *handler = get_direct_memhandler(mem_wtab, addr, type, &host_addr);
1935 if (handler == NULL) {
1937 emit_movimm_from(addr,rs,host_addr,rs);
1939 case STOREB_STUB: emit_writebyte_indexed(rt,0,rs); break;
1940 case STOREH_STUB: emit_writehword_indexed(rt,0,rs); break;
1941 case STOREW_STUB: emit_writeword_indexed(rt,0,rs); break;
1947 // call a memhandler
1950 int cc=get_reg(regmap,CCREG);
1952 emit_loadreg(CCREG,2);
1953 emit_addimm(cc<0?2:cc,CLOCK_ADJUST(adj),2);
1954 emit_movimm((u_int)handler,3);
1955 // returns new cycle_count
1956 emit_far_call(jump_handler_write_h);
1957 emit_addimm(0,-CLOCK_ADJUST(adj),cc<0?2:cc);
1959 emit_storereg(CCREG,2);
1960 restore_regs(reglist);
1963 // this output is parsed by verify_dirty, get_bounds, isclean, get_clean_addr
1964 static void do_dirty_stub_emit_args(u_int arg0, u_int source_len)
1967 emit_loadlp((int)source, 1);
1968 emit_loadlp((int)copy, 2);
1969 emit_loadlp(source_len, 3);
1971 emit_movw(((u_int)source)&0x0000FFFF, 1);
1972 emit_movw(((u_int)copy)&0x0000FFFF, 2);
1973 emit_movt(((u_int)source)&0xFFFF0000, 1);
1974 emit_movt(((u_int)copy)&0xFFFF0000, 2);
1975 emit_movw(source_len, 3);
1977 emit_movimm(arg0, 0);
1980 static void *do_dirty_stub(int i, u_int source_len)
1982 assem_debug("do_dirty_stub %x\n",start+i*4);
1983 do_dirty_stub_emit_args(start + i*4, source_len);
1984 emit_far_call(verify_code);
1988 entry = instr_addr[i];
1989 emit_jmp(instr_addr[i]);
1993 static void do_dirty_stub_ds(u_int source_len)
1995 do_dirty_stub_emit_args(start + 1, source_len);
1996 emit_far_call(verify_code_ds);
2001 static void c2op_prologue(u_int op, int i, const struct regstat *i_regs, u_int reglist)
2003 save_regs_all(reglist);
2004 cop2_do_stall_check(op, i, i_regs, 0);
2007 emit_far_call(pcnt_gte_start);
2009 emit_addimm(FP, (u_char *)&psxRegs.CP2D.r[0] - (u_char *)&dynarec_local, 0); // cop2 regs
2012 static void c2op_epilogue(u_int op,u_int reglist)
2016 emit_far_call(pcnt_gte_end);
2018 restore_regs_all(reglist);
2021 static void c2op_call_MACtoIR(int lm,int need_flags)
2024 emit_far_call(lm?gteMACtoIR_lm1:gteMACtoIR_lm0);
2026 emit_far_call(lm?gteMACtoIR_lm1_nf:gteMACtoIR_lm0_nf);
2029 static void c2op_call_rgb_func(void *func,int lm,int need_ir,int need_flags)
2031 emit_far_call(func);
2032 // func is C code and trashes r0
2033 emit_addimm(FP,(int)&psxRegs.CP2D.r[0]-(int)&dynarec_local,0);
2034 if(need_flags||need_ir)
2035 c2op_call_MACtoIR(lm,need_flags);
2036 emit_far_call(need_flags?gteMACtoRGB:gteMACtoRGB_nf);
2039 static void c2op_assemble(int i, const struct regstat *i_regs)
2041 u_int c2op = source[i] & 0x3f;
2042 u_int reglist_full = get_host_reglist(i_regs->regmap);
2043 u_int reglist = reglist_full & CALLER_SAVE_REGS;
2044 int need_flags, need_ir;
2046 if (gte_handlers[c2op]!=NULL) {
2047 need_flags=!(gte_unneeded[i+1]>>63); // +1 because of how liveness detection works
2048 need_ir=(gte_unneeded[i+1]&0xe00)!=0xe00;
2049 assem_debug("gte op %08x, unneeded %016llx, need_flags %d, need_ir %d\n",
2050 source[i],gte_unneeded[i+1],need_flags,need_ir);
2051 if(HACK_ENABLED(NDHACK_GTE_NO_FLAGS))
2053 int shift = (source[i] >> 19) & 1;
2054 int lm = (source[i] >> 10) & 1;
2059 int v = (source[i] >> 15) & 3;
2060 int cv = (source[i] >> 13) & 3;
2061 int mx = (source[i] >> 17) & 3;
2062 reglist=reglist_full&(CALLER_SAVE_REGS|0xf0); // +{r4-r7}
2063 c2op_prologue(c2op,i,i_regs,reglist);
2064 /* r4,r5 = VXYZ(v) packed; r6 = &MX11(mx); r7 = &CV1(cv) */
2068 emit_movzwl_indexed(9*4,0,4); // gteIR
2069 emit_movzwl_indexed(10*4,0,6);
2070 emit_movzwl_indexed(11*4,0,5);
2071 emit_orrshl_imm(6,16,4);
2074 emit_addimm(0,32*4+mx*8*4,6);
2076 emit_readword(&zeromem_ptr,6);
2078 emit_addimm(0,32*4+(cv*8+5)*4,7);
2080 emit_readword(&zeromem_ptr,7);
2082 emit_movimm(source[i],1); // opcode
2083 emit_far_call(gteMVMVA_part_neon);
2086 emit_far_call(gteMACtoIR_flags_neon);
2090 emit_far_call((int)gteMVMVA_part_cv3sh12_arm);
2092 emit_movimm(shift,1);
2093 emit_far_call((int)(need_flags?gteMVMVA_part_arm:gteMVMVA_part_nf_arm));
2095 if(need_flags||need_ir)
2096 c2op_call_MACtoIR(lm,need_flags);
2098 #else /* if not HAVE_ARMV5 */
2099 c2op_prologue(c2op,i,i_regs,reglist);
2100 emit_movimm(source[i],1); // opcode
2101 emit_writeword(1,&psxRegs.code);
2102 emit_far_call(need_flags?gte_handlers[c2op]:gte_handlers_nf[c2op]);
2107 c2op_prologue(c2op,i,i_regs,reglist);
2108 emit_far_call(shift?gteOP_part_shift:gteOP_part_noshift);
2109 if(need_flags||need_ir) {
2110 emit_addimm(FP,(int)&psxRegs.CP2D.r[0]-(int)&dynarec_local,0);
2111 c2op_call_MACtoIR(lm,need_flags);
2115 c2op_prologue(c2op,i,i_regs,reglist);
2116 c2op_call_rgb_func(shift?gteDPCS_part_shift:gteDPCS_part_noshift,lm,need_ir,need_flags);
2119 c2op_prologue(c2op,i,i_regs,reglist);
2120 c2op_call_rgb_func(shift?gteINTPL_part_shift:gteINTPL_part_noshift,lm,need_ir,need_flags);
2123 c2op_prologue(c2op,i,i_regs,reglist);
2124 emit_far_call(shift?gteSQR_part_shift:gteSQR_part_noshift);
2125 if(need_flags||need_ir) {
2126 emit_addimm(FP,(int)&psxRegs.CP2D.r[0]-(int)&dynarec_local,0);
2127 c2op_call_MACtoIR(lm,need_flags);
2131 c2op_prologue(c2op,i,i_regs,reglist);
2132 c2op_call_rgb_func(gteDCPL_part,lm,need_ir,need_flags);
2135 c2op_prologue(c2op,i,i_regs,reglist);
2136 c2op_call_rgb_func(shift?gteGPF_part_shift:gteGPF_part_noshift,lm,need_ir,need_flags);
2139 c2op_prologue(c2op,i,i_regs,reglist);
2140 c2op_call_rgb_func(shift?gteGPL_part_shift:gteGPL_part_noshift,lm,need_ir,need_flags);
2144 c2op_prologue(c2op,i,i_regs,reglist);
2146 emit_movimm(source[i],1); // opcode
2147 emit_writeword(1,&psxRegs.code);
2149 emit_far_call(need_flags?gte_handlers[c2op]:gte_handlers_nf[c2op]);
2152 c2op_epilogue(c2op,reglist);
2156 static void c2op_ctc2_31_assemble(signed char sl, signed char temp)
2158 //value = value & 0x7ffff000;
2159 //if (value & 0x7f87e000) value |= 0x80000000;
2160 emit_shrimm(sl,12,temp);
2161 emit_shlimm(temp,12,temp);
2162 emit_testimm(temp,0x7f000000);
2163 emit_testeqimm(temp,0x00870000);
2164 emit_testeqimm(temp,0x0000e000);
2165 emit_orrne_imm(temp,0x80000000,temp);
2168 static void do_mfc2_31_one(u_int copr,signed char temp)
2170 emit_readword(®_cop2d[copr],temp);
2171 emit_testimm(temp,0x8000); // do we need this?
2172 emit_andne_imm(temp,0,temp);
2173 emit_cmpimm(temp,0xf80);
2174 emit_andimm(temp,0xf80,temp);
2175 emit_cmovae_imm(0xf80,temp);
2178 static void c2op_mfc2_29_assemble(signed char tl, signed char temp)
2181 host_tempreg_acquire();
2182 temp = HOST_TEMPREG;
2184 do_mfc2_31_one(9,temp);
2185 emit_shrimm(temp,7,tl);
2186 do_mfc2_31_one(10,temp);
2187 emit_orrshr_imm(temp,2,tl);
2188 do_mfc2_31_one(11,temp);
2189 emit_orrshl_imm(temp,3,tl);
2190 emit_writeword(tl,®_cop2d[29]);
2191 if (temp == HOST_TEMPREG)
2192 host_tempreg_release();
2195 static void multdiv_assemble_arm(int i,struct regstat *i_regs)
2202 // case 0x1D: DMULTU
2205 if(dops[i].rs1&&dops[i].rs2)
2207 if((dops[i].opcode2&4)==0) // 32-bit
2209 if(dops[i].opcode2==0x18) // MULT
2211 signed char m1=get_reg(i_regs->regmap,dops[i].rs1);
2212 signed char m2=get_reg(i_regs->regmap,dops[i].rs2);
2213 signed char hi=get_reg(i_regs->regmap,HIREG);
2214 signed char lo=get_reg(i_regs->regmap,LOREG);
2219 emit_smull(m1,m2,hi,lo);
2221 if(dops[i].opcode2==0x19) // MULTU
2223 signed char m1=get_reg(i_regs->regmap,dops[i].rs1);
2224 signed char m2=get_reg(i_regs->regmap,dops[i].rs2);
2225 signed char hi=get_reg(i_regs->regmap,HIREG);
2226 signed char lo=get_reg(i_regs->regmap,LOREG);
2231 emit_umull(m1,m2,hi,lo);
2233 if(dops[i].opcode2==0x1A) // DIV
2235 signed char d1=get_reg(i_regs->regmap,dops[i].rs1);
2236 signed char d2=get_reg(i_regs->regmap,dops[i].rs2);
2239 signed char quotient=get_reg(i_regs->regmap,LOREG);
2240 signed char remainder=get_reg(i_regs->regmap,HIREG);
2241 assert(quotient>=0);
2242 assert(remainder>=0);
2243 emit_movs(d1,remainder);
2244 emit_movimm(0xffffffff,quotient);
2245 emit_negmi(quotient,quotient); // .. quotient and ..
2246 emit_negmi(remainder,remainder); // .. remainder for div0 case (will be negated back after jump)
2247 emit_movs(d2,HOST_TEMPREG);
2248 emit_jeq(out+52); // Division by zero
2249 emit_negsmi(HOST_TEMPREG,HOST_TEMPREG);
2251 emit_clz(HOST_TEMPREG,quotient);
2252 emit_shl(HOST_TEMPREG,quotient,HOST_TEMPREG);
2254 emit_movimm(0,quotient);
2255 emit_addpl_imm(quotient,1,quotient);
2256 emit_lslpls_imm(HOST_TEMPREG,1,HOST_TEMPREG);
2259 emit_orimm(quotient,1<<31,quotient);
2260 emit_shr(quotient,quotient,quotient);
2261 emit_cmp(remainder,HOST_TEMPREG);
2262 emit_subcs(remainder,HOST_TEMPREG,remainder);
2263 emit_adcs(quotient,quotient,quotient);
2264 emit_shrimm(HOST_TEMPREG,1,HOST_TEMPREG);
2265 emit_jcc(out-16); // -4
2267 emit_negmi(quotient,quotient);
2269 emit_negmi(remainder,remainder);
2271 if(dops[i].opcode2==0x1B) // DIVU
2273 signed char d1=get_reg(i_regs->regmap,dops[i].rs1); // dividend
2274 signed char d2=get_reg(i_regs->regmap,dops[i].rs2); // divisor
2277 signed char quotient=get_reg(i_regs->regmap,LOREG);
2278 signed char remainder=get_reg(i_regs->regmap,HIREG);
2279 assert(quotient>=0);
2280 assert(remainder>=0);
2281 emit_mov(d1,remainder);
2282 emit_movimm(0xffffffff,quotient); // div0 case
2284 emit_jeq(out+40); // Division by zero
2286 emit_clz(d2,HOST_TEMPREG);
2287 emit_movimm(1<<31,quotient);
2288 emit_shl(d2,HOST_TEMPREG,d2);
2290 emit_movimm(0,HOST_TEMPREG);
2291 emit_addpl_imm(HOST_TEMPREG,1,HOST_TEMPREG);
2292 emit_lslpls_imm(d2,1,d2);
2294 emit_movimm(1<<31,quotient);
2296 emit_shr(quotient,HOST_TEMPREG,quotient);
2297 emit_cmp(remainder,d2);
2298 emit_subcs(remainder,d2,remainder);
2299 emit_adcs(quotient,quotient,quotient);
2300 emit_shrcc_imm(d2,1,d2);
2301 emit_jcc(out-16); // -4
2309 // Multiply by zero is zero.
2310 // MIPS does not have a divide by zero exception.
2311 // The result is undefined, we return zero.
2312 signed char hr=get_reg(i_regs->regmap,HIREG);
2313 signed char lr=get_reg(i_regs->regmap,LOREG);
2314 if(hr>=0) emit_zeroreg(hr);
2315 if(lr>=0) emit_zeroreg(lr);
2318 #define multdiv_assemble multdiv_assemble_arm
2320 static void do_jump_vaddr(int rs)
2322 emit_far_jump(jump_vaddr_reg[rs]);
2325 static void do_preload_rhash(int r) {
2326 // Don't need this for ARM. On x86, this puts the value 0xf8 into the
2327 // register. On ARM the hash can be done with a single instruction (below)
2330 static void do_preload_rhtbl(int ht) {
2331 emit_addimm(FP,(int)&mini_ht-(int)&dynarec_local,ht);
2334 static void do_rhash(int rs,int rh) {
2335 emit_andimm(rs,0xf8,rh);
2338 static void do_miniht_load(int ht,int rh) {
2339 assem_debug("ldr %s,[%s,%s]!\n",regname[rh],regname[ht],regname[rh]);
2340 output_w32(0xe7b00000|rd_rn_rm(rh,ht,rh));
2343 static void do_miniht_jump(int rs,int rh,int ht) {
2345 emit_ldreq_indexed(ht,4,15);
2346 #ifdef CORTEX_A8_BRANCH_PREDICTION_HACK
2354 static void do_miniht_insert(u_int return_address,int rt,int temp) {
2356 emit_movimm(return_address,rt); // PC into link register
2357 add_to_linker(out,return_address,1);
2358 emit_pcreladdr(temp);
2359 emit_writeword(rt,&mini_ht[(return_address&0xFF)>>3][0]);
2360 emit_writeword(temp,&mini_ht[(return_address&0xFF)>>3][1]);
2362 emit_movw(return_address&0x0000FFFF,rt);
2363 add_to_linker(out,return_address,1);
2364 emit_pcreladdr(temp);
2365 emit_writeword(temp,&mini_ht[(return_address&0xFF)>>3][1]);
2366 emit_movt(return_address&0xFFFF0000,rt);
2367 emit_writeword(rt,&mini_ht[(return_address&0xFF)>>3][0]);
2371 // CPU-architecture-specific initialization
2372 static void arch_init(void)
2374 uintptr_t diff = (u_char *)&ndrc->tramp.f - (u_char *)&ndrc->tramp.ops - 8;
2375 struct tramp_insns *ops = ndrc->tramp.ops;
2377 assert(!(diff & 3));
2378 assert(diff < 0x1000);
2379 start_tcache_write(ops, (u_char *)ops + sizeof(ndrc->tramp.ops));
2380 for (i = 0; i < ARRAY_SIZE(ndrc->tramp.ops); i++)
2381 ops[i].ldrpc = 0xe5900000 | rd_rn_rm(15,15,0) | diff; // ldr pc, [=val]
2382 end_tcache_write(ops, (u_char *)ops + sizeof(ndrc->tramp.ops));
2385 // vim:shiftwidth=2:expandtab