drc: initial cop2/gte implementation (works, mostly)
[pcsx_rearmed.git] / libpcsxcore / psxdma.h
1 /***************************************************************************
2  *   Copyright (C) 2007 Ryan Schultz, PCSX-df Team, PCSX team              *
3  *                                                                         *
4  *   This program is free software; you can redistribute it and/or modify  *
5  *   it under the terms of the GNU General Public License as published by  *
6  *   the Free Software Foundation; either version 2 of the License, or     *
7  *   (at your option) any later version.                                   *
8  *                                                                         *
9  *   This program is distributed in the hope that it will be useful,       *
10  *   but WITHOUT ANY WARRANTY; without even the implied warranty of        *
11  *   MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the         *
12  *   GNU General Public License for more details.                          *
13  *                                                                         *
14  *   You should have received a copy of the GNU General Public License     *
15  *   along with this program; if not, write to the                         *
16  *   Free Software Foundation, Inc.,                                       *
17  *   51 Franklin Street, Fifth Floor, Boston, MA 02111-1307 USA.           *
18  ***************************************************************************/
19
20 #ifndef __PSXDMA_H__
21 #define __PSXDMA_H__
22
23 #ifdef __cplusplus
24 extern "C" {
25 #endif
26
27 #include "psxcommon.h"
28 #include "r3000a.h"
29 #include "psxhw.h"
30 #include "psxmem.h"
31
32 #define GPUDMA_INT(eCycle) { \
33         psxRegs.interrupt |= 0x01000000; \
34         psxRegs.intCycle[3 + 24 + 1] = eCycle; \
35         psxRegs.intCycle[3 + 24] = psxRegs.cycle; \
36 }
37
38 #define SPUDMA_INT(eCycle) { \
39     psxRegs.interrupt |= 0x04000000; \
40     psxRegs.intCycle[1 + 24 + 1] = eCycle; \
41     psxRegs.intCycle[1 + 24] = psxRegs.cycle; \
42 }
43
44 #define MDECOUTDMA_INT(eCycle) { \
45         psxRegs.interrupt |= 0x02000000; \
46         psxRegs.intCycle[5 + 24 + 1] = eCycle; \
47         psxRegs.intCycle[5 + 24] = psxRegs.cycle; \
48 }
49
50 void psxDma2(u32 madr, u32 bcr, u32 chcr);
51 void psxDma3(u32 madr, u32 bcr, u32 chcr);
52 void psxDma4(u32 madr, u32 bcr, u32 chcr);
53 void psxDma6(u32 madr, u32 bcr, u32 chcr);
54 void gpuInterrupt();
55 void spuInterrupt();
56
57 #ifdef __cplusplus
58 }
59 #endif
60 #endif