drc: detect sw irqs properly
[pcsx_rearmed.git] / libpcsxcore / psxdma.h
1 /***************************************************************************
2  *   Copyright (C) 2007 Ryan Schultz, PCSX-df Team, PCSX team              *
3  *                                                                         *
4  *   This program is free software; you can redistribute it and/or modify  *
5  *   it under the terms of the GNU General Public License as published by  *
6  *   the Free Software Foundation; either version 2 of the License, or     *
7  *   (at your option) any later version.                                   *
8  *                                                                         *
9  *   This program is distributed in the hope that it will be useful,       *
10  *   but WITHOUT ANY WARRANTY; without even the implied warranty of        *
11  *   MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the         *
12  *   GNU General Public License for more details.                          *
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19
20 #ifndef __PSXDMA_H__
21 #define __PSXDMA_H__
22
23 #ifdef __cplusplus
24 extern "C" {
25 #endif
26
27 #include "psxcommon.h"
28 #include "r3000a.h"
29 #include "psxhw.h"
30 #include "psxmem.h"
31
32 #define GPUDMA_INT(eCycle) { \
33         psxRegs.interrupt |= (1 << PSXINT_GPUDMA); \
34         psxRegs.intCycle[PSXINT_GPUDMA].cycle = eCycle; \
35         psxRegs.intCycle[PSXINT_GPUDMA].sCycle = psxRegs.cycle; \
36         new_dyna_set_event(PSXINT_GPUDMA, eCycle); \
37 }
38
39 #define SPUDMA_INT(eCycle) { \
40         psxRegs.interrupt |= (1 << PSXINT_SPUDMA); \
41         psxRegs.intCycle[PSXINT_SPUDMA].cycle = eCycle; \
42         psxRegs.intCycle[PSXINT_SPUDMA].sCycle = psxRegs.cycle; \
43         new_dyna_set_event(PSXINT_SPUDMA, eCycle); \
44 }
45
46 #define MDECOUTDMA_INT(eCycle) { \
47         psxRegs.interrupt |= (1 << PSXINT_MDECOUTDMA); \
48         psxRegs.intCycle[PSXINT_MDECOUTDMA].cycle = eCycle; \
49         psxRegs.intCycle[PSXINT_MDECOUTDMA].sCycle = psxRegs.cycle; \
50         new_dyna_set_event(PSXINT_MDECOUTDMA, eCycle); \
51 }
52
53 #define MDECINDMA_INT(eCycle) { \
54         psxRegs.interrupt |= (1 << PSXINT_MDECINDMA); \
55         psxRegs.intCycle[PSXINT_MDECINDMA].cycle = eCycle; \
56         psxRegs.intCycle[PSXINT_MDECINDMA].sCycle = psxRegs.cycle; \
57         new_dyna_set_event(PSXINT_MDECINDMA, eCycle); \
58 }
59
60 #define GPUOTCDMA_INT(eCycle) { \
61         psxRegs.interrupt |= (1 << PSXINT_GPUOTCDMA); \
62         psxRegs.intCycle[PSXINT_GPUOTCDMA].cycle = eCycle; \
63         psxRegs.intCycle[PSXINT_GPUOTCDMA].sCycle = psxRegs.cycle; \
64         new_dyna_set_event(PSXINT_GPUOTCDMA, eCycle); \
65 }
66
67 #define CDRDMA_INT(eCycle) { \
68         psxRegs.interrupt |= (1 << PSXINT_CDRDMA); \
69         psxRegs.intCycle[PSXINT_CDRDMA].cycle = eCycle; \
70         psxRegs.intCycle[PSXINT_CDRDMA].sCycle = psxRegs.cycle; \
71         new_dyna_set_event(PSXINT_CDRDMA, eCycle); \
72 }
73
74 void psxDma2(u32 madr, u32 bcr, u32 chcr);
75 void psxDma3(u32 madr, u32 bcr, u32 chcr);
76 void psxDma4(u32 madr, u32 bcr, u32 chcr);
77 void psxDma6(u32 madr, u32 bcr, u32 chcr);
78 void gpuInterrupt();
79 void spuInterrupt();
80 void gpuotcInterrupt();
81
82 #ifdef __cplusplus
83 }
84 #endif
85 #endif