drc: don't read readmem_dword to r0 or on dummy reads

[pcsx_rearmed.git] / libpcsxcore / new_dynarec / assem_arm.c

diff --git a/libpcsxcore/new_dynarec/assem_arm.c b/libpcsxcore/new_dynarec/assem_arm.c
index 515f7c4..b6b856a 100644 (file)
--- a/libpcsxcore/new_dynarec/assem_arm.c
+++ b/libpcsxcore/new_dynarec/assem_arm.c
@@ -1003,6 +1003,15 @@ void emit_or_and_set_flags(int rs1,int rs2,int rt)
   output_w32(0xe1900000|rd_rn_rm(rt,rs1,rs2));
 }
 
+void emit_orrshr_imm(u_int rs,u_int imm,u_int rt)
+{
+  assert(rs<16);
+  assert(rt<16);
+  assert(imm<32);
+  assem_debug("orr %s,%s,%s,lsr #%d\n",regname[rt],regname[rt],regname[rs],imm);
+  output_w32(0xe1800020|rd_rn_rm(rt,rt,rs)|(imm<<7));
+}
+
 void emit_xor(u_int rs1,u_int rs2,u_int rt)
 {
   assem_debug("eor %s,%s,%s\n",regname[rt],regname[rs1],regname[rs2]);
@@ -1938,7 +1947,7 @@ void emit_writebyte(int rt, int addr)
 {
   u_int offset = addr-(u_int)&dynarec_local;
   assert(offset<4096);
-  assem_debug("str %s,fp+%d\n",regname[rt],offset);
+  assem_debug("strb %s,fp+%d\n",regname[rt],offset);
   output_w32(0xe5c00000|rd_rn_rm(rt,FP,0)|offset);
 }
 void emit_writeword_imm(int imm, int addr)
@@ -2554,14 +2563,11 @@ do_readstub(int n)
     rth=get_reg(i_regmap,rt1[i]|64);
     rt=get_reg(i_regmap,rt1[i]);
   }
-#ifdef PCSX
-  if(rt<0)
-    // assume forced dummy read
-    rt=get_reg(i_regmap,-1);
-#endif
   assert(rs>=0);
-  assert(rt>=0);
   if(addr<0) addr=rt;
+  if(addr<0)
+    // assume dummy read, no alloced reg
+    addr=get_reg(i_regmap,-1);
   assert(addr>=0);
   int ftable=0;
   if(type==LOADB_STUB||type==LOADBU_STUB)
@@ -2614,19 +2620,22 @@ do_readstub(int n)
   //if((cc=get_reg(regmap,CCREG))>=0) {
   //  emit_loadreg(CCREG,cc);
   //}
-  if(type==LOADB_STUB)
-    emit_movsbl((int)&readmem_dword,rt);
-  if(type==LOADBU_STUB)
-    emit_movzbl((int)&readmem_dword,rt);
-  if(type==LOADH_STUB)
-    emit_movswl((int)&readmem_dword,rt);
-  if(type==LOADHU_STUB)
-    emit_movzwl((int)&readmem_dword,rt);
-  if(type==LOADW_STUB)
-    emit_readword((int)&readmem_dword,rt);
-  if(type==LOADD_STUB) {
-    emit_readword((int)&readmem_dword,rt);
-    if(rth>=0) emit_readword(((int)&readmem_dword)+4,rth);
+  if(itype[i]==C1LS||itype[i]==C2LS||(rt>=0&&rt1[i]!=0)) {
+    assert(rt>=0);
+    if(type==LOADB_STUB)
+      emit_movsbl((int)&readmem_dword,rt);
+    if(type==LOADBU_STUB)
+      emit_movzbl((int)&readmem_dword,rt);
+    if(type==LOADH_STUB)
+      emit_movswl((int)&readmem_dword,rt);
+    if(type==LOADHU_STUB)
+      emit_movzwl((int)&readmem_dword,rt);
+    if(type==LOADW_STUB)
+      emit_readword((int)&readmem_dword,rt);
+    if(type==LOADD_STUB) {
+      emit_readword((int)&readmem_dword,rt);
+      if(rth>=0) emit_readword(((int)&readmem_dword)+4,rth);
+    }
   }
   emit_jmp(stubs[n][2]); // return address
 }
@@ -3463,6 +3472,16 @@ void cop0_assemble(int i,struct regstat *i_regs)
     if((source[i]&0x3f)==0x08) // TLBP
       emit_call((int)TLBP);
 #endif
+#ifdef PCSX
+    if((source[i]&0x3f)==0x10) // RFE
+    {
+      emit_readword((int)&Status,0);
+      emit_andimm(0,0x3c,1);
+      emit_andimm(0,~0xf,0);
+      emit_orrshr_imm(1,2,0);
+      emit_writeword(0,(int)&Status);
+    }
+#else
     if((source[i]&0x3f)==0x18) // ERET
     {
       int count=ccadj[i];
@@ -3470,6 +3489,7 @@ void cop0_assemble(int i,struct regstat *i_regs)
       emit_addimm(HOST_CCREG,CLOCK_DIVIDER*count,HOST_CCREG); // TODO: Should there be an extra cycle here?
       emit_jmp((int)jump_eret);
     }
+#endif
   }
 }