spu: rework synchronization

[pcsx_rearmed.git] / libpcsxcore / new_dynarec / assem_arm.h

diff --git a/libpcsxcore/new_dynarec/assem_arm.h b/libpcsxcore/new_dynarec/assem_arm.h
index 2d9efe1..2254638 100644 (file)
--- a/libpcsxcore/new_dynarec/assem_arm.h
+++ b/libpcsxcore/new_dynarec/assem_arm.h
@@ -17,7 +17,6 @@
 #define RAM_SIZE 0x200000
 
 #ifndef __ARM_ARCH_7A__
-#define ARMv5_ONLY
 //#undef CORTEX_A8_BRANCH_PREDICTION_HACK
 //#undef USE_MINI_HT
 #endif
@@ -66,5 +65,5 @@ extern char *invc_ptr;
 #define BASE_ADDR 0x1000000
 #else
 extern char translation_cache[1 << TARGET_SIZE_2];
-#define BASE_ADDR translation_cache
+#define BASE_ADDR (u_int)translation_cache
 #endif