drc: merge Ari64's patch: 11_reduce_invstub_memory_usage

[pcsx_rearmed.git] / libpcsxcore / new_dynarec / assem_arm.h

diff --git a/libpcsxcore/new_dynarec/assem_arm.h b/libpcsxcore/new_dynarec/assem_arm.h
index d97c0f2..a289aa1 100644 (file)
--- a/libpcsxcore/new_dynarec/assem_arm.h
+++ b/libpcsxcore/new_dynarec/assem_arm.h
@@ -8,10 +8,13 @@
 #define CORTEX_A8_BRANCH_PREDICTION_HACK 1
 #define USE_MINI_HT 1
 //#define REG_PREFETCH 1
 #define CORTEX_A8_BRANCH_PREDICTION_HACK 1
 #define USE_MINI_HT 1
 //#define REG_PREFETCH 1

+#define HAVE_CONDITIONAL_CALL 1

 #define DISABLE_TLB 1
 //#define MUPEN64
 #define FORCE32 1
 #define DISABLE_COP1 1
 #define DISABLE_TLB 1
 //#define MUPEN64
 #define FORCE32 1
 #define DISABLE_COP1 1

+#define PCSX 1
+#define RAM_SIZE 0x200000

 
 #ifdef FORCE32
 #define REG_SHIFT 2
 
 #ifdef FORCE32
 #define REG_SHIFT 2


@@ -45,7 +48,7 @@
 
 extern char *invc_ptr;
 
 
 extern char *invc_ptr;
 

-#define BASE_ADDR 0x2000000 // Code generator target address
+#define BASE_ADDR 0x1000000 // Code generator target address

 #define TARGET_SIZE_2 24 // 2^24 = 16 megabytes
 
 // This is defined in linkage_arm.s, but gcc -O3 likes this better
 #define TARGET_SIZE_2 24 // 2^24 = 16 megabytes
 
 // This is defined in linkage_arm.s, but gcc -O3 likes this better