#include "../psxmem.h"
#include "../psxhle.h"
+#define ARRAY_SIZE(x) (sizeof(x) / sizeof(x[0]))
+
//#define memprintf printf
#define memprintf(...)
//#define evprintf printf
#define evprintf(...)
char invalid_code[0x100000];
+u32 event_cycles[6];
void MTC0_()
{
pending_exception = 1; /* FIXME? */
}
+static void schedule_timeslice(void)
+{
+ u32 i, c = psxRegs.cycle;
+ s32 min, dif;
+
+ min = psxNextsCounter + psxNextCounter - c;
+ for (i = 0; i < ARRAY_SIZE(event_cycles); i++) {
+ dif = event_cycles[i] - c;
+ //evprintf(" ev %d\n", dif);
+ if (0 < dif && dif < min)
+ min = dif;
+ }
+ next_interupt = c + min;
+
+#if 0
+ static u32 cnt, last_cycle;
+ static u64 sum;
+ if (last_cycle) {
+ cnt++;
+ sum += psxRegs.cycle - last_cycle;
+ if ((cnt & 0xff) == 0)
+ printf("%u\n", (u32)(sum / cnt));
+ }
+ last_cycle = psxRegs.cycle;
+#endif
+}
+
void gen_interupt()
{
- evprintf("ari64_gen_interupt\n");
- evprintf(" +ge %08x, %d->%d\n", psxRegs.pc, psxRegs.cycle, next_interupt);
+ //evprintf("ari64_gen_interupt\n");
+ evprintf(" +ge %08x, %u->%u\n", psxRegs.pc, psxRegs.cycle, next_interupt);
#ifdef DRC_DBG
psxRegs.cycle += 2;
#endif
psxBranchTest();
- next_interupt = psxNextsCounter + psxNextCounter;
- evprintf(" -ge %08x, %d->%d\n", psxRegs.pc, psxRegs.cycle, next_interupt);
+ schedule_timeslice();
+
+ evprintf(" -ge %08x, %u->%u (%d)\n", psxRegs.pc, psxRegs.cycle,
+ next_interupt, next_interupt - psxRegs.cycle);
pending_exception = 1; /* FIXME */
}
new_dynarec_init();
- for (i = 0; i < sizeof(readmem) / sizeof(readmem[0]); i++) {
+ for (i = 0; i < ARRAY_SIZE(readmem); i++) {
readmemb[i] = read_mem8;
readmemh[i] = read_mem16;
readmem[i] = read_mem32;
writemem[i] = write_mem32;
}
- for (i = 0; i < sizeof(gte_handlers) / sizeof(gte_handlers[0]); i++)
+ for (i = 0; i < ARRAY_SIZE(gte_handlers); i++)
if (psxCP2[i] != psxNULL)
gte_handlers[i] = psxCP2[i];
static void ari64_reset()
{
- /* hmh */
printf("ari64_reset\n");
+ invalidate_all_pages();
+ pending_exception = 1;
}
static void ari64_execute()
{
- next_interupt = psxNextsCounter + psxNextCounter;
+ schedule_timeslice();
+
+ evprintf("ari64_execute %08x, %u->%u (%d)\n", psxRegs.pc,
+ psxRegs.cycle, next_interupt, next_interupt - psxRegs.cycle);
- evprintf("psxNextsCounter %d, psxNextCounter %d\n", psxNextsCounter, psxNextCounter);
- evprintf("ari64_execute %08x, %d->%d\n", psxRegs.pc, psxRegs.cycle, next_interupt);
new_dyna_start();
- evprintf("ari64_execute end %08x, %d->%d\n", psxRegs.pc, psxRegs.cycle, next_interupt);
+
+ evprintf("ari64_execute end %08x, %u->%u (%d)\n", psxRegs.pc,
+ psxRegs.cycle, next_interupt, next_interupt - psxRegs.cycle);
}
-static void ari64_clear(u32 Addr, u32 Size)
+static void ari64_clear(u32 addr, u32 size)
{
+ u32 start, end;
+
+ evprintf("ari64_clear %08x %04x\n", addr, size);
+
+ /* check for RAM mirrors */
+ if ((start & ~0xe0000000) < 0x200000) {
+ start &= ~0xe0000000;
+ start |= 0x80000000;
+ }
+
+ start = addr >> 12;
+ end = (addr + size) >> 12;
+
+ for (; start <= end; start++)
+ if (!invalid_code[start])
+ invalidate_block(start);
}
static void ari64_shutdown()
unsigned int address, readmem_word, word;
unsigned short hword;
unsigned char byte;
-int pending_exception;
+int pending_exception, stop;
unsigned int next_interupt;
void new_dynarec_init() {}
void new_dyna_start() {}
void new_dynarec_cleanup() {}
+void invalidate_all_pages() {}
+void invalidate_block(unsigned int block) {}
#endif
#ifdef DRC_DBG