#include "../psxmem.h"
#include "../psxhle.h"
+#define ARRAY_SIZE(x) (sizeof(x) / sizeof(x[0]))
+
//#define memprintf printf
#define memprintf(...)
//#define evprintf printf
#define evprintf(...)
char invalid_code[0x100000];
+u32 event_cycles[6];
void MTC0_()
{
pending_exception = 1; /* FIXME? */
}
+static void schedule_timeslice(void)
+{
+ u32 i, c = psxRegs.cycle;
+ s32 min, dif;
+
+ min = psxNextsCounter + psxNextCounter - c;
+ for (i = 0; i < ARRAY_SIZE(event_cycles); i++) {
+ dif = event_cycles[i] - c;
+ //evprintf(" ev %d\n", dif);
+ if (0 < dif && dif < min)
+ min = dif;
+ }
+ next_interupt = c + min;
+
+#if 0
+ static u32 cnt, last_cycle;
+ static u64 sum;
+ if (last_cycle) {
+ cnt++;
+ sum += psxRegs.cycle - last_cycle;
+ if ((cnt & 0xff) == 0)
+ printf("%u\n", (u32)(sum / cnt));
+ }
+ last_cycle = psxRegs.cycle;
+#endif
+}
+
void gen_interupt()
{
- evprintf("ari64_gen_interupt\n");
- evprintf(" +ge %08x, %d->%d\n", psxRegs.pc, psxRegs.cycle, next_interupt);
+ //evprintf("ari64_gen_interupt\n");
+ evprintf(" +ge %08x, %u->%u\n", psxRegs.pc, psxRegs.cycle, next_interupt);
#ifdef DRC_DBG
psxRegs.cycle += 2;
#endif
psxBranchTest();
- next_interupt = psxNextsCounter + psxNextCounter;
- evprintf(" -ge %08x, %d->%d\n", psxRegs.pc, psxRegs.cycle, next_interupt);
+ schedule_timeslice();
+
+ evprintf(" -ge %08x, %u->%u (%d)\n", psxRegs.pc, psxRegs.cycle,
+ next_interupt, next_interupt - psxRegs.cycle);
pending_exception = 1; /* FIXME */
}
new_dynarec_init();
- for (i = 0; i < sizeof(readmem) / sizeof(readmem[0]); i++) {
+ for (i = 0; i < ARRAY_SIZE(readmem); i++) {
readmemb[i] = read_mem8;
readmemh[i] = read_mem16;
readmem[i] = read_mem32;
writemem[i] = write_mem32;
}
- for (i = 0; i < sizeof(gte_handlers) / sizeof(gte_handlers[0]); i++)
+ for (i = 0; i < ARRAY_SIZE(gte_handlers); i++)
if (psxCP2[i] != psxNULL)
gte_handlers[i] = psxCP2[i];
- psxHLEt_addr = (void *)psxHLEt; // FIXME: rm
return 0;
}
static void ari64_reset()
{
- /* hmh */
printf("ari64_reset\n");
+ invalidate_all_pages();
+ pending_exception = 1;
}
static void ari64_execute()
{
- next_interupt = psxNextsCounter + psxNextCounter;
+ schedule_timeslice();
+
+ evprintf("ari64_execute %08x, %u->%u (%d)\n", psxRegs.pc,
+ psxRegs.cycle, next_interupt, next_interupt - psxRegs.cycle);
- evprintf("psxNextsCounter %d, psxNextCounter %d\n", psxNextsCounter, psxNextCounter);
- evprintf("ari64_execute %08x, %d->%d\n", psxRegs.pc, psxRegs.cycle, next_interupt);
new_dyna_start();
- evprintf("ari64_execute end %08x, %d->%d\n", psxRegs.pc, psxRegs.cycle, next_interupt);
+
+ evprintf("ari64_execute end %08x, %u->%u (%d)\n", psxRegs.pc,
+ psxRegs.cycle, next_interupt, next_interupt - psxRegs.cycle);
}
-static void ari64_clear(u32 Addr, u32 Size)
+static void ari64_clear(u32 addr, u32 size)
{
+ u32 start, end;
+
+ evprintf("ari64_clear %08x %04x\n", addr, size);
+
+ /* check for RAM mirrors */
+ if ((start & ~0xe0000000) < 0x200000) {
+ start &= ~0xe0000000;
+ start |= 0x80000000;
+ }
+
+ start = addr >> 12;
+ end = (addr + size) >> 12;
+
+ for (; start <= end; start++)
+ if (!invalid_code[start])
+ invalidate_block(start);
}
static void ari64_shutdown()
unsigned int address, readmem_word, word;
unsigned short hword;
unsigned char byte;
-int pending_exception;
+int pending_exception, stop;
unsigned int next_interupt;
-void *psxHLEt_addr;
void new_dynarec_init() {}
-int new_dyna_start() {}
+void new_dyna_start() {}
void new_dynarec_cleanup() {}
+void invalidate_all_pages() {}
+void invalidate_block(unsigned int block) {}
#endif
#ifdef DRC_DBG
static void dump_mem(const char *fname, void *mem, size_t size)
{
FILE *f1 = fopen(fname, "wb");
+ if (f1 == NULL)
+ f1 = fopen(strrchr(fname, '/') + 1, "wb");
fwrite(mem, 1, size, f1);
fclose(f1);
}
"PC", "code", "cycle", "interrupt",
};
+static struct {
+ int reg;
+ u32 val, val_expect;
+ u32 pc, cycle;
+} miss_log[64];
+static int miss_log_i;
+#define miss_log_len (sizeof(miss_log)/sizeof(miss_log[0]))
+#define miss_log_mask (miss_log_len-1)
+
+static void miss_log_add(int reg, u32 val, u32 val_expect, u32 pc, u32 cycle)
+{
+ miss_log[miss_log_i].reg = reg;
+ miss_log[miss_log_i].val = val;
+ miss_log[miss_log_i].val_expect = val_expect;
+ miss_log[miss_log_i].pc = pc;
+ miss_log[miss_log_i].cycle = cycle;
+ miss_log_i = (miss_log_i + 1) & miss_log_mask;
+}
+
void breakme() {}
void do_insn_cmp(void)
for (i = 0; i < offsetof(psxRegisters, intCycle) / 4; i++) {
if (allregs_p[i] != allregs_e[i]) {
- printf("bad %5s: %08x %08x, pc=%08x, cycle %u\n",
- regnames[i], allregs_p[i], allregs_e[i], psxRegs.pc, psxRegs.cycle);
+ miss_log_add(i, allregs_p[i], allregs_e[i], psxRegs.pc, psxRegs.cycle);
bad++;
}
}
}
if (psxRegs.pc == rregs.pc && bad < 6 && failcount < 32) {
- printf("-- %d\n", bad);
+ static int last_mcycle;
+ if (last_mcycle != psxRegs.cycle >> 20) {
+ printf("%u\n", psxRegs.cycle);
+ last_mcycle = psxRegs.cycle >> 20;
+ }
failcount++;
goto ok;
}
end:
+ for (i = 0; i < miss_log_len; i++, miss_log_i = (miss_log_i + 1) & miss_log_mask)
+ printf("bad %5s: %08x %08x, pc=%08x, cycle %u\n",
+ regnames[miss_log[miss_log_i].reg], miss_log[miss_log_i].val,
+ miss_log[miss_log_i].val_expect, miss_log[miss_log_i].pc, miss_log[miss_log_i].cycle);
+ printf("-- %d\n", bad);
+ for (i = 0; i < 8; i++)
+ printf("r%d=%08x r%2d=%08x r%2d=%08x r%2d=%08x\n", i, allregs_p[i],
+ i+8, allregs_p[i+8], i+16, allregs_p[i+16], i+24, allregs_p[i+23]);
printf("PC: %08x/%08x, cycle %u\n", psxRegs.pc, ppc, psxRegs.cycle);
dump_mem("/mnt/ntz/dev/pnd/tmp/psxram.dump", psxM, 0x200000);
dump_mem("/mnt/ntz/dev/pnd/tmp/psxregs.dump", psxH, 0x10000);
notaz.gp2x.de / pcsx_rearmed.git / blobdiff