#include "../psxmem.h"
#include "../psxhle.h"
+#define ARRAY_SIZE(x) (sizeof(x) / sizeof(x[0]))
+
//#define memprintf printf
#define memprintf(...)
//#define evprintf printf
#define evprintf(...)
char invalid_code[0x100000];
+u32 event_cycles[6];
void MTC0_()
{
void gen_interupt()
{
+ u32 c, min;
+ int i;
+
evprintf("ari64_gen_interupt\n");
evprintf(" +ge %08x, %d->%d\n", psxRegs.pc, psxRegs.cycle, next_interupt);
#ifdef DRC_DBG
psxBranchTest();
- next_interupt = psxNextsCounter + psxNextCounter;
+ min = psxNextsCounter + psxNextCounter;
+ for (i = 0; i < ARRAY_SIZE(event_cycles); i++) {
+ c = event_cycles[i];
+ evprintf(" ev %d\n", c - psxRegs.cycle);
+ if (psxRegs.cycle < c && c < min)
+ min = c;
+ }
+ next_interupt = min;
+
+ //next_interupt = psxNextsCounter + psxNextCounter;
evprintf(" -ge %08x, %d->%d\n", psxRegs.pc, psxRegs.cycle, next_interupt);
pending_exception = 1; /* FIXME */
new_dynarec_init();
- for (i = 0; i < sizeof(readmem) / sizeof(readmem[0]); i++) {
+ for (i = 0; i < ARRAY_SIZE(readmem); i++) {
readmemb[i] = read_mem8;
readmemh[i] = read_mem16;
readmem[i] = read_mem32;
writemem[i] = write_mem32;
}
- for (i = 0; i < sizeof(gte_handlers) / sizeof(gte_handlers[0]); i++)
+ for (i = 0; i < ARRAY_SIZE(gte_handlers); i++)
if (psxCP2[i] != psxNULL)
gte_handlers[i] = psxCP2[i];
- psxHLEt_addr = (void *)psxHLEt; // FIXME: rm
return 0;
}
unsigned char byte;
int pending_exception;
unsigned int next_interupt;
-void *psxHLEt_addr;
void new_dynarec_init() {}
-int new_dyna_start() {}
+void new_dyna_start() {}
void new_dynarec_cleanup() {}
#endif
static void dump_mem(const char *fname, void *mem, size_t size)
{
FILE *f1 = fopen(fname, "wb");
+ if (f1 == NULL)
+ f1 = fopen(strrchr(fname, '/') + 1, "wb");
fwrite(mem, 1, size, f1);
fclose(f1);
}
"PC", "code", "cycle", "interrupt",
};
+static struct {
+ int reg;
+ u32 val, val_expect;
+ u32 pc, cycle;
+} miss_log[64];
+static int miss_log_i;
+#define miss_log_len (sizeof(miss_log)/sizeof(miss_log[0]))
+#define miss_log_mask (miss_log_len-1)
+
+static void miss_log_add(int reg, u32 val, u32 val_expect, u32 pc, u32 cycle)
+{
+ miss_log[miss_log_i].reg = reg;
+ miss_log[miss_log_i].val = val;
+ miss_log[miss_log_i].val_expect = val_expect;
+ miss_log[miss_log_i].pc = pc;
+ miss_log[miss_log_i].cycle = cycle;
+ miss_log_i = (miss_log_i + 1) & miss_log_mask;
+}
+
void breakme() {}
void do_insn_cmp(void)
for (i = 0; i < offsetof(psxRegisters, intCycle) / 4; i++) {
if (allregs_p[i] != allregs_e[i]) {
- printf("bad %5s: %08x %08x, pc=%08x, cycle %u\n",
- regnames[i], allregs_p[i], allregs_e[i], psxRegs.pc, psxRegs.cycle);
+ miss_log_add(i, allregs_p[i], allregs_e[i], psxRegs.pc, psxRegs.cycle);
bad++;
}
}
}
if (psxRegs.pc == rregs.pc && bad < 6 && failcount < 32) {
- printf("-- %d\n", bad);
+ static int last_mcycle;
+ if (last_mcycle != psxRegs.cycle >> 20) {
+ printf("%u\n", psxRegs.cycle);
+ last_mcycle = psxRegs.cycle >> 20;
+ }
failcount++;
goto ok;
}
end:
+ for (i = 0; i < miss_log_len; i++, miss_log_i = (miss_log_i + 1) & miss_log_mask)
+ printf("bad %5s: %08x %08x, pc=%08x, cycle %u\n",
+ regnames[miss_log[miss_log_i].reg], miss_log[miss_log_i].val,
+ miss_log[miss_log_i].val_expect, miss_log[miss_log_i].pc, miss_log[miss_log_i].cycle);
+ printf("-- %d\n", bad);
+ for (i = 0; i < 8; i++)
+ printf("r%d=%08x r%2d=%08x r%2d=%08x r%2d=%08x\n", i, allregs_p[i],
+ i+8, allregs_p[i+8], i+16, allregs_p[i+16], i+24, allregs_p[i+23]);
printf("PC: %08x/%08x, cycle %u\n", psxRegs.pc, ppc, psxRegs.cycle);
dump_mem("/mnt/ntz/dev/pnd/tmp/psxram.dump", psxM, 0x200000);
dump_mem("/mnt/ntz/dev/pnd/tmp/psxregs.dump", psxH, 0x10000);