/*
- * (C) Gražvydas "notaz" Ignotas, 2010
+ * (C) Gražvydas "notaz" Ignotas, 2010-2011
*
* This work is licensed under the terms of GNU GPL version 2 or later.
* See the COPYING file in the top-level directory.
#include "../cdrom.h"
#include "../psxdma.h"
#include "../mdec.h"
+#include "../gte_arm.h"
+#include "../gte_neon.h"
+#define FLAGLESS
+#include "../gte.h"
#define ARRAY_SIZE(x) (sizeof(x) / sizeof(x[0]))
[PSXINT_SPUDMA] = spuInterrupt,
[PSXINT_MDECINDMA] = mdec0Interrupt,
[PSXINT_GPUOTCDMA] = gpuotcInterrupt,
+ [PSXINT_CDRDMA] = cdrDmaInterrupt,
+ [PSXINT_CDRLID] = cdrLidSeekInterrupt,
+ [PSXINT_CDRPLAY] = cdrPlayInterrupt,
};
/* local dupe of psxBranchTest, using event_cycles */
void gen_interupt()
{
evprintf(" +ge %08x, %u->%u\n", psxRegs.pc, psxRegs.cycle, next_interupt);
-#ifdef DRC_DBG
- psxRegs.cycle += 2;
-#endif
irq_test();
//psxBranchTest();
// from interpreter
extern void MTC0(int reg, u32 val);
-void pcsx_mtc0(u32 reg)
+void pcsx_mtc0(u32 reg, u32 val)
{
- evprintf("MTC0 %d #%x @%08x %u\n", reg, readmem_word, psxRegs.pc, psxRegs.cycle);
- MTC0(reg, readmem_word);
+ evprintf("MTC0 %d #%x @%08x %u\n", reg, val, psxRegs.pc, psxRegs.cycle);
+ MTC0(reg, val);
gen_interupt();
}
-void pcsx_mtc0_ds(u32 reg)
+void pcsx_mtc0_ds(u32 reg, u32 val)
{
- evprintf("MTC0 %d #%x @%08x %u\n", reg, readmem_word, psxRegs.pc, psxRegs.cycle);
- MTC0(reg, readmem_word);
+ evprintf("MTC0 %d #%x @%08x %u\n", reg, val, psxRegs.pc, psxRegs.cycle);
+ MTC0(reg, val);
}
void new_dyna_save(void)
void new_dyna_restore(void)
{
int i;
- for (i = 0; i < PSXINT_NEWDRC_CHECK; i++)
+ for (i = 0; i < PSXINT_COUNT; i++)
event_cycles[i] = psxRegs.intCycle[i].sCycle + psxRegs.intCycle[i].cycle;
+
+ new_dyna_pcsx_mem_load_state();
}
void *gte_handlers[64];
+void *gte_handlers_nf[64] = {
+ NULL , gteRTPS_nf , NULL , NULL , NULL , NULL , gteNCLIP_nf, NULL , // 00
+ NULL , NULL , NULL , NULL , gteOP_nf , NULL , NULL , NULL , // 08
+ gteDPCS_nf, gteINTPL_nf, gteMVMVA_nf, gteNCDS_nf, gteCDP_nf, NULL , gteNCDT_nf , NULL , // 10
+ NULL , NULL , NULL , gteNCCS_nf, gteCC_nf , NULL , gteNCS_nf , NULL , // 18
+ gteNCT_nf , NULL , NULL , NULL , NULL , NULL , NULL , NULL , // 20
+ gteSQR_nf , gteDCPL_nf , gteDPCT_nf , NULL , NULL , gteAVSZ3_nf, gteAVSZ4_nf, NULL , // 28
+ gteRTPT_nf, NULL , NULL , NULL , NULL , NULL , NULL , NULL , // 30
+ NULL , NULL , NULL , NULL , NULL , gteGPF_nf , gteGPL_nf , gteNCCT_nf, // 38
+};
+
+const char *gte_regnames[64] = {
+ NULL , "RTPS" , NULL , NULL , NULL , NULL , "NCLIP", NULL , // 00
+ NULL , NULL , NULL , NULL , "OP" , NULL , NULL , NULL , // 08
+ "DPCS", "INTPL", "MVMVA", "NCDS", "CDP", NULL , "NCDT" , NULL , // 10
+ NULL , NULL , NULL , "NCCS", "CC" , NULL , "NCS" , NULL , // 18
+ "NCT" , NULL , NULL , NULL , NULL , NULL , NULL , NULL , // 20
+ "SQR" , "DCPL" , "DPCT" , NULL , NULL , "AVSZ3", "AVSZ4", NULL , // 28
+ "RTPT", NULL , NULL , NULL , NULL , NULL , NULL , NULL , // 30
+ NULL , NULL , NULL , NULL , NULL , "GPF" , "GPL" , "NCCT", // 38
+};
+
/* from gte.txt.. not sure if this is any good. */
const char gte_cycletab[64] = {
/* 1 2 3 4 5 6 7 8 9 a b c d e f */
{
extern void (*psxCP2[64])();
extern void psxNULL();
- extern void *psxH_ptr;
size_t i;
new_dynarec_init();
if (psxCP2[i] != psxNULL)
gte_handlers[i] = psxCP2[i];
+#if !defined(DRC_DBG) && !defined(PCNT)
+#ifdef __arm__
+ gte_handlers[0x06] = gteNCLIP_arm;
+ gte_handlers_nf[0x01] = gteRTPS_nf_arm;
+ gte_handlers_nf[0x30] = gteRTPT_nf_arm;
+#endif
+#ifdef __ARM_NEON__
+ // compiler's _nf version is still a lot slower then neon
+ // _nf_arm RTPS is roughly the same, RTPT slower
+ gte_handlers[0x01] = gte_handlers_nf[0x01] = gteRTPS_neon;
+ gte_handlers[0x30] = gte_handlers_nf[0x30] = gteRTPT_neon;
+ gte_handlers[0x12] = gte_handlers_nf[0x12] = gteMVMVA_neon;
+#endif
+#endif
+#ifdef DRC_DBG
+ memcpy(gte_handlers_nf, gte_handlers, sizeof(gte_handlers_nf));
+#endif
psxH_ptr = psxH;
return 0;
printf("ari64_reset\n");
new_dyna_pcsx_mem_reset();
invalidate_all_pages();
+ new_dyna_restore();
pending_exception = 1;
}
-static void ari64_execute()
+// execute until predefined leave points
+// (HLE softcall exit and BIOS fastboot end)
+static void ari64_execute_until()
{
schedule_timeslice();
psxRegs.cycle, next_interupt, next_interupt - psxRegs.cycle);
}
+static void ari64_execute()
+{
+ while (!stop) {
+ ari64_execute_until();
+ evprintf("drc left @%08x\n", psxRegs.pc);
+ }
+}
+
static void ari64_clear(u32 addr, u32 size)
{
- u32 start, end;
+ u32 start, end, main_ram;
size *= 4; /* PCSX uses DMA units */
evprintf("ari64_clear %08x %04x\n", addr, size);
/* check for RAM mirrors */
- if ((addr & ~0xe0600000) < 0x200000) {
- addr &= ~0xe0600000;
- addr |= 0x80000000;
- }
+ main_ram = (addr & 0xffe00000) == 0x80000000;
start = addr >> 12;
end = (addr + size) >> 12;
for (; start <= end; start++)
- if (!invalid_code[start])
+ if (!main_ram || !invalid_code[start])
invalidate_block(start);
}
ari64_reset,
#if defined(__arm__)
ari64_execute,
- ari64_execute,
+ ari64_execute_until,
#else
intExecuteT,
intExecuteBlockT,
unsigned char byte;
int pending_exception, stop;
unsigned int next_interupt;
+int new_dynarec_did_compile;
+int cycle_multiplier;
void *psxH_ptr;
void new_dynarec_init() {}
void new_dyna_start() {}
void new_dynarec_cleanup() {}
+void new_dynarec_clear_full() {}
void invalidate_all_pages() {}
void invalidate_block(unsigned int block) {}
void new_dyna_pcsx_mem_init(void) {}
void new_dyna_pcsx_mem_reset(void) {}
+void new_dyna_pcsx_mem_load_state(void) {}
#endif
#ifdef DRC_DBG
notaz.gp2x.de / pcsx_rearmed.git / blobdiff