inline/parametrize rootcounter reads

[pcsx_rearmed.git] / libpcsxcore / new_dynarec / emu_if.c

diff --git a/libpcsxcore/new_dynarec/emu_if.c b/libpcsxcore/new_dynarec/emu_if.c
index f337b65..6957689 100644 (file)
--- a/libpcsxcore/new_dynarec/emu_if.c
+++ b/libpcsxcore/new_dynarec/emu_if.c
@@ -14,7 +14,10 @@
 #include "../cdrom.h"
 #include "../psxdma.h"
 #include "../mdec.h"
+#include "../gte_arm.h"
 #include "../gte_neon.h"
+#define FLAGLESS
+#include "../gte.h"
 
 #define ARRAY_SIZE(x) (sizeof(x) / sizeof(x[0]))
 
@@ -99,9 +102,6 @@ static void irq_test(void)
 void gen_interupt()
 {
        evprintf("  +ge %08x, %u->%u\n", psxRegs.pc, psxRegs.cycle, next_interupt);
-#ifdef DRC_DBG
-       psxRegs.cycle += 2;
-#endif
 
        irq_test();
        //psxBranchTest();
@@ -116,17 +116,17 @@ void gen_interupt()
 // from interpreter
 extern void MTC0(int reg, u32 val);
 
-void pcsx_mtc0(u32 reg)
+void pcsx_mtc0(u32 reg, u32 val)
 {
-       evprintf("MTC0 %d #%x @%08x %u\n", reg, readmem_word, psxRegs.pc, psxRegs.cycle);
-       MTC0(reg, readmem_word);
+       evprintf("MTC0 %d #%x @%08x %u\n", reg, val, psxRegs.pc, psxRegs.cycle);
+       MTC0(reg, val);
        gen_interupt();
 }
 
-void pcsx_mtc0_ds(u32 reg)
+void pcsx_mtc0_ds(u32 reg, u32 val)
 {
-       evprintf("MTC0 %d #%x @%08x %u\n", reg, readmem_word, psxRegs.pc, psxRegs.cycle);
-       MTC0(reg, readmem_word);
+       evprintf("MTC0 %d #%x @%08x %u\n", reg, val, psxRegs.pc, psxRegs.cycle);
+       MTC0(reg, val);
 }
 
 void new_dyna_save(void)
@@ -139,10 +139,34 @@ void new_dyna_restore(void)
        int i;
        for (i = 0; i < PSXINT_COUNT; i++)
                event_cycles[i] = psxRegs.intCycle[i].sCycle + psxRegs.intCycle[i].cycle;
+
+       new_dyna_pcsx_mem_load_state();
 }
 
 void *gte_handlers[64];
 
+void *gte_handlers_nf[64] = {
+       NULL      , gteRTPS_nf , NULL       , NULL      , NULL     , NULL       , gteNCLIP_nf, NULL      , // 00
+       NULL      , NULL       , NULL       , NULL      , gteOP_nf , NULL       , NULL       , NULL      , // 08
+       gteDPCS_nf, gteINTPL_nf, gteMVMVA_nf, gteNCDS_nf, gteCDP_nf, NULL       , gteNCDT_nf , NULL      , // 10
+       NULL      , NULL       , NULL       , gteNCCS_nf, gteCC_nf , NULL       , gteNCS_nf  , NULL      , // 18
+       gteNCT_nf , NULL       , NULL       , NULL      , NULL     , NULL       , NULL       , NULL      , // 20
+       gteSQR_nf , gteDCPL_nf , gteDPCT_nf , NULL      , NULL     , gteAVSZ3_nf, gteAVSZ4_nf, NULL      , // 28 
+       gteRTPT_nf, NULL       , NULL       , NULL      , NULL     , NULL       , NULL       , NULL      , // 30
+       NULL      , NULL       , NULL       , NULL      , NULL     , gteGPF_nf  , gteGPL_nf  , gteNCCT_nf, // 38
+};
+
+const char *gte_regnames[64] = {
+       NULL  , "RTPS" , NULL   , NULL  , NULL , NULL   , "NCLIP", NULL  , // 00
+       NULL  , NULL   , NULL   , NULL  , "OP" , NULL   , NULL   , NULL  , // 08
+       "DPCS", "INTPL", "MVMVA", "NCDS", "CDP", NULL   , "NCDT" , NULL  , // 10
+       NULL  , NULL   , NULL   , "NCCS", "CC" , NULL   , "NCS"  , NULL  , // 18
+       "NCT" , NULL   , NULL   , NULL  , NULL , NULL   , NULL   , NULL  , // 20
+       "SQR" , "DCPL" , "DPCT" , NULL  , NULL , "AVSZ3", "AVSZ4", NULL  , // 28 
+       "RTPT", NULL   , NULL   , NULL  , NULL , NULL   , NULL   , NULL  , // 30
+       NULL  , NULL   , NULL   , NULL  , NULL , "GPF"  , "GPL"  , "NCCT", // 38
+};
+
 /* from gte.txt.. not sure if this is any good. */
 const char gte_cycletab[64] = {
        /*   1   2   3   4   5   6   7   8   9   a   b   c   d   e   f */
@@ -164,11 +188,23 @@ static int ari64_init()
        for (i = 0; i < ARRAY_SIZE(gte_handlers); i++)
                if (psxCP2[i] != psxNULL)
                        gte_handlers[i] = psxCP2[i];
+
+#if !defined(DRC_DBG) && !defined(PCNT)
 #ifdef __arm__
-       gte_handlers[0x01] = gteRTPS_neon;
-       gte_handlers[0x30] = gteRTPT_neon;
-       gte_handlers[0x12] = gteMVMVA_neon;
-       gte_handlers[0x06] = gteNCLIP_neon;
+       gte_handlers[0x06] = gteNCLIP_arm;
+       gte_handlers_nf[0x01] = gteRTPS_nf_arm;
+       gte_handlers_nf[0x30] = gteRTPT_nf_arm;
+#endif
+#ifdef __ARM_NEON__
+       // compiler's _nf version is still a lot slower then neon
+       // _nf_arm RTPS is roughly the same, RTPT slower
+       gte_handlers[0x01] = gte_handlers_nf[0x01] = gteRTPS_neon;
+       gte_handlers[0x30] = gte_handlers_nf[0x30] = gteRTPT_neon;
+       gte_handlers[0x12] = gte_handlers_nf[0x12] = gteMVMVA_neon;
+#endif
+#endif
+#ifdef DRC_DBG
+       memcpy(gte_handlers_nf, gte_handlers, sizeof(gte_handlers_nf));
 #endif
        psxH_ptr = psxH;
 
@@ -266,14 +302,18 @@ unsigned short hword;
 unsigned char byte;
 int pending_exception, stop;
 unsigned int next_interupt;
+int new_dynarec_did_compile;
+int cycle_multiplier;
 void *psxH_ptr;
 void new_dynarec_init() {}
 void new_dyna_start() {}
 void new_dynarec_cleanup() {}
+void new_dynarec_clear_full() {}
 void invalidate_all_pages() {}
 void invalidate_block(unsigned int block) {}
 void new_dyna_pcsx_mem_init(void) {}
 void new_dyna_pcsx_mem_reset(void) {}
+void new_dyna_pcsx_mem_load_state(void) {}
 #endif
 
 #ifdef DRC_DBG