drc: implement block addr list saving
[pcsx_rearmed.git] / libpcsxcore / new_dynarec / emu_if.c
index 00af7f7..b7a2489 100644 (file)
@@ -25,6 +25,7 @@
 #define evprintf(...)
 
 char invalid_code[0x100000];
+static u32 scratch_buf[8*8*2] __attribute__((aligned(64)));
 u32 event_cycles[PSXINT_COUNT];
 
 static void schedule_timeslice(void)
@@ -59,6 +60,7 @@ static irq_func * const irq_funcs[] = {
        [PSXINT_CDRDMA] = cdrDmaInterrupt,
        [PSXINT_CDRLID] = cdrLidSeekInterrupt,
        [PSXINT_CDRPLAY] = cdrPlayInterrupt,
+       [PSXINT_SPU_UPDATE] = spuUpdate,
        [PSXINT_RCNT] = psxRcntUpdate,
 };
 
@@ -120,7 +122,7 @@ void pcsx_mtc0_ds(u32 reg, u32 val)
        MTC0(reg, val);
 }
 
-void new_dyna_save(void)
+void new_dyna_before_save(void)
 {
        psxRegs.interrupt &= ~(1 << PSXINT_RCNT); // old savestate compat
 
@@ -132,7 +134,7 @@ void new_dyna_after_save(void)
        psxRegs.interrupt |= 1 << PSXINT_RCNT;
 }
 
-void new_dyna_restore(void)
+static void new_dyna_restore(void)
 {
        int i;
        for (i = 0; i < PSXINT_COUNT; i++)
@@ -145,6 +147,50 @@ void new_dyna_restore(void)
        new_dyna_pcsx_mem_load_state();
 }
 
+void new_dyna_freeze(void *f, int mode)
+{
+       const char header_save[8] = "ariblks";
+       uint32_t addrs[1024 * 4];
+       int32_t size = 0;
+       int bytes;
+       char header[8];
+
+       if (mode != 0) { // save
+               size = new_dynarec_save_blocks(addrs, sizeof(addrs));
+               if (size == 0)
+                       return;
+
+               SaveFuncs.write(f, header_save, sizeof(header_save));
+               SaveFuncs.write(f, &size, sizeof(size));
+               SaveFuncs.write(f, addrs, size);
+       }
+       else {
+               new_dyna_restore();
+
+               bytes = SaveFuncs.read(f, header, sizeof(header));
+               if (bytes != sizeof(header) || strcmp(header, header_save)) {
+                       if (bytes > 0)
+                               SaveFuncs.seek(f, -bytes, SEEK_CUR);
+                       return;
+               }
+               SaveFuncs.read(f, &size, sizeof(size));
+               if (size <= 0)
+                       return;
+               if (size > sizeof(addrs)) {
+                       bytes = size - sizeof(addrs);
+                       SaveFuncs.seek(f, bytes, SEEK_CUR);
+                       size = sizeof(addrs);
+               }
+               bytes = SaveFuncs.read(f, addrs, size);
+               if (bytes != size)
+                       return;
+
+               new_dynarec_load_blocks(addrs, size);
+       }
+
+       //printf("drc: %d block info entries %s\n", size/8, mode ? "saved" : "loaded");
+}
+
 /* GTE stuff */
 void *gte_handlers[64];
 
@@ -210,13 +256,13 @@ const uint64_t gte_reg_reads[64] = {
        [GTE_OP]    = GCBITS3(0,2,4)       | GDBITS3(9,10,11),
        [GTE_DPCS]  = GCBITS3(21,22,23)    | GDBITS4(6,8,21,22),
        [GTE_INTPL] = GCBITS3(21,22,23)    | GDBITS7(6,8,9,10,11,21,22),
-       [GTE_MVMVA] = 0x00ffffff00000000ll | GDBITS6(0,1,2,3,4,5), // XXX: maybe decode further?
-       [GTE_NCDS]  = 0x00ffff0000000000ll | GDBITS5(0,1,6,21,22),
-       [GTE_CDP]   = 0x00fff00000000000ll | GDBITS7(6,8,9,10,11,21,22),
+       [GTE_MVMVA] = 0x00ffffff00000000ll | GDBITS9(0,1,2,3,4,5,9,10,11), // XXX: maybe decode further?
+       [GTE_NCDS]  = 0x00ffff0000000000ll | GDBITS6(0,1,6,8,21,22),
+       [GTE_CDP]   = 0x00ffe00000000000ll | GDBITS7(6,8,9,10,11,21,22),
        [GTE_NCDT]  = 0x00ffff0000000000ll | GDBITS8(0,1,2,3,4,5,6,8),
-       [GTE_NCCS]  = 0x00ffff0000000000ll | GDBITS6(0,1,6,8,21,22),
+       [GTE_NCCS]  = 0x001fff0000000000ll | GDBITS5(0,1,6,21,22),
        [GTE_CC]    = 0x001fe00000000000ll | GDBITS6(6,9,10,11,21,22),
-       [GTE_NCS]   = 0x001fff0000000000ll | GDBITS4(0,1,21,22),
+       [GTE_NCS]   = 0x001fff0000000000ll | GDBITS5(0,1,6,21,22),
        [GTE_NCT]   = 0x001fff0000000000ll | GDBITS7(0,1,2,3,4,5,6),
        [GTE_SQR]   =                        GDBITS3(9,10,11),
        [GTE_DCPL]  = GCBITS3(21,22,23)    | GDBITS7(6,8,9,10,11,21,22),
@@ -259,6 +305,7 @@ static int ari64_init()
 {
        extern void (*psxCP2[64])();
        extern void psxNULL();
+       extern u_char *out;
        size_t i;
 
        new_dynarec_init();
@@ -268,9 +315,9 @@ static int ari64_init()
                if (psxCP2[i] != psxNULL)
                        gte_handlers[i] = psxCP2[i];
 
-#if !defined(DRC_DBG)
-#ifdef __arm__
+#if defined(__arm__) && !defined(DRC_DBG)
        gte_handlers[0x06] = gteNCLIP_arm;
+#ifdef HAVE_ARMV5
        gte_handlers_nf[0x01] = gteRTPS_nf_arm;
        gte_handlers_nf[0x30] = gteRTPT_nf_arm;
 #endif
@@ -286,6 +333,11 @@ static int ari64_init()
 #endif
        psxH_ptr = psxH;
        zeromem_ptr = zero_mem;
+       scratch_buf_ptr = scratch_buf;
+
+       SysPrintf("Mapped (RAM/scrp/ROM/LUTs/TC):\n");
+       SysPrintf("%08x/%08x/%08x/%08x/%08x\n",
+               psxM, psxH, psxR, mem_rtab, out);
 
        return 0;
 }
@@ -344,6 +396,7 @@ static void ari64_clear(u32 addr, u32 size)
 static void ari64_shutdown()
 {
        new_dynarec_cleanup();
+       new_dyna_pcsx_mem_shutdown();
 }
 
 extern void intExecute();
@@ -358,7 +411,7 @@ extern void intExecuteBlockT();
 R3000Acpu psxRec = {
        ari64_init,
        ari64_reset,
-#if defined(__arm__)
+#ifndef DRC_DISABLE
        ari64_execute,
        ari64_execute_until,
 #else
@@ -375,7 +428,7 @@ void do_insn_trace() {}
 void do_insn_cmp() {}
 #endif
 
-#if defined(__x86_64__) || defined(__i386__)
+#ifdef DRC_DISABLE
 unsigned int address;
 int pending_exception, stop;
 unsigned int next_interupt;
@@ -385,7 +438,10 @@ int new_dynarec_hacks;
 void *psxH_ptr;
 void *zeromem_ptr;
 u8 zero_mem[0x1000];
-void new_dynarec_init() {}
+u_char *out;
+void *mem_rtab;
+void *scratch_buf_ptr;
+void new_dynarec_init() { (void)ari64_execute; }
 void new_dyna_start() {}
 void new_dynarec_cleanup() {}
 void new_dynarec_clear_full() {}
@@ -394,6 +450,9 @@ void invalidate_block(unsigned int block) {}
 void new_dyna_pcsx_mem_init(void) {}
 void new_dyna_pcsx_mem_reset(void) {}
 void new_dyna_pcsx_mem_load_state(void) {}
+void new_dyna_pcsx_mem_shutdown(void) {}
+int  new_dynarec_save_blocks(void *save, int size) { return 0; }
+void new_dynarec_load_blocks(const void *save, int size) {}
 #endif
 
 #ifdef DRC_DBG