drc: handle MTC0 in delay slot

[pcsx_rearmed.git] / libpcsxcore / new_dynarec / emu_if.c

diff --git a/libpcsxcore/new_dynarec/emu_if.c b/libpcsxcore/new_dynarec/emu_if.c
index 897791f..d2ff36a 100644 (file)
--- a/libpcsxcore/new_dynarec/emu_if.c
+++ b/libpcsxcore/new_dynarec/emu_if.c
@@ -109,13 +109,20 @@ void gen_interupt()
                next_interupt, next_interupt - psxRegs.cycle);
 }
 
-void MTC0_()
+// from interpreter
+extern void MTC0(int reg, u32 val);
+
+void pcsx_mtc0(u32 reg)
 {
-       extern void psxMTC0();
+       evprintf("MTC0 %d #%x @%08x %u\n", reg, readmem_word, psxRegs.pc, psxRegs.cycle);
+       MTC0(reg, readmem_word);
+       gen_interupt();
+}
 
-       evprintf("ari64 MTC0 %08x %08x %u\n", psxRegs.code, psxRegs.pc, psxRegs.cycle);
-       psxMTC0();
-       gen_interupt(); /* FIXME: checking pending irqs should be enough */
+void pcsx_mtc0_ds(u32 reg)
+{
+       evprintf("MTC0 %d #%x @%08x %u\n", reg, readmem_word, psxRegs.pc, psxRegs.cycle);
+       MTC0(reg, readmem_word);
 }
 
 void new_dyna_save(void)