yet more random armv5 tweaks

[pcsx_rearmed.git] / libpcsxcore / new_dynarec / emu_if.h

diff --git a/libpcsxcore/new_dynarec/emu_if.h b/libpcsxcore/new_dynarec/emu_if.h
index 9e7f710..7f625a7 100644 (file)
--- a/libpcsxcore/new_dynarec/emu_if.h
+++ b/libpcsxcore/new_dynarec/emu_if.h
@@ -26,6 +26,8 @@ extern int reg_cop0[];
 /* COP2/GTE */
 extern int reg_cop2d[], reg_cop2c[];
 extern void *gte_handlers[64];
+extern void *gte_handlers_nf[64];
+extern const char *gte_regnames[64];
 extern const char gte_cycletab[64];
 
 /* dummy */
@@ -45,6 +47,11 @@ extern unsigned int word;    /* write */
 extern unsigned short hword;
 extern unsigned char byte;
 
+extern void *psxH_ptr;
+
+// same as invalid_code, just a region for ram write checks (inclusive)
+extern u32 inv_code_start, inv_code_end;
+
 /* cycles/irqs */
 extern unsigned int next_interupt;
 extern int pending_exception;