struct ll_entry *next;
};
- u_int start;
- u_int *source;
- char insn[MAXBLOCK][10];
- u_char itype[MAXBLOCK];
- u_char opcode[MAXBLOCK];
- u_char opcode2[MAXBLOCK];
- u_char bt[MAXBLOCK];
- u_char rs1[MAXBLOCK];
- u_char rs2[MAXBLOCK];
- u_char rt1[MAXBLOCK];
- u_char rt2[MAXBLOCK];
- u_char us1[MAXBLOCK];
- u_char us2[MAXBLOCK];
- u_char dep1[MAXBLOCK];
- u_char dep2[MAXBLOCK];
- u_char lt1[MAXBLOCK];
+ // used by asm:
+ u_char *out;
+ u_int hash_table[65536][4] __attribute__((aligned(16)));
+ struct ll_entry *jump_in[4096] __attribute__((aligned(16)));
+ struct ll_entry *jump_dirty[4096];
+
+ static struct ll_entry *jump_out[4096];
+ static u_int start;
+ static u_int *source;
+ static char insn[MAXBLOCK][10];
+ static u_char itype[MAXBLOCK];
+ static u_char opcode[MAXBLOCK];
+ static u_char opcode2[MAXBLOCK];
+ static u_char bt[MAXBLOCK];
+ static u_char rs1[MAXBLOCK];
+ static u_char rs2[MAXBLOCK];
+ static u_char rt1[MAXBLOCK];
+ static u_char rt2[MAXBLOCK];
+ static u_char us1[MAXBLOCK];
+ static u_char us2[MAXBLOCK];
+ static u_char dep1[MAXBLOCK];
+ static u_char dep2[MAXBLOCK];
+ static u_char lt1[MAXBLOCK];
static uint64_t gte_rs[MAXBLOCK]; // gte: 32 data and 32 ctl regs
static uint64_t gte_rt[MAXBLOCK];
static uint64_t gte_unneeded[MAXBLOCK];
static u_int smrv_weak; // same, but somewhat less likely
static u_int smrv_strong_next; // same, but after current insn executes
static u_int smrv_weak_next;
- int imm[MAXBLOCK];
- u_int ba[MAXBLOCK];
- char likely[MAXBLOCK];
- char is_ds[MAXBLOCK];
- char ooo[MAXBLOCK];
- uint64_t unneeded_reg[MAXBLOCK];
- uint64_t unneeded_reg_upper[MAXBLOCK];
- uint64_t branch_unneeded_reg[MAXBLOCK];
- uint64_t branch_unneeded_reg_upper[MAXBLOCK];
- uint64_t pr32[MAXBLOCK];
- signed char regmap_pre[MAXBLOCK][HOST_REGS];
+ static int imm[MAXBLOCK];
+ static u_int ba[MAXBLOCK];
+ static char likely[MAXBLOCK];
+ static char is_ds[MAXBLOCK];
+ static char ooo[MAXBLOCK];
+ static uint64_t unneeded_reg[MAXBLOCK];
+ static uint64_t unneeded_reg_upper[MAXBLOCK];
+ static uint64_t branch_unneeded_reg[MAXBLOCK];
+ static uint64_t branch_unneeded_reg_upper[MAXBLOCK];
+ static signed char regmap_pre[MAXBLOCK][HOST_REGS];
static uint64_t current_constmap[HOST_REGS];
static uint64_t constmap[MAXBLOCK][HOST_REGS];
static struct regstat regs[MAXBLOCK];
static struct regstat branch_regs[MAXBLOCK];
- signed char minimum_free_regs[MAXBLOCK];
- u_int needed_reg[MAXBLOCK];
- u_int wont_dirty[MAXBLOCK];
- u_int will_dirty[MAXBLOCK];
- int ccadj[MAXBLOCK];
- int slen;
- u_int instr_addr[MAXBLOCK];
- u_int link_addr[MAXBLOCK][3];
- int linkcount;
- u_int stubs[MAXBLOCK*3][8];
- int stubcount;
- u_int literals[1024][2];
- int literalcount;
- int is_delayslot;
- int cop1_usable;
- u_char *out;
- struct ll_entry *jump_in[4096] __attribute__((aligned(16)));
- struct ll_entry *jump_out[4096];
- struct ll_entry *jump_dirty[4096];
- u_int hash_table[65536][4] __attribute__((aligned(16)));
- char shadow[1048576] __attribute__((aligned(16)));
- void *copy;
- int expirep;
- int new_dynarec_did_compile;
- int new_dynarec_hacks;
- u_int stop_after_jal;
+ static signed char minimum_free_regs[MAXBLOCK];
+ static u_int needed_reg[MAXBLOCK];
+ static u_int wont_dirty[MAXBLOCK];
+ static u_int will_dirty[MAXBLOCK];
+ static int ccadj[MAXBLOCK];
+ static int slen;
+ static u_int instr_addr[MAXBLOCK];
+ static u_int link_addr[MAXBLOCK][3];
+ static int linkcount;
+ static u_int stubs[MAXBLOCK*3][8];
+ static int stubcount;
+ static u_int literals[1024][2];
+ static int literalcount;
+ static int is_delayslot;
+ static int cop1_usable;
+ static char shadow[1048576] __attribute__((aligned(16)));
+ static void *copy;
+ static int expirep;
+ static u_int stop_after_jal;
#ifndef RAM_FIXED
static u_int ram_offset;
#else
static const u_int ram_offset=0;
#endif
+
+ int new_dynarec_hacks;
+ int new_dynarec_did_compile;
extern u_char restore_candidate[512];
extern int cycle_count;
#define STORE 2 // Store
#define LOADLR 3 // Unaligned load
#define STORELR 4 // Unaligned store
-#define MOV 5 // Move
+#define MOV 5 // Move
#define ALU 6 // Arithmetic/logic
#define MULTDIV 7 // Multiply/divide
#define SHIFT 8 // Shift by register
void new_dyna_leave();
// Needed by assembler
-void wb_register(signed char r,signed char regmap[],uint64_t dirty,uint64_t is32);
-void wb_dirtys(signed char i_regmap[],uint64_t i_is32,uint64_t i_dirty);
-void wb_needed_dirtys(signed char i_regmap[],uint64_t i_is32,uint64_t i_dirty,int addr);
-void load_all_regs(signed char i_regmap[]);
-void load_needed_regs(signed char i_regmap[],signed char next_regmap[]);
-void load_regs_entry(int t);
-void load_all_consts(signed char regmap[],int is32,u_int dirty,int i);
+static void wb_register(signed char r,signed char regmap[],uint64_t dirty,uint64_t is32);
+static void wb_dirtys(signed char i_regmap[],uint64_t i_is32,uint64_t i_dirty);
+static void wb_needed_dirtys(signed char i_regmap[],uint64_t i_is32,uint64_t i_dirty,int addr);
+static void load_all_regs(signed char i_regmap[]);
+static void load_needed_regs(signed char i_regmap[],signed char next_regmap[]);
+static void load_regs_entry(int t);
+static void load_all_consts(signed char regmap[],int is32,u_int dirty,int i);
+
+static int verify_dirty(u_int *ptr);
+static int get_final_value(int hr, int i, int *value);
+static void add_stub(int type,int addr,int retaddr,int a,int b,int c,int d,int e);
+static void add_to_linker(int addr,int target,int ext);
-int tracedebug=0;
+static int tracedebug=0;
//#define DEBUG_CYCLE_COUNT 1
while(head!=NULL) {
if(head->vaddr==vaddr) {
//printf("TRACE: count=%d next=%d (get_addr match %x: %x)\n",Count,next_interupt,vaddr,(int)head->addr);
- int *ht_bin=hash_table[((vaddr>>16)^vaddr)&0xFFFF];
+ u_int *ht_bin=hash_table[((vaddr>>16)^vaddr)&0xFFFF];
ht_bin[3]=ht_bin[1];
ht_bin[2]=ht_bin[0];
- ht_bin[1]=(int)head->addr;
+ ht_bin[1]=(u_int)head->addr;
ht_bin[0]=vaddr;
return head->addr;
}
restore_candidate[vpage>>3]|=1<<(vpage&7);
}
else restore_candidate[page>>3]|=1<<(page&7);
- int *ht_bin=hash_table[((vaddr>>16)^vaddr)&0xFFFF];
+ u_int *ht_bin=hash_table[((vaddr>>16)^vaddr)&0xFFFF];
if(ht_bin[0]==vaddr) {
- ht_bin[1]=(int)head->addr; // Replace existing entry
+ ht_bin[1]=(u_int)head->addr; // Replace existing entry
}
else
{
void *get_addr_ht(u_int vaddr)
{
//printf("TRACE: count=%d next=%d (get_addr_ht %x)\n",Count,next_interupt,vaddr);
- int *ht_bin=hash_table[((vaddr>>16)^vaddr)&0xFFFF];
+ u_int *ht_bin=hash_table[((vaddr>>16)^vaddr)&0xFFFF];
if(ht_bin[0]==vaddr) return (void *)ht_bin[1];
if(ht_bin[2]==vaddr) return (void *)ht_bin[3];
return get_addr(vaddr);
for (hr=0;hr<HOST_REGS;hr++) {
if((cur->dirty>>hr)&1) {
reg=cur->regmap[hr];
- if(reg>=64)
+ if(reg>=64)
if((cur->is32>>(reg&63))&1) cur->regmap[hr]=-1;
}
}
int j;
int b=-1;
int rn=10;
-
+
if(i>0&&(itype[i-1]==UJUMP||itype[i-1]==RJUMP||(source[i-1]>>16)==0x1000))
{
if(ba[i-1]<start || ba[i-1]>start+slen*4-4)
}
}*/
if(rn<10) return 1;
+ (void)b;
return 0;
}
void alloc_all(struct regstat *cur,int i)
{
int hr;
-
+
for(hr=0;hr<HOST_REGS;hr++) {
if(hr!=EXCLUDE_REG) {
if(((cur->regmap[hr]&63)!=rs1[i])&&((cur->regmap[hr]&63)!=rs2[i])&&
void remove_hash(int vaddr)
{
//printf("remove hash: %x\n",vaddr);
- int *ht_bin=hash_table[(((vaddr)>>16)^vaddr)&0xFFFF];
+ u_int *ht_bin=hash_table[(((vaddr)>>16)^vaddr)&0xFFFF];
if(ht_bin[2]==vaddr) {
ht_bin[2]=ht_bin[3]=-1;
}
{
struct ll_entry *next;
while(*head) {
- if(((u_int)((*head)->addr)>>shift)==(addr>>shift) ||
+ if(((u_int)((*head)->addr)>>shift)==(addr>>shift) ||
((u_int)((*head)->addr-MAX_OUTPUT_BLOCK_SIZE)>>shift)==(addr>>shift))
{
inv_debug("EXP: Remove pointer to %x (%x)\n",(int)(*head)->addr,(*head)->vaddr);
{
struct ll_entry *cur;
struct ll_entry *next;
- if(cur=*head) {
+ if((cur=*head)) {
*head=0;
while(cur) {
next=cur->next;
#ifdef __arm__
do_clear_cache();
#endif
-
+
// Don't trap writes
invalid_code[block]=1;
// Anything could have changed, so invalidate everything.
void invalidate_all_pages()
{
- u_int page,n;
+ u_int page;
for(page=0;page<4096;page++)
invalidate_page(page);
for(page=0;page<1048576;page++)
restore_candidate[(page&2047)>>3]|=1<<(page&7);
restore_candidate[((page&2047)>>3)+256]|=1<<(page&7);
}
- #ifdef __arm__
- __clear_cache((void *)BASE_ADDR,(void *)BASE_ADDR+(1<<TARGET_SIZE_2));
- #endif
#ifdef USE_MINI_HT
memset(mini_ht,-1,sizeof(mini_ht));
#endif
inv_debug("add_link: %x -> %x (%d)\n",(int)src,vaddr,page);
int *ptr=(int *)(src+4);
assert((*ptr&0x0fff0000)==0x059f0000);
+ (void)ptr;
ll_add(jump_out+page,vaddr,src);
//int ptr=get_pointer(src);
//inv_debug("add_link: Pointer is to %x\n",(int)ptr);
// Don't restore blocks which are about to expire from the cache
if((((u_int)head->addr-(u_int)out)<<(32-TARGET_SIZE_2))>0x60000000+(MAX_OUTPUT_BLOCK_SIZE<<(32-TARGET_SIZE_2))) {
u_int start,end;
- if(verify_dirty((int)head->addr)) {
+ if(verify_dirty(head->addr)) {
//printf("Possibly Restore %x (%x)\n",head->vaddr, (int)head->addr);
u_int i;
u_int inv=0;
//printf("page=%x, addr=%x\n",page,head->vaddr);
//assert(head->vaddr>>12==(page|0x80000));
ll_add_flags(jump_in+ppage,head->vaddr,head->reg_sv_flags,clean_addr);
- int *ht_bin=hash_table[((head->vaddr>>16)^head->vaddr)&0xFFFF];
+ u_int *ht_bin=hash_table[((head->vaddr>>16)^head->vaddr)&0xFFFF];
if(ht_bin[0]==head->vaddr) {
- ht_bin[1]=(int)clean_addr; // Replace existing entry
+ ht_bin[1]=(u_int)clean_addr; // Replace existing entry
}
if(ht_bin[2]==head->vaddr) {
- ht_bin[3]=(int)clean_addr; // Replace existing entry
+ ht_bin[3]=(u_int)clean_addr; // Replace existing entry
}
}
}
//else ...
}
-add_stub(int type,int addr,int retaddr,int a,int b,int c,int d,int e)
+static void add_stub(int type,int addr,int retaddr,int a,int b,int c,int d,int e)
{
stubs[stubcount][0]=type;
stubs[stubcount][1]=addr;
emit_mov(sh,th);
}
}
- if(opcode[i]==0x0d) //ORI
- if(sl<0) {
- emit_orimm(tl,imm[i],tl);
- }else{
- if(!((i_regs->wasconst>>sl)&1))
- emit_orimm(sl,imm[i],tl);
- else
- emit_movimm(constmap[i][sl]|imm[i],tl);
+ if(opcode[i]==0x0d) { // ORI
+ if(sl<0) {
+ emit_orimm(tl,imm[i],tl);
+ }else{
+ if(!((i_regs->wasconst>>sl)&1))
+ emit_orimm(sl,imm[i],tl);
+ else
+ emit_movimm(constmap[i][sl]|imm[i],tl);
+ }
}
- if(opcode[i]==0x0e) //XORI
- if(sl<0) {
- emit_xorimm(tl,imm[i],tl);
- }else{
- if(!((i_regs->wasconst>>sl)&1))
- emit_xorimm(sl,imm[i],tl);
- else
- emit_movimm(constmap[i][sl]^imm[i],tl);
+ if(opcode[i]==0x0e) { // XORI
+ if(sl<0) {
+ emit_xorimm(tl,imm[i],tl);
+ }else{
+ if(!((i_regs->wasconst>>sl)&1))
+ emit_xorimm(sl,imm[i],tl);
+ else
+ emit_movimm(constmap[i][sl]^imm[i],tl);
+ }
}
}
else {
//printf("load_assemble: c=%d\n",c);
//if(c) printf("load_assemble: const=%x\n",(int)constmap[i][s]+offset);
// FIXME: Even if the load is a NOP, we should check for pagefaults...
- if(tl<0&&(!c||(((u_int)constmap[i][s]+offset)>>16)==0x1f80)
+ if((tl<0&&(!c||(((u_int)constmap[i][s]+offset)>>16)==0x1f80))
||rt1[i]==0) {
// could be FIFO, must perform the read
// ||dummy read
emit_call((int)memdebug);
//emit_popa();
restore_regs(0x100f);
- }/**/
+ }*/
}
#ifndef loadlr_assemble
int s,th,tl,map=-1;
int addr,temp;
int offset;
- int jaddr=0,jaddr2,type;
+ int jaddr=0,type;
int memtarget=0,c=0;
int agr=AGEN1+(i&1);
int faststore_reg_override=0;
#if defined(HAVE_CONDITIONAL_CALL) && !defined(DESTRUCTIVE_SHIFT)
emit_callne(invalidate_addr_reg[addr]);
#else
- jaddr2=(int)out;
+ int jaddr2=(int)out;
emit_jne(0);
add_stub(INVCODE_STUB,jaddr2,(int)out,reglist|(1<<HOST_CCREG),addr,0,0,0);
#endif
#ifdef __arm__
restore_regs(0x100f);
#endif
- }/**/
+ }*/
}
void storelr_assemble(int i,struct regstat *i_regs)
{
int s,th,tl;
int temp;
- int temp2;
+ int temp2=-1;
int offset;
- int jaddr=0,jaddr2;
+ int jaddr=0;
int case1,case2,case3;
int done0,done1,done2;
int memtarget=0,c=0;
int map=get_reg(i_regs->regmap,ROREG);
if(map<0) emit_loadreg(ROREG,map=HOST_TEMPREG);
#else
- if((u_int)rdram!=0x80000000)
+ if((u_int)rdram!=0x80000000)
emit_addimm_no_flags((u_int)rdram-(u_int)0x80000000,temp);
#endif
#if defined(HAVE_CONDITIONAL_CALL) && !defined(DESTRUCTIVE_SHIFT)
emit_callne(invalidate_addr_reg[temp]);
#else
- jaddr2=(int)out;
+ int jaddr2=(int)out;
emit_jne(0);
add_stub(INVCODE_STUB,jaddr2,(int)out,reglist|(1<<HOST_CCREG),temp,0,0,0);
#endif
emit_call((int)memdebug);
emit_popa();
//restore_regs(0x100f);
- /**/
+ */
}
void c1ls_assemble(int i,struct regstat *i_regs)
int ar;
int offset;
int memtarget=0,c=0;
- int jaddr2=0,jaddr3,type;
+ int jaddr2=0,type;
int agr=AGEN1+(i&1);
int fastio_reg_override=0;
u_int hr,reglist=0;
#if defined(HAVE_CONDITIONAL_CALL) && !defined(DESTRUCTIVE_SHIFT)
emit_callne(invalidate_addr_reg[ar]);
#else
- jaddr3=(int)out;
+ int jaddr3=(int)out;
emit_jne(0);
add_stub(INVCODE_STUB,jaddr3,(int)out,reglist|(1<<HOST_CCREG),ar,0,0,0);
#endif
signed char ccreg=get_reg(i_regs->regmap,CCREG);
assert(ccreg==HOST_CCREG);
assert(!is_delayslot);
+ (void)ccreg;
emit_movimm(start+i*4,EAX); // Get PC
emit_addimm(HOST_CCREG,CLOCK_ADJUST(ccadj[i]),HOST_CCREG); // CHECK: is this right? There should probably be an extra cycle...
emit_jmp((int)jump_syscall_hle); // XXX
signed char ccreg=get_reg(i_regs->regmap,CCREG);
assert(ccreg==HOST_CCREG);
assert(!is_delayslot);
+ (void)ccreg;
emit_movimm(start+i*4+4,0); // Get PC
emit_movimm((int)psxHLEt[source[i]&7],1);
emit_addimm(HOST_CCREG,CLOCK_ADJUST(ccadj[i]),HOST_CCREG); // XXX
signed char ccreg=get_reg(i_regs->regmap,CCREG);
assert(ccreg==HOST_CCREG);
assert(!is_delayslot);
+ (void)ccreg;
emit_movimm(start+i*4,0); // Get PC
emit_addimm(HOST_CCREG,CLOCK_ADJUST(ccadj[i]),HOST_CCREG);
emit_jmp((int)jump_intcall);
int agr=AGEN1+(i&1);
if(itype[i]==LOAD) {
ra=get_reg(i_regs->regmap,rt1[i]);
- if(ra<0) ra=get_reg(i_regs->regmap,-1);
+ if(ra<0) ra=get_reg(i_regs->regmap,-1);
assert(ra>=0);
}
if(itype[i]==LOADLR) {
}
}
-int get_final_value(int hr, int i, int *value)
+static int get_final_value(int hr, int i, int *value)
{
int reg=regs[i].regmap[hr];
while(i<slen-1) {
{
return 0;
}
- else
+ else
if((i_dirty>>hr)&1)
{
if(i_regmap[hr]<TEMPREG)
if(rs1[i]) {
if((branch_regs[i].dirty>>s1l)&(branch_regs[i].is32>>rs1[i])&1)
emit_loadreg(rs1[i],s1l);
- }
+ }
else {
if((branch_regs[i].dirty>>s1l)&(branch_regs[i].is32>>rs2[i])&1)
emit_loadreg(rs2[i],s1l);
load_all_regs(branch_regs[i].regmap);
}
emit_jmp(stubs[n][2]); // return address
-
+
/* This works but uses a lot of memory...
emit_readword((int)&last_count,ECX);
emit_add(HOST_CCREG,ECX,EAX);
emit_jmpreg(EAX);*/
}
-add_to_linker(int addr,int target,int ext)
+static void add_to_linker(int addr,int target,int ext)
{
link_addr[linkcount][0]=addr;
link_addr[linkcount][1]=target;
- link_addr[linkcount][2]=ext;
+ link_addr[linkcount][2]=ext;
linkcount++;
}
#endif
{
#ifdef REG_PREFETCH
- if(temp>=0)
+ if(temp>=0)
{
if(i_regmap[temp]!=PTEMP) emit_movimm((int)hash_table[((return_address>>16)^return_address)&0xFFFF],temp);
}
void ujump_assemble(int i,struct regstat *i_regs)
{
- signed char *i_regmap=i_regs->regmap;
int ra_done=0;
if(i==(ba[i]-start)>>2) assem_debug("idle loop\n");
address_generation(i+1,i_regs,regs[i].regmap_entry);
#ifdef REG_PREFETCH
int temp=get_reg(branch_regs[i].regmap,PTEMP);
- if(rt1[i]==31&&temp>=0)
+ if(rt1[i]==31&&temp>=0)
{
+ signed char *i_regmap=i_regs->regmap;
int return_address=start+i*4+8;
- if(get_reg(branch_regs[i].regmap,31)>0)
+ if(get_reg(branch_regs[i].regmap,31)>0)
if(i_regmap[temp]==PTEMP) emit_movimm((int)hash_table[((return_address>>16)^return_address)&0xFFFF],temp);
}
#endif
assert(rt>=0);
return_address=start+i*4+8;
#ifdef REG_PREFETCH
- if(temp>=0)
+ if(temp>=0)
{
if(i_regmap[temp]!=PTEMP) emit_movimm((int)hash_table[((return_address>>16)^return_address)&0xFFFF],temp);
}
void rjump_assemble(int i,struct regstat *i_regs)
{
- signed char *i_regmap=i_regs->regmap;
int temp;
- int rs,cc,adj;
+ int rs,cc;
int ra_done=0;
rs=get_reg(branch_regs[i].regmap,rs1[i]);
assert(rs>=0);
}
address_generation(i+1,i_regs,regs[i].regmap_entry);
#ifdef REG_PREFETCH
- if(rt1[i]==31)
+ if(rt1[i]==31)
{
if((temp=get_reg(branch_regs[i].regmap,PTEMP))>=0) {
+ signed char *i_regmap=i_regs->regmap;
int return_address=start+i*4+8;
if(i_regmap[temp]==PTEMP) emit_movimm((int)hash_table[((return_address>>16)^return_address)&0xFFFF],temp);
}
rjump_assemble_write_ra(i);
cc=get_reg(branch_regs[i].regmap,CCREG);
assert(cc==HOST_CCREG);
+ (void)cc;
#ifdef USE_MINI_HT
int rh=get_reg(branch_regs[i].regmap,RHASH);
int ht=get_reg(branch_regs[i].regmap,RHTBL);
#ifdef CORTEX_A8_BRANCH_PREDICTION_HACK
if(i>(ba[i]-start)>>2) invert=1;
#endif
-
+
if(ooo[i]) {
s1l=get_reg(branch_regs[i].regmap,rs1[i]);
s1h=get_reg(branch_regs[i].regmap,rs1[i]|64);
load_regs(regs[i].regmap,branch_regs[i].regmap,regs[i].was32,CCREG,CCREG);
cc=get_reg(branch_regs[i].regmap,CCREG);
assert(cc==HOST_CCREG);
- if(unconditional)
+ if(unconditional)
store_regs_bt(branch_regs[i].regmap,branch_regs[i].is32,branch_regs[i].dirty,ba[i]);
//do_cc(i,branch_regs[i].regmap,&adj,unconditional?ba[i]:-1,unconditional);
//assem_debug("cycle count (adj)\n");
emit_jne(0);
}
} // if(!only32)
-
+
//printf("branch(%d): eax=%d ecx=%d edx=%d ebx=%d ebp=%d esi=%d edi=%d\n",i,branch_regs[i].regmap[0],branch_regs[i].regmap[1],branch_regs[i].regmap[2],branch_regs[i].regmap[3],branch_regs[i].regmap[5],branch_regs[i].regmap[6],branch_regs[i].regmap[7]);
assert(s1l>=0);
if(opcode[i]==4) // BEQ
emit_jne(1);
}
} // if(!only32)
-
+
//printf("branch(%d): eax=%d ecx=%d edx=%d ebx=%d ebp=%d esi=%d edi=%d\n",i,branch_regs[i].regmap[0],branch_regs[i].regmap[1],branch_regs[i].regmap[2],branch_regs[i].regmap[3],branch_regs[i].regmap[5],branch_regs[i].regmap[6],branch_regs[i].regmap[7]);
assert(s1l>=0);
if((opcode[i]&0x2f)==4) // BEQ
}
cc=get_reg(branch_regs[i].regmap,CCREG);
assert(cc==HOST_CCREG);
- if(unconditional)
+ if(unconditional)
store_regs_bt(branch_regs[i].regmap,branch_regs[i].is32,branch_regs[i].dirty,ba[i]);
//do_cc(i,branch_regs[i].regmap,&adj,unconditional?ba[i]:-1,unconditional);
assem_debug("cycle count (adj)\n");
}
}
} // if(!only32)
-
+
if(invert) {
#ifdef CORTEX_A8_BRANCH_PREDICTION_HACK
if(match&&(!internal||!is_ds[(ba[i]-start)>>2])) {
{
}
} // if(!only32)
-
+
if(invert) {
if(adj) emit_addimm(cc,-CLOCK_ADJUST(adj),cc);
#ifdef CORTEX_A8_BRANCH_PREDICTION_HACK
int s1h=get_reg(i_regs->regmap,rs1[i]|64);
int s2l=get_reg(i_regs->regmap,rs2[i]);
int s2h=get_reg(i_regs->regmap,rs2[i]|64);
- void *nt_branch=NULL;
int taken=0;
int nottaken=0;
int unconditional=0;
s1h=s2h=-1;
}
int hr=0;
- int addr,alt,ntaddr;
+ int addr=-1,alt=-1,ntaddr=-1;
if(i_regs->regmap[HOST_BTREG]<0) {addr=HOST_BTREG;}
else {
while(hr<HOST_REGS)
{
// If subroutine call, flag return address as a possible branch target
if(rt1[i]==31 && i<slen-2) bt[i+2]=1;
-
+
if(ba[i]<start || ba[i]>=(start+slen*4))
{
// Branch out of this block, flush all regs
u=1;
uu=1;
gte_u=gte_u_unknown;
- /* Hexagon hack
+ /* Hexagon hack
if(itype[i]==UJUMP&&rt1[i]==31)
{
uu=u=0x300C00F; // Discard at, v0-v1, t6-t9
if((regs[i].regmap[r]&63)==rt2[i]) wont_dirty_i|=1<<r;
if(regs[i].regmap[r]==CCREG) wont_dirty_i|=1<<r;
if(i>istart) {
- if(itype[i]!=RJUMP&&itype[i]!=UJUMP&&itype[i]!=CJUMP&&itype[i]!=SJUMP&&itype[i]!=FJUMP)
+ if(itype[i]!=RJUMP&&itype[i]!=UJUMP&&itype[i]!=CJUMP&&itype[i]!=SJUMP&&itype[i]!=FJUMP)
{
// Don't store a register immediately after writing it,
// may prevent dual-issue.
if(r!=EXCLUDE_REG) {
if(regs[i].regmap[r]==regmap_pre[i+2][r]) {
regs[i+2].wasdirty&=wont_dirty_i|~(1<<r);
- }else {/*printf("i: %x (%d) mismatch(+2): %d\n",start+i*4,i,r);/*assert(!((wont_dirty_i>>r)&1));*/}
+ }else {/*printf("i: %x (%d) mismatch(+2): %d\n",start+i*4,i,r);assert(!((wont_dirty_i>>r)&1));*/}
}
}
}
if(r!=EXCLUDE_REG) {
if(regs[i].regmap[r]==regmap_pre[i+1][r]) {
regs[i+1].wasdirty&=wont_dirty_i|~(1<<r);
- }else {/*printf("i: %x (%d) mismatch(+1): %d\n",start+i*4,i,r);/*assert(!((wont_dirty_i>>r)&1));*/}
+ }else {/*printf("i: %x (%d) mismatch(+1): %d\n",start+i*4,i,r);assert(!((wont_dirty_i>>r)&1));*/}
}
}
}
wont_dirty_i|=((unneeded_reg[i]>>(regmap_pre[i][r]&63))&1)<<r;
} else {
wont_dirty_i|=1<<r;
- /*printf("i: %x (%d) mismatch: %d\n",start+i*4,i,r);/*assert(!((will_dirty>>r)&1));*/
+ /*printf("i: %x (%d) mismatch: %d\n",start+i*4,i,r);assert(!((will_dirty>>r)&1));*/
}
}
}
if (mprotect(out, 1<<TARGET_SIZE_2, PROT_READ | PROT_WRITE | PROT_EXEC) != 0)
SysPrintf("mprotect() failed: %s\n", strerror(errno));
#endif
- int n;
cycle_multiplier=200;
new_dynarec_clear_full();
#ifdef HOST_IMM8
*limit = (addr & 0x80600000) + 0x00200000;
return (u_int *)((u_int)rdram + (addr&0x1fffff));
}
+ return NULL;
}
static u_int scan_for_ret(u_int addr)
if (*mem == 0x03e00008) // jr $ra
return addr + 8;
}
+ return addr;
}
struct savestate_block {
assem_debug("NOTCOMPILED: addr = %x -> %x\n", (int)addr, (int)out);
//printf("NOTCOMPILED: addr = %x -> %x\n", (int)addr, (int)out);
//printf("TRACE: count=%d next=%d (compile %x)\n",Count,next_interupt,addr);
- //if(debug)
+ //if(debug)
//printf("TRACE: count=%d next=%d (checksum %x)\n",Count,next_interupt,mchecksum());
//printf("fpu mapping=%x enabled=%x\n",(Status & 0x04000000)>>26,(Status & 0x20000000)>>29);
/*if(Count>=312978186) {
unsigned int type,op,op2;
//printf("addr = %x source = %x %x\n", addr,source,source[0]);
-
+
/* Pass 1 disassembly */
for(i=0;!done;i++) {
/* Pass 2 - Register dependencies and branch targets */
unneeded_registers(0,slen-1,0);
-
+
/* Pass 3 - Register allocation */
struct regstat current; // Current register allocations/status
unneeded_reg_upper[0]=1;
current.regmap[HOST_BTREG]=BTREG;
}
-
+
for(i=0;i<slen;i++)
{
if(bt[i])
}
} else {
// First instruction expects CCREG to be allocated
- if(i==0&&hr==HOST_CCREG)
+ if(i==0&&hr==HOST_CCREG)
regs[i].regmap_entry[hr]=CCREG;
else
regs[i].regmap_entry[hr]=-1;
pagespan_alloc(¤t,i);
break;
}
-
+
// Drop the upper half of registers that have become 32-bit
current.uu|=current.is32&((1LL<<rt1[i])|(1LL<<rt2[i]));
if(itype[i]!=UJUMP&&itype[i]!=CJUMP&&itype[i]!=SJUMP&&itype[i]!=RJUMP&&itype[i]!=FJUMP) {
// Create entry (branch target) regmap
for(hr=0;hr<HOST_REGS;hr++)
{
- int r,or,er;
+ int r,or;
r=current.regmap[hr];
if(r>=0) {
if(r!=regmap_pre[i][hr]) {
}
} else {
// Branches expect CCREG to be allocated at the target
- if(regmap_pre[i][hr]==CCREG)
+ if(regmap_pre[i][hr]==CCREG)
regs[i].regmap_entry[hr]=CCREG;
else
regs[i].regmap_entry[hr]=-1;
if(current.regmap[HOST_BTREG]==BTREG) current.regmap[HOST_BTREG]=-1;
regs[i].waswritten=current.waswritten;
}
-
+
/* Pass 4 - Cull unused host registers */
-
+
uint64_t nr=0;
-
+
for (i=slen-1;i>=0;i--)
{
int hr;
}
// Save it
needed_reg[i]=nr;
-
+
// Deallocate unneeded registers
for(hr=0;hr<HOST_REGS;hr++)
{
}
}
}
-
+
/* Pass 5 - Pre-allocate registers */
-
+
// If a register is allocated during a loop, try to allocate it for the
// entire loop, if possible. This avoids loading/storing registers
// inside of the loop.
-
+
signed char f_regmap[HOST_REGS];
clear_all_regs(f_regmap);
for(i=0;i<slen-1;i++)
{
if(itype[i]==UJUMP||itype[i]==CJUMP||itype[i]==SJUMP||itype[i]==FJUMP)
{
- if(ba[i]>=start && ba[i]<(start+i*4))
+ if(ba[i]>=start && ba[i]<(start+i*4))
if(itype[i+1]==NOP||itype[i+1]==MOV||itype[i+1]==ALU
||itype[i+1]==SHIFTIMM||itype[i+1]==IMM16||itype[i+1]==LOAD
||itype[i+1]==STORE||itype[i+1]==STORELR||itype[i+1]==C1LS
}
}
if(ooo[i]) {
- if(count_free_regs(regs[i].regmap)<=minimum_free_regs[i+1])
+ if(count_free_regs(regs[i].regmap)<=minimum_free_regs[i+1])
f_regmap[hr]=branch_regs[i].regmap[hr];
}else{
- if(count_free_regs(branch_regs[i].regmap)<=minimum_free_regs[i+1])
+ if(count_free_regs(branch_regs[i].regmap)<=minimum_free_regs[i+1])
f_regmap[hr]=branch_regs[i].regmap[hr];
}
// Avoid dirty->clean transition
if(itype[j]==CJUMP||itype[j]==SJUMP||itype[j]==FJUMP)
{
if(ooo[j]) {
- if(count_free_regs(regs[j].regmap)<=minimum_free_regs[j+1])
+ if(count_free_regs(regs[j].regmap)<=minimum_free_regs[j+1])
break;
}else{
- if(count_free_regs(branch_regs[j].regmap)<=minimum_free_regs[j+1])
+ if(count_free_regs(branch_regs[j].regmap)<=minimum_free_regs[j+1])
break;
}
if(get_reg(branch_regs[j].regmap,f_regmap[hr])>=0) {
regs[k].isconst&=~(1<<HOST_CCREG);
k++;
}
- regs[j].regmap_entry[HOST_CCREG]=CCREG;
+ regs[j].regmap_entry[HOST_CCREG]=CCREG;
}
// Work backwards from the branch target
if(j>i&&f_regmap[HOST_CCREG]==CCREG)
}
}
}
-
+
// Cache memory offset or tlb map pointer if a register is available
#ifndef HOST_IMM_ADDR32
#ifndef RAM_OFFSET
}
}
#endif
-
+
// This allocates registers (if possible) one instruction prior
// to use, which can avoid a load-use penalty on certain CPUs.
for(i=0;i<slen-1;i++)
}
}
}
- // Load source into target register
+ // Load source into target register
if(lt1[i+1]&&get_reg(regs[i+1].regmap,rs1[i+1])<0) {
if((hr=get_reg(regs[i+1].regmap,rt1[i+1]))>=0)
{
}
}
if(itype[i+1]==LOAD||itype[i+1]==LOADLR||itype[i+1]==STORE||itype[i+1]==STORELR/*||itype[i+1]==C1LS||||itype[i+1]==C2LS*/) {
- if(itype[i+1]==LOAD)
+ if(itype[i+1]==LOAD)
hr=get_reg(regs[i+1].regmap,rt1[i+1]);
if(itype[i+1]==LOADLR||(opcode[i+1]&0x3b)==0x31||(opcode[i+1]&0x3b)==0x32) // LWC1/LDC1, LWC2/LDC2
hr=get_reg(regs[i+1].regmap,FTEMP);
}
}
}
-
+
/* Pass 6 - Optimize clean/dirty state */
clean_registers(0,slen-1,1);
-
+
/* Pass 7 - Identify 32-bit registers */
for (i=slen-1;i>=0;i--)
{
// replace it with the new address.
// Don't add new entries. We'll insert the
// ones that actually get used in check_addr().
- int *ht_bin=hash_table[((vaddr>>16)^vaddr)&0xFFFF];
+ u_int *ht_bin=hash_table[((vaddr>>16)^vaddr)&0xFFFF];
if(ht_bin[0]==vaddr) {
ht_bin[1]=entry_point;
}
//printf("shadow buffer: %x-%x\n",(int)copy,(int)copy+slen*4);
memcpy(copy,source,slen*4);
copy+=slen*4;
-
+
#ifdef __arm__
__clear_cache((void *)beginning,out);
#endif
-
+
// If we're within 256K of the end of the buffer,
// start over from the beginning. (Is 256K enough?)
if((u_int)out>(u_int)BASE_ADDR+(1<<TARGET_SIZE_2)-MAX_OUTPUT_BLOCK_SIZE) out=(u_char *)BASE_ADDR;
-
+
// Trap writes to any of the pages we compiled
for(i=start>>12;i<=(start+slen*4)>>12;i++) {
invalid_code[i]=0;
invalid_code[((u_int)0x00000000>>12)|(i&0x1ff)]=
invalid_code[((u_int)0x80000000>>12)|(i&0x1ff)]=
invalid_code[((u_int)0xa0000000>>12)|(i&0x1ff)]=0;
-
+
/* Pass 10 - Free memory by expiring oldest blocks */
-
+
int end=((((int)out-(int)BASE_ADDR)>>(TARGET_SIZE_2-16))+16384)&65535;
while(expirep!=end)
{
case 2:
// Clear hash table
for(i=0;i<32;i++) {
- int *ht_bin=hash_table[((expirep&2047)<<5)+i];
+ u_int *ht_bin=hash_table[((expirep&2047)<<5)+i];
if((ht_bin[3]>>shift)==(base>>shift) ||
((ht_bin[3]-MAX_OUTPUT_BLOCK_SIZE)>>shift)==(base>>shift)) {
inv_debug("EXP: Remove hash %x -> %x\n",ht_bin[2],ht_bin[3]);
case 3:
// Clear jump_out
#ifdef __arm__
- if((expirep&2047)==0)
+ if((expirep&2047)==0)
do_clear_cache();
#endif
ll_remove_matching_addrs(jump_out+(expirep&2047),base,shift);
notaz.gp2x.de / pcsx_rearmed.git / blobdiff