*/
#include "psxcounters.h"
+#include "gpu.h"
#include "debug.h"
/******************************************************************************/
static const u32 CountToTarget = 1;
static const u32 FrameRate[] = { 60, 50 };
-static const u32 VBlankStart[] = { 240, 256 };
static const u32 HSyncTotal[] = { 263, 313 };
-static const u32 SpuUpdInterval[] = { 32, 32 };
+#define VBlankStart 240
#define VERBOSE_LEVEL 0
static const s32 VerboseLevel = VERBOSE_LEVEL;
Rcnt rcnts[ CounterQuantity ];
-static u32 hSyncCount = 0;
-static u32 spuSyncCount = 0;
+u32 hSyncCount = 0;
+u32 frame_counter = 0;
static u32 hsync_steps = 0;
-static u32 gpu_wants_hcnt = 0;
static u32 base_cycle = 0;
u32 psxNextCounter = 0, psxNextsCounter = 0;
}
else
{
- rcnts[index].cycle = 0xffff * rcnts[index].rate;
+ rcnts[index].cycle = 0x10000 * rcnts[index].rate;
rcnts[index].counterState = CountToOverflow;
}
}
if (rcnts[index].rate > 1)
count /= rcnts[index].rate;
- if( count > 0xffff )
+ if( count > 0x10000 )
{
- verboseLog( 1, "[RCNT %i] rcount > 0xffff: %x\n", index, count );
- count &= 0xffff;
+ verboseLog( 1, "[RCNT %i] rcount > 0x10000: %x\n", index, count );
}
+ count &= 0xffff;
return count;
}
+static
+void _psxRcntWmode( u32 index, u32 value )
+{
+ rcnts[index].mode = value;
+
+ switch( index )
+ {
+ case 0:
+ if( value & Rc0PixelClock )
+ {
+ rcnts[index].rate = 5;
+ }
+ else
+ {
+ rcnts[index].rate = 1;
+ }
+ break;
+ case 1:
+ if( value & Rc1HSyncClock )
+ {
+ rcnts[index].rate = (PSXCLK / (FrameRate[Config.PsxType] * HSyncTotal[Config.PsxType]));
+ }
+ else
+ {
+ rcnts[index].rate = 1;
+ }
+ break;
+ case 2:
+ if( value & Rc2OneEighthClock )
+ {
+ rcnts[index].rate = 8;
+ }
+ else
+ {
+ rcnts[index].rate = 1;
+ }
+
+ // TODO: wcount must work.
+ if( value & Rc2Disable )
+ {
+ rcnts[index].rate = 0xffffffff;
+ }
+ break;
+ }
+}
+
/******************************************************************************/
static
static
void psxRcntReset( u32 index )
{
- u32 count;
+ u32 rcycles;
+
+ rcnts[index].mode |= RcUnknown10;
if( rcnts[index].counterState == CountToTarget )
{
+ rcycles = psxRegs.cycle - rcnts[index].cycleStart;
if( rcnts[index].mode & RcCountToTarget )
{
- count = psxRegs.cycle;
- count -= rcnts[index].cycleStart;
- if (rcnts[index].rate > 1)
- count /= rcnts[index].rate;
- count -= rcnts[index].target;
+ rcycles -= rcnts[index].target * rcnts[index].rate;
+ rcnts[index].cycleStart = psxRegs.cycle - rcycles;
}
else
{
- count = _psxRcntRcount( index );
+ rcnts[index].cycle = 0x10000 * rcnts[index].rate;
+ rcnts[index].counterState = CountToOverflow;
}
- _psxRcntWcount( index, count );
-
if( rcnts[index].mode & RcIrqOnTarget )
{
if( (rcnts[index].mode & RcIrqRegenerate) || (!rcnts[index].irqState) )
{
- verboseLog( 3, "[RCNT %i] irq: %x\n", index, count );
+ verboseLog( 3, "[RCNT %i] irq\n", index );
setIrq( rcnts[index].irq );
rcnts[index].irqState = 1;
}
}
rcnts[index].mode |= RcCountEqTarget;
+
+ if( rcycles < 0x10000 * rcnts[index].rate )
+ return;
}
- else if( rcnts[index].counterState == CountToOverflow )
+
+ if( rcnts[index].counterState == CountToOverflow )
{
- count = psxRegs.cycle;
- count -= rcnts[index].cycleStart;
- if (rcnts[index].rate > 1)
- count /= rcnts[index].rate;
- count -= 0xffff;
+ rcycles = psxRegs.cycle - rcnts[index].cycleStart;
+ rcycles -= 0x10000 * rcnts[index].rate;
+
+ rcnts[index].cycleStart = psxRegs.cycle - rcycles;
- _psxRcntWcount( index, count );
+ if( rcycles < rcnts[index].target * rcnts[index].rate )
+ {
+ rcnts[index].cycle = rcnts[index].target * rcnts[index].rate;
+ rcnts[index].counterState = CountToTarget;
+ }
if( rcnts[index].mode & RcIrqOnOverflow )
{
if( (rcnts[index].mode & RcIrqRegenerate) || (!rcnts[index].irqState) )
{
- verboseLog( 3, "[RCNT %i] irq: %x\n", index, count );
+ verboseLog( 3, "[RCNT %i] irq\n", index );
setIrq( rcnts[index].irq );
rcnts[index].irqState = 1;
}
rcnts[index].mode |= RcOverflow;
}
-
- rcnts[index].mode |= RcUnknown10;
-
- psxRcntSet();
}
void psxRcntUpdate()
if( cycle - rcnts[3].cycleStart >= rcnts[3].cycle )
{
u32 leftover_cycles = cycle - rcnts[3].cycleStart - rcnts[3].cycle;
- u32 next_vsync, next_lace;
+ u32 next_vsync;
- spuSyncCount += hsync_steps;
hSyncCount += hsync_steps;
- // Update spu.
- if( spuSyncCount >= SpuUpdInterval[Config.PsxType] )
+ // VSync irq.
+ if( hSyncCount == VBlankStart )
{
- spuSyncCount = 0;
+ HW_GPU_STATUS &= ~PSXGPU_LCF;
+ GPU_vBlank( 1, 0 );
+ setIrq( 0x01 );
+
+ EmuUpdate();
+ GPU_updateLace();
if( SPU_async )
{
- SPU_async( SpuUpdInterval[Config.PsxType] * rcnts[3].target );
+ SPU_async( cycle, 1 );
}
}
- // VSync irq.
- if( hSyncCount == VBlankStart[Config.PsxType] )
- {
- GPU_vBlank( 1, &hSyncCount, &gpu_wants_hcnt );
-
- // For the best times. :D
- //setIrq( 0x01 );
- }
-
// Update lace. (with InuYasha fix)
if( hSyncCount >= (Config.VSyncWA ? HSyncTotal[Config.PsxType] / BIAS : HSyncTotal[Config.PsxType]) )
{
hSyncCount = 0;
+ frame_counter++;
- GPU_vBlank( 0, &hSyncCount, &gpu_wants_hcnt );
- setIrq( 0x01 );
-
- EmuUpdate();
- GPU_updateLace();
+ gpuSyncPluginSR();
+ if( (HW_GPU_STATUS & PSXGPU_ILACE_BITS) == PSXGPU_ILACE_BITS )
+ HW_GPU_STATUS |= frame_counter << 31;
+ GPU_vBlank( 0, HW_GPU_STATUS >> 31 );
}
// Schedule next call, in hsyncs
- hsync_steps = SpuUpdInterval[Config.PsxType] - spuSyncCount;
- next_vsync = VBlankStart[Config.PsxType] - hSyncCount; // ok to overflow
- next_lace = HSyncTotal[Config.PsxType] - hSyncCount;
+ hsync_steps = HSyncTotal[Config.PsxType] - hSyncCount;
+ next_vsync = VBlankStart - hSyncCount; // ok to overflow
if( next_vsync && next_vsync < hsync_steps )
hsync_steps = next_vsync;
- if( next_lace && next_lace < hsync_steps )
- hsync_steps = next_lace;
- if( gpu_wants_hcnt )
- hsync_steps = 1;
rcnts[3].cycleStart = cycle - leftover_cycles;
if (Config.PsxType)
base_cycle += hsync_steps * 8791293;
rcnts[3].cycle = base_cycle >> 12;
base_cycle &= 0xfff;
- psxRcntSet();
}
+ psxRcntSet();
+
#ifndef NDEBUG
DebugVSync();
#endif
{
verboseLog( 1, "[RCNT %i] wmode: %x\n", index, value );
- rcnts[index].mode = value;
- rcnts[index].irqState = 0;
-
- switch( index )
- {
- case 0:
- if( value & Rc0PixelClock )
- {
- rcnts[index].rate = 5;
- }
- else
- {
- rcnts[index].rate = 1;
- }
- break;
- case 1:
- if( value & Rc1HSyncClock )
- {
- rcnts[index].rate = (PSXCLK / (FrameRate[Config.PsxType] * HSyncTotal[Config.PsxType]));
- }
- else
- {
- rcnts[index].rate = 1;
- }
- break;
- case 2:
- if( value & Rc2OneEighthClock )
- {
- rcnts[index].rate = 8;
- }
- else
- {
- rcnts[index].rate = 1;
- }
-
- // TODO: wcount must work.
- if( value & Rc2Disable )
- {
- rcnts[index].rate = 0xffffffff;
- }
- break;
- }
-
+ _psxRcntWmode( index, value );
_psxRcntWcount( index, 0 );
+
+ rcnts[index].irqState = 0;
psxRcntSet();
}
}
hSyncCount = 0;
- spuSyncCount = 0;
hsync_steps = 1;
psxRcntSet();
/******************************************************************************/
-s32 psxRcntFreeze( gzFile f, s32 Mode )
+s32 psxRcntFreeze( void *f, s32 Mode )
{
+ u32 spuSyncCount = 0;
+ u32 count;
+ s32 i;
+
gzfreeze( &rcnts, sizeof(rcnts) );
gzfreeze( &hSyncCount, sizeof(hSyncCount) );
gzfreeze( &spuSyncCount, sizeof(spuSyncCount) );
gzfreeze( &psxNextsCounter, sizeof(psxNextsCounter) );
if (Mode == 0)
+ {
+ // don't trust things from a savestate
+ for( i = 0; i < CounterQuantity; ++i )
+ {
+ _psxRcntWmode( i, rcnts[i].mode );
+ count = (psxRegs.cycle - rcnts[i].cycleStart) / rcnts[i].rate;
+ _psxRcntWcount( i, count );
+ }
hsync_steps = (psxRegs.cycle - rcnts[3].cycleStart) / rcnts[3].target;
+ psxRcntSet();
- base_cycle = 0;
+ base_cycle = 0;
+ }
return 0;
}
notaz.gp2x.de / pcsx_rearmed.git / blobdiff