frontend: pandora: work around r20a vs r21 versioning

[pcsx_rearmed.git] / libpcsxcore / psxcounters.c

diff --git a/libpcsxcore/psxcounters.c b/libpcsxcore/psxcounters.c
index 8fc33b4..35823da 100644 (file)
--- a/libpcsxcore/psxcounters.c
+++ b/libpcsxcore/psxcounters.c
@@ -61,7 +61,6 @@ static const u32 CountToTarget    = 1;
 
 static const u32 FrameRate[]      = { 60, 50 };
 static const u32 HSyncTotal[]     = { 263, 313 };
-static const u32 SpuUpdInterval[] = { 32, 32 };
 #define VBlankStart 240
 
 #define VERBOSE_LEVEL 0
@@ -73,7 +72,6 @@ Rcnt rcnts[ CounterQuantity ];
 
 u32 hSyncCount = 0;
 u32 frame_counter = 0;
-static u32 spuSyncCount = 0;
 static u32 hsync_steps = 0;
 static u32 base_cycle = 0;
 
@@ -152,6 +150,52 @@ u32 _psxRcntRcount( u32 index )
     return count;
 }
 
+static
+void _psxRcntWmode( u32 index, u32 value )
+{
+    rcnts[index].mode = value;
+
+    switch( index )
+    {
+        case 0:
+            if( value & Rc0PixelClock )
+            {
+                rcnts[index].rate = 5;
+            }
+            else
+            {
+                rcnts[index].rate = 1;
+            }
+        break;
+        case 1:
+            if( value & Rc1HSyncClock )
+            {
+                rcnts[index].rate = (PSXCLK / (FrameRate[Config.PsxType] * HSyncTotal[Config.PsxType]));
+            }
+            else
+            {
+                rcnts[index].rate = 1;
+            }
+        break;
+        case 2:
+            if( value & Rc2OneEighthClock )
+            {
+                rcnts[index].rate = 8;
+            }
+            else
+            {
+                rcnts[index].rate = 1;
+            }
+
+            // TODO: wcount must work.
+            if( value & Rc2Disable )
+            {
+                rcnts[index].rate = 0xffffffff;
+            }
+        break;
+    }
+}
+
 /******************************************************************************/
 
 static
@@ -277,22 +321,10 @@ void psxRcntUpdate()
     if( cycle - rcnts[3].cycleStart >= rcnts[3].cycle )
     {
         u32 leftover_cycles = cycle - rcnts[3].cycleStart - rcnts[3].cycle;
-        u32 next_vsync, next_lace;
+        u32 next_vsync;
 
-        spuSyncCount += hsync_steps;
         hSyncCount += hsync_steps;
 
-        // Update spu.
-        if( spuSyncCount >= SpuUpdInterval[Config.PsxType] )
-        {
-            spuSyncCount = 0;
-
-            if( SPU_async )
-            {
-                SPU_async( SpuUpdInterval[Config.PsxType] * rcnts[3].target );
-            }
-        }
-        
         // VSync irq.
         if( hSyncCount == VBlankStart )
         {
@@ -302,6 +334,11 @@ void psxRcntUpdate()
 
             EmuUpdate();
             GPU_updateLace();
+
+            if( SPU_async )
+            {
+                SPU_async( cycle, 1 );
+            }
         }
         
         // Update lace. (with InuYasha fix)
@@ -317,13 +354,10 @@ void psxRcntUpdate()
         }
 
         // Schedule next call, in hsyncs
-        hsync_steps = SpuUpdInterval[Config.PsxType] - spuSyncCount;
+        hsync_steps = HSyncTotal[Config.PsxType] - hSyncCount;
         next_vsync = VBlankStart - hSyncCount; // ok to overflow
-        next_lace = HSyncTotal[Config.PsxType] - hSyncCount;
         if( next_vsync && next_vsync < hsync_steps )
             hsync_steps = next_vsync;
-        if( next_lace && next_lace < hsync_steps )
-            hsync_steps = next_lace;
 
         rcnts[3].cycleStart = cycle - leftover_cycles;
         if (Config.PsxType)
@@ -357,50 +391,10 @@ void psxRcntWmode( u32 index, u32 value )
 {
     verboseLog( 1, "[RCNT %i] wmode: %x\n", index, value );
 
-    rcnts[index].mode = value;
-    rcnts[index].irqState = 0;
-
-    switch( index )
-    {
-        case 0:
-            if( value & Rc0PixelClock )
-            {
-                rcnts[index].rate = 5;
-            }
-            else
-            {
-                rcnts[index].rate = 1;
-            }
-        break;
-        case 1:
-            if( value & Rc1HSyncClock )
-            {
-                rcnts[index].rate = (PSXCLK / (FrameRate[Config.PsxType] * HSyncTotal[Config.PsxType]));
-            }
-            else
-            {
-                rcnts[index].rate = 1;
-            }
-        break;
-        case 2:
-            if( value & Rc2OneEighthClock )
-            {
-                rcnts[index].rate = 8;
-            }
-            else
-            {
-                rcnts[index].rate = 1;
-            }
-
-            // TODO: wcount must work.
-            if( value & Rc2Disable )
-            {
-                rcnts[index].rate = 0xffffffff;
-            }
-        break;
-    }
-
+    _psxRcntWmode( index, value );
     _psxRcntWcount( index, 0 );
+
+    rcnts[index].irqState = 0;
     psxRcntSet();
 }
 
@@ -487,7 +481,6 @@ void psxRcntInit()
     }
 
     hSyncCount = 0;
-    spuSyncCount = 0;
     hsync_steps = 1;
 
     psxRcntSet();
@@ -495,8 +488,12 @@ void psxRcntInit()
 
 /******************************************************************************/
 
-s32 psxRcntFreeze( gzFile f, s32 Mode )
+s32 psxRcntFreeze( void *f, s32 Mode )
 {
+    u32 spuSyncCount = 0;
+    u32 count;
+    s32 i;
+
     gzfreeze( &rcnts, sizeof(rcnts) );
     gzfreeze( &hSyncCount, sizeof(hSyncCount) );
     gzfreeze( &spuSyncCount, sizeof(spuSyncCount) );
@@ -504,9 +501,19 @@ s32 psxRcntFreeze( gzFile f, s32 Mode )
     gzfreeze( &psxNextsCounter, sizeof(psxNextsCounter) );
 
     if (Mode == 0)
+    {
+        // don't trust things from a savestate
+        for( i = 0; i < CounterQuantity; ++i )
+        {
+            _psxRcntWmode( i, rcnts[i].mode );
+            count = (psxRegs.cycle - rcnts[i].cycleStart) / rcnts[i].rate;
+            _psxRcntWcount( i, count );
+        }
         hsync_steps = (psxRegs.cycle - rcnts[3].cycleStart) / rcnts[3].target;
+        psxRcntSet();
 
-    base_cycle = 0;
+        base_cycle = 0;
+    }
 
     return 0;
 }