make root counters use generic event scheduling code

[pcsx_rearmed.git] / libpcsxcore / psxcounters.c

diff --git a/libpcsxcore/psxcounters.c b/libpcsxcore/psxcounters.c
index ebfe629..3f6e139 100644 (file)
--- a/libpcsxcore/psxcounters.c
+++ b/libpcsxcore/psxcounters.c
@@ -22,16 +22,10 @@
  */
 
 #include "psxcounters.h"
+#include "debug.h"
 
 /******************************************************************************/
 
-typedef struct Rcnt
-{
-    u16 mode, target;
-    u32 rate, irq, counterState, irqState;
-    u32 cycle, cycleStart;
-} Rcnt;
-
 enum
 {
     Rc0Gate           = 0x0001, // 0    not implemented
@@ -66,17 +60,20 @@ static const u32 CountToTarget    = 1;
 
 static const u32 FrameRate[]      = { 60, 50 };
 static const u32 VBlankStart[]    = { 240, 256 };
-static const u32 HSyncTotal[]     = { 262, 312 };
-static const u32 SpuUpdInterval[] = { 23, 22 };
+static const u32 HSyncTotal[]     = { 263, 313 };
+static const u32 SpuUpdInterval[] = { 32, 32 };
 
-static const s32 VerboseLevel     = 0;
+#define VERBOSE_LEVEL 0
+static const s32 VerboseLevel     = VERBOSE_LEVEL;
 
 /******************************************************************************/
 
-static Rcnt rcnts[ CounterQuantity ];
+Rcnt rcnts[ CounterQuantity ];
 
 static u32 hSyncCount = 0;
 static u32 spuSyncCount = 0;
+static u32 hsync_steps = 0;
+static u32 gpu_wants_hcnt = 0;
 
 u32 psxNextCounter = 0, psxNextsCounter = 0;
 
@@ -89,8 +86,9 @@ void setIrq( u32 irq )
 }
 
 static
-void verboseLog( s32 level, const char *str, ... )
+void verboseLog( u32 level, const char *str, ... )
 {
+#if VERBOSE_LEVEL > 0
     if( level <= VerboseLevel )
     {
         va_list va;
@@ -100,9 +98,10 @@ void verboseLog( s32 level, const char *str, ... )
         vsprintf( buf, str, va );
         va_end( va );
 
-        printf( buf );
+        printf( "%s", buf );
         fflush( stdout );
     }
+#endif
 }
 
 /******************************************************************************/
@@ -139,7 +138,8 @@ u32 _psxRcntRcount( u32 index )
 
     count  = psxRegs.cycle;
     count -= rcnts[index].cycleStart;
-    count /= rcnts[index].rate;
+    if (rcnts[index].rate > 1)
+        count /= rcnts[index].rate;
 
     if( count > 0xffff )
     {
@@ -176,6 +176,9 @@ void psxRcntSet()
             psxNextCounter = countToUpdate;
         }
     }
+
+    psxRegs.interrupt |= (1 << PSXINT_RCNT);
+    new_dyna_set_event(PSXINT_RCNT, psxNextCounter);
 }
 
 /******************************************************************************/
@@ -191,7 +194,8 @@ void psxRcntReset( u32 index )
         {
             count  = psxRegs.cycle;
             count -= rcnts[index].cycleStart;
-            count /= rcnts[index].rate;
+            if (rcnts[index].rate > 1)
+                count /= rcnts[index].rate;
             count -= rcnts[index].target;
         }
         else
@@ -217,7 +221,8 @@ void psxRcntReset( u32 index )
     {
         count  = psxRegs.cycle;
         count -= rcnts[index].cycleStart;
-        count /= rcnts[index].rate;
+        if (rcnts[index].rate > 1)
+            count /= rcnts[index].rate;
         count -= 0xffff;
 
         _psxRcntWcount( index, count );
@@ -267,10 +272,11 @@ void psxRcntUpdate()
     // rcnt base.
     if( cycle - rcnts[3].cycleStart >= rcnts[3].cycle )
     {
-        psxRcntReset( 3 );
+        u32 leftover_cycles = cycle - rcnts[3].cycleStart - rcnts[3].cycle;
+        u32 next_vsync, next_lace;
 
-        spuSyncCount++;
-        hSyncCount++;
+        spuSyncCount += hsync_steps;
+        hSyncCount += hsync_steps;
 
         // Update spu.
         if( spuSyncCount >= SpuUpdInterval[Config.PsxType] )
@@ -286,7 +292,7 @@ void psxRcntUpdate()
         // VSync irq.
         if( hSyncCount == VBlankStart[Config.PsxType] )
         {
-            GPU_vBlank( 1 );
+            GPU_vBlank( 1, &hSyncCount, &gpu_wants_hcnt );
             
             // For the best times. :D
             //setIrq( 0x01 );
@@ -297,15 +303,32 @@ void psxRcntUpdate()
         {
             hSyncCount = 0;
 
-            GPU_vBlank( 0 );
+            GPU_vBlank( 0, &hSyncCount, &gpu_wants_hcnt );
             setIrq( 0x01 );
 
-            GPU_updateLace();
             EmuUpdate();
+            GPU_updateLace();
         }
+
+        // Schedule next call, in hsyncs
+        hsync_steps = SpuUpdInterval[Config.PsxType] - spuSyncCount;
+        next_vsync = VBlankStart[Config.PsxType] - hSyncCount; // ok to overflow
+        next_lace = HSyncTotal[Config.PsxType] - hSyncCount;
+        if( next_vsync && next_vsync < hsync_steps )
+            hsync_steps = next_vsync;
+        if( next_lace && next_lace < hsync_steps )
+            hsync_steps = next_lace;
+        if( gpu_wants_hcnt )
+            hsync_steps = 1;
+
+        rcnts[3].cycleStart = cycle - leftover_cycles;
+        rcnts[3].cycle = hsync_steps * rcnts[3].target;
+        psxRcntSet();
     }
 
+#ifndef NDEBUG
     DebugVSync();
+#endif
 }
 
 /******************************************************************************/
@@ -314,8 +337,6 @@ void psxRcntWcount( u32 index, u32 value )
 {
     verboseLog( 2, "[RCNT %i] wcount: %x\n", index, value );
 
-    psxRcntUpdate();
-
     _psxRcntWcount( index, value );
     psxRcntSet();
 }
@@ -324,8 +345,6 @@ void psxRcntWmode( u32 index, u32 value )
 {
     verboseLog( 1, "[RCNT %i] wmode: %x\n", index, value );
 
-    psxRcntUpdate();
-
     rcnts[index].mode = value;
     rcnts[index].irqState = 0;
 
@@ -377,8 +396,6 @@ void psxRcntWtarget( u32 index, u32 value )
 {
     verboseLog( 1, "[RCNT %i] wtarget: %x\n", index, value );
 
-    psxRcntUpdate();
-
     rcnts[index].target = value;
 
     _psxRcntWcount( index, _psxRcntRcount( index ) );
@@ -391,8 +408,6 @@ u32 psxRcntRcount( u32 index )
 {
     u32 count;
 
-    psxRcntUpdate();
-
     count = _psxRcntRcount( index );
 
     // Parasite Eve 2 fix.
@@ -416,8 +431,6 @@ u32 psxRcntRmode( u32 index )
 {
     u16 mode;
 
-    psxRcntUpdate();
-
     mode = rcnts[index].mode;
     rcnts[index].mode &= 0xe7ff;
 
@@ -461,6 +474,10 @@ void psxRcntInit()
         _psxRcntWcount( i, 0 );
     }
 
+    hSyncCount = 0;
+    spuSyncCount = 0;
+    hsync_steps = 1;
+
     psxRcntSet();
 }
 
@@ -474,6 +491,9 @@ s32 psxRcntFreeze( gzFile f, s32 Mode )
     gzfreeze( &psxNextCounter, sizeof(psxNextCounter) );
     gzfreeze( &psxNextsCounter, sizeof(psxNextsCounter) );
 
+    if (Mode == 0)
+        hsync_steps = (psxRegs.cycle - rcnts[3].cycleStart) / rcnts[3].target;
+
     return 0;
 }