spu: rework synchronization

[pcsx_rearmed.git] / libpcsxcore / psxdma.h

diff --git a/libpcsxcore/psxdma.h b/libpcsxcore/psxdma.h
index 6736cdb..28495fa 100644 (file)
--- a/libpcsxcore/psxdma.h
+++ b/libpcsxcore/psxdma.h
@@ -30,24 +30,45 @@ extern "C" {
 #include "psxmem.h"
 
 #define GPUDMA_INT(eCycle) { \
-       psxRegs.interrupt |= 0x01000000; \
-       psxRegs.intCycle[3 + 24 + 1] = eCycle; \
-       psxRegs.intCycle[3 + 24] = psxRegs.cycle; \
-       new_dyna_set_event(3, eCycle); \
+       psxRegs.interrupt |= (1 << PSXINT_GPUDMA); \
+       psxRegs.intCycle[PSXINT_GPUDMA].cycle = eCycle; \
+       psxRegs.intCycle[PSXINT_GPUDMA].sCycle = psxRegs.cycle; \
+       new_dyna_set_event(PSXINT_GPUDMA, eCycle); \
 }
 
 #define SPUDMA_INT(eCycle) { \
-    psxRegs.interrupt |= 0x04000000; \
-    psxRegs.intCycle[1 + 24 + 1] = eCycle; \
-    psxRegs.intCycle[1 + 24] = psxRegs.cycle; \
-    new_dyna_set_event(5, eCycle); \
+       psxRegs.interrupt |= (1 << PSXINT_SPUDMA); \
+       psxRegs.intCycle[PSXINT_SPUDMA].cycle = eCycle; \
+       psxRegs.intCycle[PSXINT_SPUDMA].sCycle = psxRegs.cycle; \
+       new_dyna_set_event(PSXINT_SPUDMA, eCycle); \
 }
 
 #define MDECOUTDMA_INT(eCycle) { \
-       psxRegs.interrupt |= 0x02000000; \
-       psxRegs.intCycle[5 + 24 + 1] = eCycle; \
-       psxRegs.intCycle[5 + 24] = psxRegs.cycle; \
-       new_dyna_set_event(4, eCycle); \
+       psxRegs.interrupt |= (1 << PSXINT_MDECOUTDMA); \
+       psxRegs.intCycle[PSXINT_MDECOUTDMA].cycle = eCycle; \
+       psxRegs.intCycle[PSXINT_MDECOUTDMA].sCycle = psxRegs.cycle; \
+       new_dyna_set_event(PSXINT_MDECOUTDMA, eCycle); \
+}
+
+#define MDECINDMA_INT(eCycle) { \
+       psxRegs.interrupt |= (1 << PSXINT_MDECINDMA); \
+       psxRegs.intCycle[PSXINT_MDECINDMA].cycle = eCycle; \
+       psxRegs.intCycle[PSXINT_MDECINDMA].sCycle = psxRegs.cycle; \
+       new_dyna_set_event(PSXINT_MDECINDMA, eCycle); \
+}
+
+#define GPUOTCDMA_INT(eCycle) { \
+       psxRegs.interrupt |= (1 << PSXINT_GPUOTCDMA); \
+       psxRegs.intCycle[PSXINT_GPUOTCDMA].cycle = eCycle; \
+       psxRegs.intCycle[PSXINT_GPUOTCDMA].sCycle = psxRegs.cycle; \
+       new_dyna_set_event(PSXINT_GPUOTCDMA, eCycle); \
+}
+
+#define CDRDMA_INT(eCycle) { \
+       psxRegs.interrupt |= (1 << PSXINT_CDRDMA); \
+       psxRegs.intCycle[PSXINT_CDRDMA].cycle = eCycle; \
+       psxRegs.intCycle[PSXINT_CDRDMA].sCycle = psxRegs.cycle; \
+       new_dyna_set_event(PSXINT_CDRDMA, eCycle); \
 }
 
 void psxDma2(u32 madr, u32 bcr, u32 chcr);
@@ -56,6 +77,7 @@ void psxDma4(u32 madr, u32 bcr, u32 chcr);
 void psxDma6(u32 madr, u32 bcr, u32 chcr);
 void gpuInterrupt();
 void spuInterrupt();
+void gpuotcInterrupt();
 
 #ifdef __cplusplus
 }