try to support more compilers

[pcsx_rearmed.git] / libpcsxcore / psxinterpreter.c

diff --git a/libpcsxcore/psxinterpreter.c b/libpcsxcore/psxinterpreter.c
index 3736b23..84e1da5 100644 (file)
--- a/libpcsxcore/psxinterpreter.c
+++ b/libpcsxcore/psxinterpreter.c
@@ -25,6 +25,7 @@
 #include "r3000a.h"
 #include "gte.h"
 #include "psxhle.h"
+#include "debug.h"
 
 static int branch = 0;
 static int branch2 = 0;
@@ -38,7 +39,7 @@ static u32 branchPC;
 #define debugI()
 #endif
 
-inline void execI();
+void execI();
 
 // Subsets
 void (*psxBSC[64])();
@@ -59,13 +60,13 @@ static void delayRead(int reg, u32 bpc) {
 
        psxRegs.pc = bpc;
 
-       psxBranchTest();
+       branch = 0;
 
        psxRegs.GPR.r[reg] = rold;
        execI(); // first branch opcode
        psxRegs.GPR.r[reg] = rnew;
 
-       branch = 0;
+       psxBranchTest();
 }
 
 static void delayWrite(int reg, u32 bpc) {
@@ -153,8 +154,12 @@ int psxTestLoadDelay(int reg, u32 tmp) {
 
                case 0x01: // REGIMM
                        switch (_tRt_) {
-                               case 0x00: case 0x02:
-                               case 0x10: case 0x12: // BLTZ/BGEZ...
+                               case 0x00: case 0x01:
+                               case 0x10: case 0x11: // BLTZ/BGEZ...
+                                       // Xenogears - lbu v0 / beq v0
+                                       // - no load delay (fixes battle loading)
+                                       break;
+
                                        if (_tRs_ == reg) return 2;
                                        break;
                        }
@@ -166,10 +171,18 @@ int psxTestLoadDelay(int reg, u32 tmp) {
                        break;
 
                case 0x04: case 0x05: // BEQ/BNE
+                       // Xenogears - lbu v0 / beq v0
+                       // - no load delay (fixes battle loading)
+                       break;
+
                        if (_tRs_ == reg || _tRt_ == reg) return 2;
                        break;
 
                case 0x06: case 0x07: // BLEZ/BGTZ
+                       // Xenogears - lbu v0 / beq v0
+                       // - no load delay (fixes battle loading)
+                       break;
+
                        if (_tRs_ == reg) return 2;
                        break;
 
@@ -395,7 +408,7 @@ static int psxDelayBranchTest(u32 tar1) {
        return psxDelayBranchExec(tmp2);
 }
 
-__inline void doBranch(u32 tar) {
+static void doBranch(u32 tar) {
        u32 *code;
        u32 tmp;
 
@@ -492,6 +505,10 @@ void psxDIV() {
                _i32(_rLo_) = _i32(_rRs_) / _i32(_rRt_);
                _i32(_rHi_) = _i32(_rRs_) % _i32(_rRt_);
        }
+       else {
+               _i32(_rLo_) = _i32(_rRs_) >= 0 ? 0xffffffff : 1;
+               _i32(_rHi_) = _i32(_rRs_);
+       }
 }
 
 void psxDIVU() {
@@ -499,6 +516,10 @@ void psxDIVU() {
                _rLo_ = _rRs_ / _rRt_;
                _rHi_ = _rRs_ % _rRt_;
        }
+       else {
+               _i32(_rLo_) = 0xffffffff;
+               _i32(_rHi_) = _i32(_rRs_);
+       }
 }
 
 void psxMULT() {
@@ -767,7 +788,7 @@ void psxTestSWInts() {
        }
 }
 
-__inline void MTC0(int reg, u32 val) {
+void MTC0(int reg, u32 val) {
 //     SysPrintf("MTC0 %d: %x\n", reg, val);
        switch (reg) {
                case 12: // Status
@@ -907,7 +928,7 @@ static void intShutdown() {
 }
 
 // interpreter execution
-inline void execI() { 
+void execI() {
        u32 *code = (u32 *)PSXM(psxRegs.pc);
        psxRegs.code = ((code == NULL) ? 0 : SWAP32(*code));