gpu_neon: merge cmd size tables

[pcsx_rearmed.git] / plugins / gpu_neon / gpu.c

diff --git a/plugins/gpu_neon/gpu.c b/plugins/gpu_neon/gpu.c
index c68e81c..f1d8993 100644 (file)
--- a/plugins/gpu_neon/gpu.c
+++ b/plugins/gpu_neon/gpu.c
@@ -29,6 +29,7 @@ struct psx_gpu gpu __attribute__((aligned(2048)));
 static noinline void do_reset(void)
 {
   memset(gpu.regs, 0, sizeof(gpu.regs));
+  memset(gpu.ex_regs, 0, sizeof(gpu.ex_regs));
   gpu.status.reg = 0x14802000;
   gpu.gp0 = 0;
   gpu.regs[3] = 1;
@@ -188,9 +189,9 @@ const unsigned char cmd_lengths[256] =
        0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0,
        3, 3, 3, 3, 6, 6, 6, 6, 4, 4, 4, 4, 8, 8, 8, 8, // 20
        5, 5, 5, 5, 8, 8, 8, 8, 7, 7, 7, 7, 11, 11, 11, 11,
-       2, 2, 2, 2, 0, 0, 0, 0, 3, 3, 3, 3, 3, 3, 3, 3, // 40
-       3, 3, 3, 3, 0, 0, 0, 0, 4, 4, 4, 4, 4, 4, 4, 4,
-       2, 2, 2, 2, 3, 3, 3, 3, 1, 1, 1, 1, 2, 2, 2, 2, // 60
+       2, 2, 2, 2, 2, 2, 2, 2, 3, 3, 3, 3, 3, 3, 3, 3, // 40
+       3, 3, 3, 3, 3, 3, 3, 3, 4, 4, 4, 4, 4, 4, 4, 4,
+       2, 2, 2, 2, 3, 3, 3, 3, 1, 1, 1, 1, 0, 0, 0, 0, // 60
        1, 1, 1, 1, 2, 2, 2, 2, 1, 1, 1, 1, 2, 2, 2, 2,
        3, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, // 80
        0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0,
@@ -264,16 +265,20 @@ static void start_vram_transfer(uint32_t pos_word, uint32_t size_word, int is_re
   if (gpu.dma.h)
     log_anomaly("start_vram_transfer while old unfinished\n");
 
-  gpu.dma.x = pos_word & 1023;
-  gpu.dma.y = (pos_word >> 16) & 511;
-  gpu.dma.w = size_word & 0xffff; // ?
-  gpu.dma.h = size_word >> 16;
+  gpu.dma.x = pos_word & 0x3ff;
+  gpu.dma.y = (pos_word >> 16) & 0x1ff;
+  gpu.dma.w = size_word & 0x3ff;
+  gpu.dma.h = (size_word >> 16) & 0x1ff;
   gpu.dma.offset = 0;
 
-  if (is_read)
+  renderer_flush_queues();
+  if (is_read) {
     gpu.status.img = 1;
+    // XXX: wrong for width 1
+    memcpy(&gpu.gp0, VRAM_MEM_XY(gpu.dma.x, gpu.dma.y), 4);
+    gpu.state.last_vram_read_frame = *gpu.state.frame_count;
+  }
   else {
-    renderer_flush_queues();
     renderer_invalidate_caches(gpu.dma.x, gpu.dma.y, gpu.dma.w, gpu.dma.h);
   }
 
@@ -359,7 +364,7 @@ static int check_cmd(uint32_t *data, int count)
   return count - pos;
 }
 
-void flush_cmd_buffer(void)
+static void flush_cmd_buffer(void)
 {
   int left = check_cmd(gpu.cmd_buffer, gpu.cmd_len);
   if (left > 0)
@@ -394,7 +399,7 @@ long GPUdmaChain(uint32_t *rambase, uint32_t start_addr)
   uint32_t addr, *list;
   uint32_t *llist_entry = NULL;
   int len, left, count;
-  long dma_words = 0;
+  long cpu_cycles = 0;
 
   if (unlikely(gpu.cmd_len > 0))
     flush_cmd_buffer();
@@ -402,7 +407,7 @@ long GPUdmaChain(uint32_t *rambase, uint32_t start_addr)
   // ff7 sends it's main list twice, detect this
   if (*gpu.state.frame_count == gpu.state.last_list.frame &&
       *gpu.state.hcnt - gpu.state.last_list.hcnt <= 1 &&
-       gpu.state.last_list.words > 1024)
+       gpu.state.last_list.cycles > 2048)
   {
     llist_entry = rambase + (gpu.state.last_list.addr & 0x1fffff) / 4;
     *llist_entry |= 0x800000;
@@ -415,7 +420,9 @@ long GPUdmaChain(uint32_t *rambase, uint32_t start_addr)
     list = rambase + (addr & 0x1fffff) / 4;
     len = list[0] >> 24;
     addr = list[0] & 0xffffff;
-    dma_words += 1 + len;
+    cpu_cycles += 10;
+    if (len > 0)
+      cpu_cycles += 5 + len;
 
     log_io(".chain %08x #%d\n", (list - rambase) * 4, len);
 
@@ -446,10 +453,10 @@ long GPUdmaChain(uint32_t *rambase, uint32_t start_addr)
 
   gpu.state.last_list.frame = *gpu.state.frame_count;
   gpu.state.last_list.hcnt = *gpu.state.hcnt;
-  gpu.state.last_list.words = dma_words;
+  gpu.state.last_list.cycles = cpu_cycles;
   gpu.state.last_list.addr = start_addr;
 
-  return dma_words;
+  return cpu_cycles;
 }
 
 void GPUreadDataMem(uint32_t *mem, int count)
@@ -465,15 +472,17 @@ void GPUreadDataMem(uint32_t *mem, int count)
 
 uint32_t GPUreadData(void)
 {
-  log_io("gpu_read\n");
+  uint32_t ret;
 
   if (unlikely(gpu.cmd_len > 0))
     flush_cmd_buffer();
 
+  ret = gpu.gp0;
   if (gpu.dma.h)
-    do_vram_io(&gpu.gp0, 1, 1);
+    do_vram_io(&ret, 1, 1);
 
-  return gpu.gp0;
+  log_io("gpu_read %08x\n", ret);
+  return ret;
 }
 
 uint32_t GPUreadStatus(void)
@@ -526,4 +535,65 @@ long GPUfreeze(uint32_t type, struct GPUFreeze *freeze)
   return 1;
 }
 
+void GPUupdateLace(void)
+{
+  if (gpu.cmd_len > 0)
+    flush_cmd_buffer();
+  renderer_flush_queues();
+
+  if (gpu.status.blanking || !gpu.state.fb_dirty)
+    return;
+
+  if (gpu.frameskip.set) {
+    if (!gpu.frameskip.frame_ready) {
+      if (*gpu.state.frame_count - gpu.frameskip.last_flip_frame < 9)
+        return;
+      gpu.frameskip.active = 0;
+    }
+    gpu.frameskip.frame_ready = 0;
+  }
+
+  vout_update();
+  gpu.state.fb_dirty = 0;
+}
+
+void GPUvBlank(int is_vblank, int lcf)
+{
+  int interlace = gpu.state.allow_interlace
+    && gpu.status.interlace && gpu.status.dheight;
+  // interlace doesn't look nice on progressive displays,
+  // so we have this "auto" mode here for games that don't read vram
+  if (gpu.state.allow_interlace == 2
+      && *gpu.state.frame_count - gpu.state.last_vram_read_frame > 1)
+  {
+    interlace = 0;
+  }
+  if (interlace || interlace != gpu.state.old_interlace) {
+    gpu.state.old_interlace = interlace;
+
+    if (gpu.cmd_len > 0)
+      flush_cmd_buffer();
+    renderer_flush_queues();
+    renderer_set_interlace(interlace, !lcf);
+  }
+}
+
+#include "../../frontend/plugin_lib.h"
+
+void GPUrearmedCallbacks(const struct rearmed_cbs *cbs)
+{
+  gpu.frameskip.set = cbs->frameskip;
+  gpu.frameskip.advice = &cbs->fskip_advice;
+  gpu.frameskip.active = 0;
+  gpu.frameskip.frame_ready = 1;
+  gpu.state.hcnt = cbs->gpu_hcnt;
+  gpu.state.frame_count = cbs->gpu_frame_count;
+  gpu.state.allow_interlace = cbs->gpu_neon.allow_interlace;
+
+  if (cbs->pl_vout_set_raw_vram)
+    cbs->pl_vout_set_raw_vram(gpu.vram);
+  renderer_set_config(cbs);
+  vout_set_config(cbs);
+}
+
 // vim:shiftwidth=2:expandtab