gpus: return DMA word count to avoid 1 list walk

[pcsx_rearmed.git] / plugins / gpu_unai / gpu.cpp

diff --git a/plugins/gpu_unai/gpu.cpp b/plugins/gpu_unai/gpu.cpp
index 5152327..9b0a0dc 100644 (file)
--- a/plugins/gpu_unai/gpu.cpp
+++ b/plugins/gpu_unai/gpu.cpp
@@ -331,7 +331,7 @@ INLINE int CheckForEndlessLoop(u32 *laddr)
 }
 
 ///////////////////////////////////////////////////////////////////////////////
-void  GPU_dmaChain(u32* baseAddr, u32 dmaVAddr)
+long GPU_dmaChain(u32* baseAddr, u32 dmaVAddr)
 {
 #ifdef DEBUG_ANALYSIS
        dbg_anacnt_GPU_dmaChain++;
@@ -339,6 +339,7 @@ void  GPU_dmaChain(u32* baseAddr, u32 dmaVAddr)
        pcsx4all_prof_start_with_pause(PCSX4ALL_PROF_GPU,PCSX4ALL_PROF_HW_WRITE);
        u32 data, *address, count, offset;
        unsigned int DMACommandCounter = 0;
+       long dma_words = 0;
 
        GPU_GP1 &= ~0x14000000;
        lUsedAddr[0]=lUsedAddr[1]=lUsedAddr[2]=(u32*)0x1fffff;
@@ -355,9 +356,12 @@ void  GPU_dmaChain(u32* baseAddr, u32 dmaVAddr)
                else dmaVAddr = 0x1FFFFF;
 
                if(count>0) GPU_writeDataMem(address,count);
+               dma_words += 1 + count;
        }
        GPU_GP1 = (GPU_GP1 | 0x14000000) & ~0x60000000;
        pcsx4all_prof_end_with_resume(PCSX4ALL_PROF_GPU,PCSX4ALL_PROF_HW_WRITE);
+
+       return dma_words;
 }
 
 ///////////////////////////////////////////////////////////////////////////////
@@ -879,7 +883,7 @@ static void blit(void)
        u16 *srcs;
        u8  *dest;
 
-       x0 = DisplayArea[0] & ~3; // alignment needed by blitter
+       x0 = DisplayArea[0] & ~1; // alignment needed by blitter
        y0 = DisplayArea[1];
        srcs = &((u16*)GPU_FrameBuffer)[FRAME_OFFSET(x0,y0)];
 
@@ -938,7 +942,7 @@ void GPU_updateLace(void)
                blit();
 
                fb_dirty = false;
-               if (*cbs->fskip_option)
+               if (cbs->fskip_advice)
                        isSkip = true;
        }
        else