X-Git-Url: https://notaz.gp2x.de/cgi-bin/gitweb.cgi?p=pcsx_rearmed.git;a=blobdiff_plain;f=libpcsxcore%2Fnew_dynarec%2Fassem_arm.c;h=186d0af40941ea2b28fd4f1b7f9869a571349a15;hp=4953faa03c5b3e0a4a1ef6f63bc55e41f881a358;hb=e3c6bdb5e46f72f063bb7f588da6588ac1893b17;hpb=8062d65a99a541d3092672655e11cb2babfe3857

diff --git a/libpcsxcore/new_dynarec/assem_arm.c b/libpcsxcore/new_dynarec/assem_arm.c
index 4953faa0..186d0af4 100644
--- a/libpcsxcore/new_dynarec/assem_arm.c
+++ b/libpcsxcore/new_dynarec/assem_arm.c
@@ -1,7 +1,7 @@
 /* * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * *
  *   Mupen64plus/PCSX - assem_arm.c                                        *
  *   Copyright (C) 2009-2011 Ari64                                         *
- *   Copyright (C) 2010-2011 Gražvydas "notaz" Ignotas                     *
+ *   Copyright (C) 2010-2021 Gražvydas "notaz" Ignotas                     *
  *                                                                         *
  *   This program is free software; you can redistribute it and/or modify  *
  *   it under the terms of the GNU General Public License as published by  *
@@ -19,7 +19,6 @@
  *   51 Franklin Street, Fifth Floor, Boston, MA 02110-1301, USA.          *
  * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * */
 
-#include "../gte.h"
 #define FLAGLESS
 #include "../gte.h"
 #undef FLAGLESS
@@ -28,13 +27,6 @@
 #include "pcnt.h"
 #include "arm_features.h"
 
-#if   defined(BASE_ADDR_FIXED)
-#elif defined(BASE_ADDR_DYNAMIC)
-u_char *translation_cache;
-#else
-u_char translation_cache[1 << TARGET_SIZE_2] __attribute__((aligned(4096)));
-#endif
-
 #ifndef __MACH__
 #define CALLER_SAVE_REGS 0x100f
 #else
@@ -49,15 +41,6 @@ u_char translation_cache[1 << TARGET_SIZE_2] __attribute__((aligned(4096)));
 #pragma GCC diagnostic ignored "-Wunused-but-set-variable"
 #endif
 
-extern int cycle_count;
-extern int last_count;
-extern int pcaddr;
-extern int pending_exception;
-extern int branch_target;
-extern uint64_t readmem_dword;
-extern void *dynarec_local;
-extern u_int mini_ht[32][2];
-
 void indirect_jump_indexed();
 void indirect_jump();
 void do_interrupt();
@@ -246,7 +229,7 @@ static void *get_clean_addr(void *addr)
   return ptr;
 }
 
-static int verify_dirty(u_int *ptr)
+static int verify_dirty(const u_int *ptr)
 {
   #ifndef HAVE_ARMV7
   u_int offset;
@@ -290,7 +273,6 @@ static int isclean(void *addr)
   if((*ptr&0xFF000000)!=0xeb000000) ptr++;
   if((*ptr&0xFF000000)!=0xeb000000) return 1; // bl instruction
   if((int)ptr+((*ptr<<8)>>6)+8==(int)verify_code) return 0;
-  if((int)ptr+((*ptr<<8)>>6)+8==(int)verify_code_vm) return 0;
   if((int)ptr+((*ptr<<8)>>6)+8==(int)verify_code_ds) return 0;
   return 1;
 }
@@ -424,17 +406,23 @@ static void genimm_checked(u_int imm,u_int *encoded)
 
 static u_int genjmp(u_int addr)
 {
-  int offset=addr-(int)out-8;
-  if(offset<-33554432||offset>=33554432) {
-    if (addr>2) {
-      SysPrintf("genjmp: out of range: %08x\n", offset);
-      exit(1);
-    }
+  if (addr < 3) return 0; // a branch that will be patched later
+  int offset = addr-(int)out-8;
+  if (offset < -33554432 || offset >= 33554432) {
+    SysPrintf("genjmp: out of range: %08x\n", offset);
+    abort();
     return 0;
   }
   return ((u_int)offset>>2)&0xffffff;
 }
 
+static unused void emit_breakpoint(void)
+{
+  assem_debug("bkpt #0\n");
+  //output_w32(0xe1200070);
+  output_w32(0xe7f001f0);
+}
+
 static void emit_mov(int rs,int rt)
 {
   assem_debug("mov %s,%s\n",regname[rt],regname[rs]);
@@ -453,12 +441,6 @@ static void emit_add(int rs1,int rs2,int rt)
   output_w32(0xe0800000|rd_rn_rm(rt,rs1,rs2));
 }
 
-static void emit_adds(int rs1,int rs2,int rt)
-{
-  assem_debug("adds %s,%s,%s\n",regname[rt],regname[rs1],regname[rs2]);
-  output_w32(0xe0900000|rd_rn_rm(rt,rs1,rs2));
-}
-
 static void emit_adcs(int rs1,int rs2,int rt)
 {
   assem_debug("adcs %s,%s,%s\n",regname[rt],regname[rs1],regname[rs2]);
@@ -547,12 +529,15 @@ static void emit_loadreg(int r, int hr)
   if((r&63)==0)
     emit_zeroreg(hr);
   else {
-    int addr=((int)reg)+((r&63)<<REG_SHIFT)+((r&64)>>4);
-    if((r&63)==HIREG) addr=(int)&hi+((r&64)>>4);
-    if((r&63)==LOREG) addr=(int)&lo+((r&64)>>4);
-    if(r==CCREG) addr=(int)&cycle_count;
-    if(r==CSREG) addr=(int)&Status;
-    if(r==INVCP) addr=(int)&invc_ptr;
+    int addr = (int)&psxRegs.GPR.r[r];
+    switch (r) {
+    //case HIREG: addr = &hi; break;
+    //case LOREG: addr = &lo; break;
+    case CCREG: addr = (int)&cycle_count; break;
+    case CSREG: addr = (int)&Status; break;
+    case INVCP: addr = (int)&invc_ptr; break;
+    default: assert(r < 34); break;
+    }
     u_int offset = addr-(u_int)&dynarec_local;
     assert(offset<4096);
     assem_debug("ldr %s,fp+%d\n",regname[hr],offset);
@@ -567,10 +552,13 @@ static void emit_storereg(int r, int hr)
     assert(0);
     return;
   }
-  int addr=((int)reg)+((r&63)<<REG_SHIFT)+((r&64)>>4);
-  if((r&63)==HIREG) addr=(int)&hi+((r&64)>>4);
-  if((r&63)==LOREG) addr=(int)&lo+((r&64)>>4);
-  if(r==CCREG) addr=(int)&cycle_count;
+  int addr = (int)&psxRegs.GPR.r[r];
+  switch (r) {
+  //case HIREG: addr = &hi; break;
+  //case LOREG: addr = &lo; break;
+  case CCREG: addr = (int)&cycle_count; break;
+  default: assert(r < 34); break;
+  }
   u_int offset = addr-(u_int)&dynarec_local;
   assert(offset<4096);
   assem_debug("str %s,fp+%d\n",regname[hr],offset);
@@ -605,12 +593,6 @@ static void emit_not(int rs,int rt)
   output_w32(0xe1e00000|rd_rn_rm(rt,0,rs));
 }
 
-static void emit_mvnmi(int rs,int rt)
-{
-  assem_debug("mvnmi %s,%s\n",regname[rt],regname[rs]);
-  output_w32(0x41e00000|rd_rn_rm(rt,0,rs));
-}
-
 static void emit_and(u_int rs1,u_int rs2,u_int rt)
 {
   assem_debug("and %s,%s,%s\n",regname[rt],regname[rs1],regname[rs2]);
@@ -647,6 +629,12 @@ static void emit_xor(u_int rs1,u_int rs2,u_int rt)
   output_w32(0xe0200000|rd_rn_rm(rt,rs1,rs2));
 }
 
+static void emit_xorsar_imm(u_int rs1,u_int rs2,u_int imm,u_int rt)
+{
+  assem_debug("eor %s,%s,%s,asr #%d\n",regname[rt],regname[rs1],regname[rs2],imm);
+  output_w32(0xe0200040|rd_rn_rm(rt,rs1,rs2)|(imm<<7));
+}
+
 static void emit_addimm(u_int rs,int imm,u_int rt)
 {
   assert(rs<16);
@@ -723,23 +711,6 @@ static void emit_addnop(u_int r)
   output_w32(0xe2800000|rd_rn_rm(r,r,0));
 }
 
-static void emit_adcimm(u_int rs,int imm,u_int rt)
-{
-  u_int armval;
-  genimm_checked(imm,&armval);
-  assem_debug("adc %s,%s,#%d\n",regname[rt],regname[rs],imm);
-  output_w32(0xe2a00000|rd_rn_rm(rt,rs,0)|armval);
-}
-
-static void emit_addimm64_32(int rsh,int rsl,int imm,int rth,int rtl)
-{
-  // TODO: if(genimm(imm,&armval)) ...
-  // else
-  emit_movimm(imm,HOST_TEMPREG);
-  emit_adds(HOST_TEMPREG,rsl,rtl);
-  emit_adcimm(rsh,0,rth);
-}
-
 static void emit_andimm(int rs,int imm,int rt)
 {
   u_int armval;
@@ -909,7 +880,7 @@ static void emit_sar(u_int rs,u_int shift,u_int rt)
   output_w32(0xe1a00000|rd_rn_rm(rt,0,rs)|0x50|(shift<<8));
 }
 
-static void emit_orrshl(u_int rs,u_int shift,u_int rt)
+static unused void emit_orrshl(u_int rs,u_int shift,u_int rt)
 {
   assert(rs<16);
   assert(rt<16);
@@ -918,7 +889,7 @@ static void emit_orrshl(u_int rs,u_int shift,u_int rt)
   output_w32(0xe1800000|rd_rn_rm(rt,rt,rs)|0x10|(shift<<8));
 }
 
-static void emit_orrshr(u_int rs,u_int shift,u_int rt)
+static unused void emit_orrshr(u_int rs,u_int shift,u_int rt)
 {
   assert(rs<16);
   assert(rt<16);
@@ -973,6 +944,14 @@ static void emit_cmovb_imm(int imm,int rt)
   output_w32(0x33a00000|rd_rn_rm(rt,0,0)|armval);
 }
 
+static void emit_cmovae_imm(int imm,int rt)
+{
+  assem_debug("movcs %s,#%d\n",regname[rt],imm);
+  u_int armval;
+  genimm_checked(imm,&armval);
+  output_w32(0x23a00000|rd_rn_rm(rt,0,0)|armval);
+}
+
 static void emit_cmovne_reg(int rs,int rt)
 {
   assem_debug("movne %s,%s\n",regname[rt],regname[rs]);
@@ -985,6 +964,12 @@ static void emit_cmovl_reg(int rs,int rt)
   output_w32(0xb1a00000|rd_rn_rm(rt,0,rs));
 }
 
+static void emit_cmovb_reg(int rs,int rt)
+{
+  assem_debug("movcc %s,%s\n",regname[rt],regname[rs]);
+  output_w32(0x31a00000|rd_rn_rm(rt,0,rs));
+}
+
 static void emit_cmovs_reg(int rs,int rt)
 {
   assem_debug("movmi %s,%s\n",regname[rt],regname[rs]);
@@ -1047,10 +1032,16 @@ static void emit_set_if_carry32(int rs1, int rs2, int rt)
   emit_cmovb_imm(1,rt);
 }
 
+static int can_jump_or_call(const void *a)
+{
+  intptr_t offset = (u_char *)a - out - 8;
+  return (-33554432 <= offset && offset < 33554432);
+}
+
 static void emit_call(const void *a_)
 {
   int a = (int)a_;
-  assem_debug("bl %x (%x+%x)%s\n",a,(int)out,a-(int)out-8,func_name(a));
+  assem_debug("bl %x (%x+%x)%s\n",a,(int)out,a-(int)out-8,func_name(a_));
   u_int offset=genjmp(a);
   output_w32(0xeb000000|offset);
 }
@@ -1058,7 +1049,7 @@ static void emit_call(const void *a_)
 static void emit_jmp(const void *a_)
 {
   int a = (int)a_;
-  assem_debug("b %x (%x+%x)%s\n",a,(int)out,a-(int)out-8,func_name(a));
+  assem_debug("b %x (%x+%x)%s\n",a,(int)out,a-(int)out-8,func_name(a_));
   u_int offset=genjmp(a);
   output_w32(0xea000000|offset);
 }
@@ -1071,56 +1062,63 @@ static void emit_jne(const void *a_)
   output_w32(0x1a000000|offset);
 }
 
-static void emit_jeq(int a)
+static void emit_jeq(const void *a_)
 {
+  int a = (int)a_;
   assem_debug("beq %x\n",a);
   u_int offset=genjmp(a);
   output_w32(0x0a000000|offset);
 }
 
-static void emit_js(int a)
+static void emit_js(const void *a_)
 {
+  int a = (int)a_;
   assem_debug("bmi %x\n",a);
   u_int offset=genjmp(a);
   output_w32(0x4a000000|offset);
 }
 
-static void emit_jns(int a)
+static void emit_jns(const void *a_)
 {
+  int a = (int)a_;
   assem_debug("bpl %x\n",a);
   u_int offset=genjmp(a);
   output_w32(0x5a000000|offset);
 }
 
-static void emit_jl(int a)
+static void emit_jl(const void *a_)
 {
+  int a = (int)a_;
   assem_debug("blt %x\n",a);
   u_int offset=genjmp(a);
   output_w32(0xba000000|offset);
 }
 
-static void emit_jge(int a)
+static void emit_jge(const void *a_)
 {
+  int a = (int)a_;
   assem_debug("bge %x\n",a);
   u_int offset=genjmp(a);
   output_w32(0xaa000000|offset);
 }
 
-static void emit_jno(int a)
+static void emit_jno(const void *a_)
 {
+  int a = (int)a_;
   assem_debug("bvc %x\n",a);
   u_int offset=genjmp(a);
   output_w32(0x7a000000|offset);
 }
 
-static void emit_jc(int a)
+static void emit_jc(const void *a_)
 {
+  int a = (int)a_;
   assem_debug("bcs %x\n",a);
   u_int offset=genjmp(a);
   output_w32(0x2a000000|offset);
 }
 
-static void emit_jcc(void *a_)
+static void emit_jcc(const void *a_)
 {
   int a = (int)a_;
   assem_debug("bcc %x\n",a);
@@ -1128,7 +1126,7 @@ static void emit_jcc(void *a_)
   output_w32(0x3a000000|offset);
 }
 
-static void emit_callreg(u_int r)
+static unused void emit_callreg(u_int r)
 {
   assert(r<15);
   assem_debug("blx %s\n",regname[r]);
@@ -1141,6 +1139,11 @@ static void emit_jmpreg(u_int r)
   output_w32(0xe1a00000|rd_rn_rm(15,0,r));
 }
 
+static void emit_ret(void)
+{
+  emit_jmpreg(14);
+}
+
 static void emit_readword_indexed(int offset, int rs, int rt)
 {
   assert(offset>-4096&&offset<4096);
@@ -1388,7 +1391,7 @@ static void emit_teq(int rs, int rt)
   output_w32(0xe1300000|rd_rn_rm(0,rs,rt));
 }
 
-static void emit_rsbimm(int rs, int imm, int rt)
+static unused void emit_rsbimm(int rs, int imm, int rt)
 {
   u_int armval;
   genimm_checked(imm,&armval);
@@ -1396,21 +1399,6 @@ static void emit_rsbimm(int rs, int imm, int rt)
   output_w32(0xe2600000|rd_rn_rm(rt,rs,0)|armval);
 }
 
-// Load 2 immediates optimizing for small code size
-static void emit_mov2imm_compact(int imm1,u_int rt1,int imm2,u_int rt2)
-{
-  emit_movimm(imm1,rt1);
-  u_int armval;
-  if(genimm(imm2-imm1,&armval)) {
-    assem_debug("add %s,%s,#%d\n",regname[rt2],regname[rt1],imm2-imm1);
-    output_w32(0xe2800000|rd_rn_rm(rt2,rt1,0)|armval);
-  }else if(genimm(imm1-imm2,&armval)) {
-    assem_debug("sub %s,%s,#%d\n",regname[rt2],regname[rt1],imm1-imm2);
-    output_w32(0xe2400000|rd_rn_rm(rt2,rt1,0)|armval);
-  }
-  else emit_movimm(imm2,rt2);
-}
-
 // Conditionally select one of two immediates, optimizing for small code size
 // This will only be called if HAVE_CMOV_IMM is defined
 static void emit_cmov2imm_e_ne_compact(int imm1,int imm2,u_int rt)
@@ -1593,7 +1581,8 @@ static void literal_pool_jumpover(int n)
   set_jump_target(jaddr, out);
 }
 
-static void emit_extjump2(u_char *addr, int target, void *linker)
+// parsed by get_pointer, find_extjump_insn
+static void emit_extjump2(u_char *addr, u_int target, void *linker)
 {
   u_char *ptr=(u_char *)addr;
   assert((ptr[3]&0x0e)==0xa);
@@ -1601,7 +1590,7 @@ static void emit_extjump2(u_char *addr, int target, void *linker)
 
   emit_loadlp(target,0);
   emit_loadlp((u_int)addr,1);
-  assert(addr>=translation_cache&&addr<(translation_cache+(1<<TARGET_SIZE_2)));
+  assert(addr>=ndrc->translation_cache&&addr<(ndrc->translation_cache+(1<<TARGET_SIZE_2)));
   //assert((target>=0x80000000&&target<0x80800000)||(target>0xA4000000&&target<0xA4001000));
 //DEBUG >
 #ifdef DEBUG_CYCLE_COUNT
@@ -1613,17 +1602,14 @@ static void emit_extjump2(u_char *addr, int target, void *linker)
   emit_writeword(ECX,&last_count);
 #endif
 //DEBUG <
-  emit_jmp(linker);
-}
-
-static void emit_extjump(void *addr, int target)
-{
-  emit_extjump2(addr, target, dyna_linker);
+  emit_far_jump(linker);
 }
 
-static void emit_extjump_ds(void *addr, int target)
+static void check_extjump2(void *src)
 {
-  emit_extjump2(addr, target, dyna_linker_ds);
+  u_int *ptr = src;
+  assert((ptr[1] & 0x0fff0000) == 0x059f0000); // ldr rx, [pc, #ofs]
+  (void)ptr;
 }
 
 // put rt_val into rt, potentially making use of rs with value rs_val
@@ -1670,23 +1656,6 @@ static int is_similar_value(u_int v1,u_int v2)
   return 0;
 }
 
-// trashes r2
-static void pass_args(int a0, int a1)
-{
-  if(a0==1&&a1==0) {
-    // must swap
-    emit_mov(a0,2); emit_mov(a1,1); emit_mov(2,0);
-  }
-  else if(a0!=0&&a1==0) {
-    emit_mov(a1,1);
-    if (a0>=0) emit_mov(a0,0);
-  }
-  else {
-    if(a0>=0&&a0!=0) emit_mov(a0,0);
-    if(a1>=0&&a1!=1) emit_mov(a1,1);
-  }
-}
-
 static void mov_loadtype_adj(enum stub_type type,int rs,int rt)
 {
   switch(type) {
@@ -1710,9 +1679,9 @@ static void do_readstub(int n)
   enum stub_type type=stubs[n].type;
   int i=stubs[n].a;
   int rs=stubs[n].b;
-  struct regstat *i_regs=(struct regstat *)stubs[n].c;
+  const struct regstat *i_regs=(struct regstat *)stubs[n].c;
   u_int reglist=stubs[n].e;
-  signed char *i_regmap=i_regs->regmap;
+  const signed char *i_regmap=i_regs->regmap;
   int rt;
   if(itype[i]==C1LS||itype[i]==C2LS||itype[i]==LOADLR) {
     rt=get_reg(i_regmap,FTEMP);
@@ -1772,8 +1741,8 @@ static void do_readstub(int n)
   int cc=get_reg(i_regmap,CCREG);
   if(cc<0)
     emit_loadreg(CCREG,2);
-  emit_addimm(cc<0?2:cc,CLOCK_ADJUST((int)stubs[n].d+1),2);
-  emit_call(handler);
+  emit_addimm(cc<0?2:cc,CLOCK_ADJUST((int)stubs[n].d),2);
+  emit_far_call(handler);
   if(itype[i]==C1LS||itype[i]==C2LS||(rt>=0&&rt1[i]!=0)) {
     mov_loadtype_adj(type,0,rt);
   }
@@ -1783,43 +1752,18 @@ static void do_readstub(int n)
   emit_jmp(stubs[n].retaddr); // return address
 }
 
-// return memhandler, or get directly accessable address and return 0
-static void *get_direct_memhandler(void *table,u_int addr,enum stub_type type,u_int *addr_host)
-{
-  u_int l1,l2=0;
-  l1=((u_int *)table)[addr>>12];
-  if((l1&(1<<31))==0) {
-    u_int v=l1<<1;
-    *addr_host=v+addr;
-    return NULL;
-  }
-  else {
-    l1<<=1;
-    if(type==LOADB_STUB||type==LOADBU_STUB||type==STOREB_STUB)
-      l2=((u_int *)l1)[0x1000/4 + 0x1000/2 + (addr&0xfff)];
-    else if(type==LOADH_STUB||type==LOADHU_STUB||type==STOREH_STUB)
-      l2=((u_int *)l1)[0x1000/4 + (addr&0xfff)/2];
-    else
-      l2=((u_int *)l1)[(addr&0xfff)/4];
-    if((l2&(1<<31))==0) {
-      u_int v=l2<<1;
-      *addr_host=v+(addr&0xfff);
-      return NULL;
-    }
-    return (void *)(l2<<1);
-  }
-}
-
-static void inline_readstub(enum stub_type type, int i, u_int addr, signed char regmap[], int target, int adj, u_int reglist)
+static void inline_readstub(enum stub_type type, int i, u_int addr,
+  const signed char regmap[], int target, int adj, u_int reglist)
 {
   int rs=get_reg(regmap,target);
   int rt=get_reg(regmap,target);
   if(rs<0) rs=get_reg(regmap,-1);
   assert(rs>=0);
-  u_int host_addr=0,is_dynamic,far_call=0;
+  u_int is_dynamic;
+  uintptr_t host_addr = 0;
   void *handler;
   int cc=get_reg(regmap,CCREG);
-  if(pcsx_direct_read(type,addr,CLOCK_ADJUST(adj+1),cc,target?rs:-1,rt))
+  if(pcsx_direct_read(type,addr,CLOCK_ADJUST(adj),cc,target?rs:-1,rt))
     return;
   handler = get_direct_memhandler(mem_rtab, addr, type, &host_addr);
   if (handler == NULL) {
@@ -1855,29 +1799,20 @@ static void inline_readstub(enum stub_type type, int i, u_int addr, signed char
     emit_movimm(addr,0);
   else if(rs!=0)
     emit_mov(rs,0);
-  int offset=(u_char *)handler-out-8;
-  if(offset<-33554432||offset>=33554432) {
-    // unreachable memhandler, a plugin func perhaps
-    emit_movimm((u_int)handler,12);
-    far_call=1;
-  }
   if(cc<0)
     emit_loadreg(CCREG,2);
   if(is_dynamic) {
     emit_movimm(((u_int *)mem_rtab)[addr>>12]<<1,1);
-    emit_addimm(cc<0?2:cc,CLOCK_ADJUST(adj+1),2);
+    emit_addimm(cc<0?2:cc,CLOCK_ADJUST(adj),2);
   }
   else {
     emit_readword(&last_count,3);
-    emit_addimm(cc<0?2:cc,CLOCK_ADJUST(adj+1),2);
+    emit_addimm(cc<0?2:cc,CLOCK_ADJUST(adj),2);
     emit_add(2,3,2);
     emit_writeword(2,&Count);
   }
 
-  if(far_call)
-    emit_callreg(12);
-  else
-    emit_call(handler);
+  emit_far_call(handler);
 
   if(rt>=0&&rt1[i]!=0) {
     switch(type) {
@@ -1900,9 +1835,9 @@ static void do_writestub(int n)
   enum stub_type type=stubs[n].type;
   int i=stubs[n].a;
   int rs=stubs[n].b;
-  struct regstat *i_regs=(struct regstat *)stubs[n].c;
+  const struct regstat *i_regs=(struct regstat *)stubs[n].c;
   u_int reglist=stubs[n].e;
-  signed char *i_regmap=i_regs->regmap;
+  const signed char *i_regmap=i_regs->regmap;
   int rt,r;
   if(itype[i]==C1LS||itype[i]==C2LS) {
     rt=get_reg(i_regmap,r=FTEMP);
@@ -1961,10 +1896,10 @@ static void do_writestub(int n)
   int cc=get_reg(i_regmap,CCREG);
   if(cc<0)
     emit_loadreg(CCREG,2);
-  emit_addimm(cc<0?2:cc,CLOCK_ADJUST((int)stubs[n].d+1),2);
+  emit_addimm(cc<0?2:cc,CLOCK_ADJUST((int)stubs[n].d),2);
   // returns new cycle_count
-  emit_call(handler);
-  emit_addimm(0,-CLOCK_ADJUST((int)stubs[n].d+1),cc<0?2:cc);
+  emit_far_call(handler);
+  emit_addimm(0,-CLOCK_ADJUST((int)stubs[n].d),cc<0?2:cc);
   if(cc<0)
     emit_storereg(CCREG,2);
   if(restore_jump)
@@ -1973,13 +1908,14 @@ static void do_writestub(int n)
   emit_jmp(stubs[n].retaddr);
 }
 
-static void inline_writestub(enum stub_type type, int i, u_int addr, signed char regmap[], int target, int adj, u_int reglist)
+static void inline_writestub(enum stub_type type, int i, u_int addr,
+  const signed char regmap[], int target, int adj, u_int reglist)
 {
   int rs=get_reg(regmap,-1);
   int rt=get_reg(regmap,target);
   assert(rs>=0);
   assert(rt>=0);
-  u_int host_addr=0;
+  uintptr_t host_addr = 0;
   void *handler = get_direct_memhandler(mem_wtab, addr, type, &host_addr);
   if (handler == NULL) {
     if(addr!=host_addr)
@@ -1999,134 +1935,38 @@ static void inline_writestub(enum stub_type type, int i, u_int addr, signed char
   int cc=get_reg(regmap,CCREG);
   if(cc<0)
     emit_loadreg(CCREG,2);
-  emit_addimm(cc<0?2:cc,CLOCK_ADJUST(adj+1),2);
+  emit_addimm(cc<0?2:cc,CLOCK_ADJUST(adj),2);
   emit_movimm((u_int)handler,3);
   // returns new cycle_count
-  emit_call(jump_handler_write_h);
-  emit_addimm(0,-CLOCK_ADJUST(adj+1),cc<0?2:cc);
+  emit_far_call(jump_handler_write_h);
+  emit_addimm(0,-CLOCK_ADJUST(adj),cc<0?2:cc);
   if(cc<0)
     emit_storereg(CCREG,2);
   restore_regs(reglist);
 }
 
-static void do_unalignedwritestub(int n)
+// this output is parsed by verify_dirty, get_bounds, isclean, get_clean_addr
+static void do_dirty_stub_emit_args(u_int arg0)
 {
-  assem_debug("do_unalignedwritestub %x\n",start+stubs[n].a*4);
-  literal_pool(256);
-  set_jump_target(stubs[n].addr, out);
-
-  int i=stubs[n].a;
-  struct regstat *i_regs=(struct regstat *)stubs[n].c;
-  int addr=stubs[n].b;
-  u_int reglist=stubs[n].e;
-  signed char *i_regmap=i_regs->regmap;
-  int temp2=get_reg(i_regmap,FTEMP);
-  int rt;
-  rt=get_reg(i_regmap,rs2[i]);
-  assert(rt>=0);
-  assert(addr>=0);
-  assert(opcode[i]==0x2a||opcode[i]==0x2e); // SWL/SWR only implemented
-  reglist|=(1<<addr);
-  reglist&=~(1<<temp2);
-
-#if 1
-  // don't bother with it and call write handler
-  save_regs(reglist);
-  pass_args(addr,rt);
-  int cc=get_reg(i_regmap,CCREG);
-  if(cc<0)
-    emit_loadreg(CCREG,2);
-  emit_addimm(cc<0?2:cc,CLOCK_ADJUST((int)stubs[n].d+1),2);
-  emit_call((opcode[i]==0x2a?jump_handle_swl:jump_handle_swr));
-  emit_addimm(0,-CLOCK_ADJUST((int)stubs[n].d+1),cc<0?2:cc);
-  if(cc<0)
-    emit_storereg(CCREG,2);
-  restore_regs(reglist);
-  emit_jmp(stubs[n].retaddr); // return address
-#else
-  emit_andimm(addr,0xfffffffc,temp2);
-  emit_writeword(temp2,&address);
-
-  save_regs(reglist);
-  emit_shrimm(addr,16,1);
-  int cc=get_reg(i_regmap,CCREG);
-  if(cc<0) {
-    emit_loadreg(CCREG,2);
-  }
-  emit_movimm((u_int)readmem,0);
-  emit_addimm(cc<0?2:cc,2*stubs[n].d+2,2);
-  emit_call((int)&indirect_jump_indexed);
-  restore_regs(reglist);
-
-  emit_readword(&readmem_dword,temp2);
-  int temp=addr; //hmh
-  emit_shlimm(addr,3,temp);
-  emit_andimm(temp,24,temp);
-#ifdef BIG_ENDIAN_MIPS
-  if (opcode[i]==0x2e) // SWR
-#else
-  if (opcode[i]==0x2a) // SWL
-#endif
-    emit_xorimm(temp,24,temp);
-  emit_movimm(-1,HOST_TEMPREG);
-  if (opcode[i]==0x2a) { // SWL
-    emit_bic_lsr(temp2,HOST_TEMPREG,temp,temp2);
-    emit_orrshr(rt,temp,temp2);
-  }else{
-    emit_bic_lsl(temp2,HOST_TEMPREG,temp,temp2);
-    emit_orrshl(rt,temp,temp2);
-  }
-  emit_readword(&address,addr);
-  emit_writeword(temp2,&word);
-  //save_regs(reglist); // don't need to, no state changes
-  emit_shrimm(addr,16,1);
-  emit_movimm((u_int)writemem,0);
-  //emit_call((int)&indirect_jump_indexed);
-  emit_mov(15,14);
-  emit_readword_dualindexedx4(0,1,15);
-  emit_readword(&Count,HOST_TEMPREG);
-  emit_readword(&next_interupt,2);
-  emit_addimm(HOST_TEMPREG,-2*stubs[n].d-2,HOST_TEMPREG);
-  emit_writeword(2,&last_count);
-  emit_sub(HOST_TEMPREG,2,cc<0?HOST_TEMPREG:cc);
-  if(cc<0) {
-    emit_storereg(CCREG,HOST_TEMPREG);
-  }
-  restore_regs(reglist);
-  emit_jmp(stubs[n].retaddr); // return address
-#endif
-}
-
-static void do_invstub(int n)
-{
-  literal_pool(20);
-  u_int reglist=stubs[n].a;
-  set_jump_target(stubs[n].addr, out);
-  save_regs(reglist);
-  if(stubs[n].b!=0) emit_mov(stubs[n].b,0);
-  emit_call(&invalidate_addr);
-  restore_regs(reglist);
-  emit_jmp(stubs[n].retaddr); // return address
+  #ifndef HAVE_ARMV7
+  emit_loadlp((int)source, 1);
+  emit_loadlp((int)copy, 2);
+  emit_loadlp(slen*4, 3);
+  #else
+  emit_movw(((u_int)source)&0x0000FFFF, 1);
+  emit_movw(((u_int)copy)&0x0000FFFF, 2);
+  emit_movt(((u_int)source)&0xFFFF0000, 1);
+  emit_movt(((u_int)copy)&0xFFFF0000, 2);
+  emit_movw(slen*4, 3);
+  #endif
+  emit_movimm(arg0, 0);
 }
 
-void *do_dirty_stub(int i)
+static void *do_dirty_stub(int i)
 {
   assem_debug("do_dirty_stub %x\n",start+i*4);
-  u_int addr=(u_int)source;
-  // Careful about the code output here, verify_dirty needs to parse it.
-  #ifndef HAVE_ARMV7
-  emit_loadlp(addr,1);
-  emit_loadlp((int)copy,2);
-  emit_loadlp(slen*4,3);
-  #else
-  emit_movw(addr&0x0000FFFF,1);
-  emit_movw(((u_int)copy)&0x0000FFFF,2);
-  emit_movt(addr&0xFFFF0000,1);
-  emit_movt(((u_int)copy)&0xFFFF0000,2);
-  emit_movw(slen*4,3);
-  #endif
-  emit_movimm(start+i*4,0);
-  emit_call((int)start<(int)0xC0000000?&verify_code:&verify_code_vm);
+  do_dirty_stub_emit_args(start + i*4);
+  emit_far_call(verify_code);
   void *entry = out;
   load_regs_entry(i);
   if (entry == out)
@@ -2137,233 +1977,28 @@ void *do_dirty_stub(int i)
 
 static void do_dirty_stub_ds()
 {
-  // Careful about the code output here, verify_dirty needs to parse it.
-  #ifndef HAVE_ARMV7
-  emit_loadlp((int)start<(int)0xC0000000?(int)source:(int)start,1);
-  emit_loadlp((int)copy,2);
-  emit_loadlp(slen*4,3);
-  #else
-  emit_movw(((int)start<(int)0xC0000000?(u_int)source:(u_int)start)&0x0000FFFF,1);
-  emit_movw(((u_int)copy)&0x0000FFFF,2);
-  emit_movt(((int)start<(int)0xC0000000?(u_int)source:(u_int)start)&0xFFFF0000,1);
-  emit_movt(((u_int)copy)&0xFFFF0000,2);
-  emit_movw(slen*4,3);
-  #endif
-  emit_movimm(start+1,0);
-  emit_call(&verify_code_ds);
+  do_dirty_stub_emit_args(start + 1);
+  emit_far_call(verify_code_ds);
 }
 
 /* Special assem */
 
-static void shift_assemble_arm(int i,struct regstat *i_regs)
-{
-  if(rt1[i]) {
-    if(opcode2[i]<=0x07) // SLLV/SRLV/SRAV
-    {
-      signed char s,t,shift;
-      t=get_reg(i_regs->regmap,rt1[i]);
-      s=get_reg(i_regs->regmap,rs1[i]);
-      shift=get_reg(i_regs->regmap,rs2[i]);
-      if(t>=0){
-        if(rs1[i]==0)
-        {
-          emit_zeroreg(t);
-        }
-        else if(rs2[i]==0)
-        {
-          assert(s>=0);
-          if(s!=t) emit_mov(s,t);
-        }
-        else
-        {
-          emit_andimm(shift,31,HOST_TEMPREG);
-          if(opcode2[i]==4) // SLLV
-          {
-            emit_shl(s,HOST_TEMPREG,t);
-          }
-          if(opcode2[i]==6) // SRLV
-          {
-            emit_shr(s,HOST_TEMPREG,t);
-          }
-          if(opcode2[i]==7) // SRAV
-          {
-            emit_sar(s,HOST_TEMPREG,t);
-          }
-        }
-      }
-    } else { // DSLLV/DSRLV/DSRAV
-      signed char sh,sl,th,tl,shift;
-      th=get_reg(i_regs->regmap,rt1[i]|64);
-      tl=get_reg(i_regs->regmap,rt1[i]);
-      sh=get_reg(i_regs->regmap,rs1[i]|64);
-      sl=get_reg(i_regs->regmap,rs1[i]);
-      shift=get_reg(i_regs->regmap,rs2[i]);
-      if(tl>=0){
-        if(rs1[i]==0)
-        {
-          emit_zeroreg(tl);
-          if(th>=0) emit_zeroreg(th);
-        }
-        else if(rs2[i]==0)
-        {
-          assert(sl>=0);
-          if(sl!=tl) emit_mov(sl,tl);
-          if(th>=0&&sh!=th) emit_mov(sh,th);
-        }
-        else
-        {
-          // FIXME: What if shift==tl ?
-          assert(shift!=tl);
-          int temp=get_reg(i_regs->regmap,-1);
-          int real_th=th;
-          if(th<0&&opcode2[i]!=0x14) {th=temp;} // DSLLV doesn't need a temporary register
-          assert(sl>=0);
-          assert(sh>=0);
-          emit_andimm(shift,31,HOST_TEMPREG);
-          if(opcode2[i]==0x14) // DSLLV
-          {
-            if(th>=0) emit_shl(sh,HOST_TEMPREG,th);
-            emit_rsbimm(HOST_TEMPREG,32,HOST_TEMPREG);
-            emit_orrshr(sl,HOST_TEMPREG,th);
-            emit_andimm(shift,31,HOST_TEMPREG);
-            emit_testimm(shift,32);
-            emit_shl(sl,HOST_TEMPREG,tl);
-            if(th>=0) emit_cmovne_reg(tl,th);
-            emit_cmovne_imm(0,tl);
-          }
-          if(opcode2[i]==0x16) // DSRLV
-          {
-            assert(th>=0);
-            emit_shr(sl,HOST_TEMPREG,tl);
-            emit_rsbimm(HOST_TEMPREG,32,HOST_TEMPREG);
-            emit_orrshl(sh,HOST_TEMPREG,tl);
-            emit_andimm(shift,31,HOST_TEMPREG);
-            emit_testimm(shift,32);
-            emit_shr(sh,HOST_TEMPREG,th);
-            emit_cmovne_reg(th,tl);
-            if(real_th>=0) emit_cmovne_imm(0,th);
-          }
-          if(opcode2[i]==0x17) // DSRAV
-          {
-            assert(th>=0);
-            emit_shr(sl,HOST_TEMPREG,tl);
-            emit_rsbimm(HOST_TEMPREG,32,HOST_TEMPREG);
-            if(real_th>=0) {
-              assert(temp>=0);
-              emit_sarimm(th,31,temp);
-            }
-            emit_orrshl(sh,HOST_TEMPREG,tl);
-            emit_andimm(shift,31,HOST_TEMPREG);
-            emit_testimm(shift,32);
-            emit_sar(sh,HOST_TEMPREG,th);
-            emit_cmovne_reg(th,tl);
-            if(real_th>=0) emit_cmovne_reg(temp,th);
-          }
-        }
-      }
-    }
-  }
-}
-#define shift_assemble shift_assemble_arm
-
-static void loadlr_assemble_arm(int i,struct regstat *i_regs)
-{
-  int s,tl,temp,temp2,addr;
-  int offset;
-  void *jaddr=0;
-  int memtarget=0,c=0;
-  int fastload_reg_override=0;
-  u_int hr,reglist=0;
-  tl=get_reg(i_regs->regmap,rt1[i]);
-  s=get_reg(i_regs->regmap,rs1[i]);
-  temp=get_reg(i_regs->regmap,-1);
-  temp2=get_reg(i_regs->regmap,FTEMP);
-  addr=get_reg(i_regs->regmap,AGEN1+(i&1));
-  assert(addr<0);
-  offset=imm[i];
-  for(hr=0;hr<HOST_REGS;hr++) {
-    if(i_regs->regmap[hr]>=0) reglist|=1<<hr;
-  }
-  reglist|=1<<temp;
-  if(offset||s<0||c) addr=temp2;
-  else addr=s;
-  if(s>=0) {
-    c=(i_regs->wasconst>>s)&1;
-    if(c) {
-      memtarget=((signed int)(constmap[i][s]+offset))<(signed int)0x80000000+RAM_SIZE;
-    }
-  }
-  if(!c) {
-    emit_shlimm(addr,3,temp);
-    if (opcode[i]==0x22||opcode[i]==0x26) {
-      emit_andimm(addr,0xFFFFFFFC,temp2); // LWL/LWR
-    }else{
-      emit_andimm(addr,0xFFFFFFF8,temp2); // LDL/LDR
-    }
-    jaddr=emit_fastpath_cmp_jump(i,temp2,&fastload_reg_override);
-  }
-  else {
-    if(ram_offset&&memtarget) {
-      emit_addimm(temp2,ram_offset,HOST_TEMPREG);
-      fastload_reg_override=HOST_TEMPREG;
-    }
-    if (opcode[i]==0x22||opcode[i]==0x26) {
-      emit_movimm(((constmap[i][s]+offset)<<3)&24,temp); // LWL/LWR
-    }else{
-      emit_movimm(((constmap[i][s]+offset)<<3)&56,temp); // LDL/LDR
-    }
-  }
-  if (opcode[i]==0x22||opcode[i]==0x26) { // LWL/LWR
-    if(!c||memtarget) {
-      int a=temp2;
-      if(fastload_reg_override) a=fastload_reg_override;
-      emit_readword_indexed(0,a,temp2);
-      if(jaddr) add_stub_r(LOADW_STUB,jaddr,out,i,temp2,i_regs,ccadj[i],reglist);
-    }
-    else
-      inline_readstub(LOADW_STUB,i,(constmap[i][s]+offset)&0xFFFFFFFC,i_regs->regmap,FTEMP,ccadj[i],reglist);
-    if(rt1[i]) {
-      assert(tl>=0);
-      emit_andimm(temp,24,temp);
-#ifdef BIG_ENDIAN_MIPS
-      if (opcode[i]==0x26) // LWR
-#else
-      if (opcode[i]==0x22) // LWL
-#endif
-        emit_xorimm(temp,24,temp);
-      emit_movimm(-1,HOST_TEMPREG);
-      if (opcode[i]==0x26) {
-        emit_shr(temp2,temp,temp2);
-        emit_bic_lsr(tl,HOST_TEMPREG,temp,tl);
-      }else{
-        emit_shl(temp2,temp,temp2);
-        emit_bic_lsl(tl,HOST_TEMPREG,temp,tl);
-      }
-      emit_or(temp2,tl,tl);
-    }
-    //emit_storereg(rt1[i],tl); // DEBUG
-  }
-  if (opcode[i]==0x1A||opcode[i]==0x1B) { // LDL/LDR
-    assert(0);
-  }
-}
-#define loadlr_assemble loadlr_assemble_arm
-
-static void c2op_prologue(u_int op,u_int reglist)
+static void c2op_prologue(u_int op, int i, const struct regstat *i_regs, u_int reglist)
 {
   save_regs_all(reglist);
+  cop2_call_stall_check(op, i, i_regs, 0);
 #ifdef PCNT
-  emit_movimm(op,0);
-  emit_call((int)pcnt_gte_start);
+  emit_movimm(op, 0);
+  emit_far_call(pcnt_gte_start);
 #endif
-  emit_addimm(FP,(int)&psxRegs.CP2D.r[0]-(int)&dynarec_local,0); // cop2 regs
+  emit_addimm(FP, (u_char *)&psxRegs.CP2D.r[0] - (u_char *)&dynarec_local, 0); // cop2 regs
 }
 
 static void c2op_epilogue(u_int op,u_int reglist)
 {
 #ifdef PCNT
   emit_movimm(op,0);
-  emit_call((int)pcnt_gte_end);
+  emit_far_call(pcnt_gte_end);
 #endif
   restore_regs_all(reglist);
 }
@@ -2371,37 +2006,34 @@ static void c2op_epilogue(u_int op,u_int reglist)
 static void c2op_call_MACtoIR(int lm,int need_flags)
 {
   if(need_flags)
-    emit_call(lm?gteMACtoIR_lm1:gteMACtoIR_lm0);
+    emit_far_call(lm?gteMACtoIR_lm1:gteMACtoIR_lm0);
   else
-    emit_call(lm?gteMACtoIR_lm1_nf:gteMACtoIR_lm0_nf);
+    emit_far_call(lm?gteMACtoIR_lm1_nf:gteMACtoIR_lm0_nf);
 }
 
 static void c2op_call_rgb_func(void *func,int lm,int need_ir,int need_flags)
 {
-  emit_call(func);
+  emit_far_call(func);
   // func is C code and trashes r0
   emit_addimm(FP,(int)&psxRegs.CP2D.r[0]-(int)&dynarec_local,0);
   if(need_flags||need_ir)
     c2op_call_MACtoIR(lm,need_flags);
-  emit_call(need_flags?gteMACtoRGB:gteMACtoRGB_nf);
+  emit_far_call(need_flags?gteMACtoRGB:gteMACtoRGB_nf);
 }
 
-static void c2op_assemble(int i,struct regstat *i_regs)
+static void c2op_assemble(int i, const struct regstat *i_regs)
 {
-  u_int c2op=source[i]&0x3f;
-  u_int hr,reglist_full=0,reglist;
-  int need_flags,need_ir;
-  for(hr=0;hr<HOST_REGS;hr++) {
-    if(i_regs->regmap[hr]>=0) reglist_full|=1<<hr;
-  }
-  reglist=reglist_full&CALLER_SAVE_REGS;
+  u_int c2op = source[i] & 0x3f;
+  u_int reglist_full = get_host_reglist(i_regs->regmap);
+  u_int reglist = reglist_full & CALLER_SAVE_REGS;
+  int need_flags, need_ir;
 
   if (gte_handlers[c2op]!=NULL) {
     need_flags=!(gte_unneeded[i+1]>>63); // +1 because of how liveness detection works
     need_ir=(gte_unneeded[i+1]&0xe00)!=0xe00;
     assem_debug("gte op %08x, unneeded %016llx, need_flags %d, need_ir %d\n",
       source[i],gte_unneeded[i+1],need_flags,need_ir);
-    if(new_dynarec_hacks&NDHACK_GTE_NO_FLAGS)
+    if(HACK_ENABLED(NDHACK_GTE_NO_FLAGS))
       need_flags=0;
     int shift = (source[i] >> 19) & 1;
     int lm = (source[i] >> 10) & 1;
@@ -2413,7 +2045,7 @@ static void c2op_assemble(int i,struct regstat *i_regs)
         int cv = (source[i] >> 13) & 3;
         int mx = (source[i] >> 17) & 3;
         reglist=reglist_full&(CALLER_SAVE_REGS|0xf0); // +{r4-r7}
-        c2op_prologue(c2op,reglist);
+        c2op_prologue(c2op,i,i_regs,reglist);
         /* r4,r5 = VXYZ(v) packed; r6 = &MX11(mx); r7 = &CV1(cv) */
         if(v<3)
           emit_ldrd(v*8,0,4);
@@ -2433,79 +2065,118 @@ static void c2op_assemble(int i,struct regstat *i_regs)
           emit_readword(&zeromem_ptr,7);
 #ifdef __ARM_NEON__
         emit_movimm(source[i],1); // opcode
-        emit_call(gteMVMVA_part_neon);
+        emit_far_call(gteMVMVA_part_neon);
         if(need_flags) {
           emit_movimm(lm,1);
-          emit_call(gteMACtoIR_flags_neon);
+          emit_far_call(gteMACtoIR_flags_neon);
         }
 #else
         if(cv==3&&shift)
-          emit_call((int)gteMVMVA_part_cv3sh12_arm);
+          emit_far_call((int)gteMVMVA_part_cv3sh12_arm);
         else {
           emit_movimm(shift,1);
-          emit_call((int)(need_flags?gteMVMVA_part_arm:gteMVMVA_part_nf_arm));
+          emit_far_call((int)(need_flags?gteMVMVA_part_arm:gteMVMVA_part_nf_arm));
         }
         if(need_flags||need_ir)
           c2op_call_MACtoIR(lm,need_flags);
 #endif
 #else /* if not HAVE_ARMV5 */
-        c2op_prologue(c2op,reglist);
+        c2op_prologue(c2op,i,i_regs,reglist);
         emit_movimm(source[i],1); // opcode
         emit_writeword(1,&psxRegs.code);
-        emit_call((int)(need_flags?gte_handlers[c2op]:gte_handlers_nf[c2op]));
+        emit_far_call(need_flags?gte_handlers[c2op]:gte_handlers_nf[c2op]);
 #endif
         break;
       }
       case GTE_OP:
-        c2op_prologue(c2op,reglist);
-        emit_call(shift?gteOP_part_shift:gteOP_part_noshift);
+        c2op_prologue(c2op,i,i_regs,reglist);
+        emit_far_call(shift?gteOP_part_shift:gteOP_part_noshift);
         if(need_flags||need_ir) {
           emit_addimm(FP,(int)&psxRegs.CP2D.r[0]-(int)&dynarec_local,0);
           c2op_call_MACtoIR(lm,need_flags);
         }
         break;
       case GTE_DPCS:
-        c2op_prologue(c2op,reglist);
+        c2op_prologue(c2op,i,i_regs,reglist);
         c2op_call_rgb_func(shift?gteDPCS_part_shift:gteDPCS_part_noshift,lm,need_ir,need_flags);
         break;
       case GTE_INTPL:
-        c2op_prologue(c2op,reglist);
+        c2op_prologue(c2op,i,i_regs,reglist);
         c2op_call_rgb_func(shift?gteINTPL_part_shift:gteINTPL_part_noshift,lm,need_ir,need_flags);
         break;
       case GTE_SQR:
-        c2op_prologue(c2op,reglist);
-        emit_call(shift?gteSQR_part_shift:gteSQR_part_noshift);
+        c2op_prologue(c2op,i,i_regs,reglist);
+        emit_far_call(shift?gteSQR_part_shift:gteSQR_part_noshift);
         if(need_flags||need_ir) {
           emit_addimm(FP,(int)&psxRegs.CP2D.r[0]-(int)&dynarec_local,0);
           c2op_call_MACtoIR(lm,need_flags);
         }
         break;
       case GTE_DCPL:
-        c2op_prologue(c2op,reglist);
+        c2op_prologue(c2op,i,i_regs,reglist);
         c2op_call_rgb_func(gteDCPL_part,lm,need_ir,need_flags);
         break;
       case GTE_GPF:
-        c2op_prologue(c2op,reglist);
+        c2op_prologue(c2op,i,i_regs,reglist);
         c2op_call_rgb_func(shift?gteGPF_part_shift:gteGPF_part_noshift,lm,need_ir,need_flags);
         break;
       case GTE_GPL:
-        c2op_prologue(c2op,reglist);
+        c2op_prologue(c2op,i,i_regs,reglist);
         c2op_call_rgb_func(shift?gteGPL_part_shift:gteGPL_part_noshift,lm,need_ir,need_flags);
         break;
 #endif
       default:
-        c2op_prologue(c2op,reglist);
+        c2op_prologue(c2op,i,i_regs,reglist);
 #ifdef DRC_DBG
         emit_movimm(source[i],1); // opcode
         emit_writeword(1,&psxRegs.code);
 #endif
-        emit_call(need_flags?gte_handlers[c2op]:gte_handlers_nf[c2op]);
+        emit_far_call(need_flags?gte_handlers[c2op]:gte_handlers_nf[c2op]);
         break;
     }
     c2op_epilogue(c2op,reglist);
   }
 }
 
+static void c2op_ctc2_31_assemble(signed char sl, signed char temp)
+{
+  //value = value & 0x7ffff000;
+  //if (value & 0x7f87e000) value |= 0x80000000;
+  emit_shrimm(sl,12,temp);
+  emit_shlimm(temp,12,temp);
+  emit_testimm(temp,0x7f000000);
+  emit_testeqimm(temp,0x00870000);
+  emit_testeqimm(temp,0x0000e000);
+  emit_orrne_imm(temp,0x80000000,temp);
+}
+
+static void do_mfc2_31_one(u_int copr,signed char temp)
+{
+  emit_readword(&reg_cop2d[copr],temp);
+  emit_testimm(temp,0x8000); // do we need this?
+  emit_andne_imm(temp,0,temp);
+  emit_cmpimm(temp,0xf80);
+  emit_andimm(temp,0xf80,temp);
+  emit_cmovae_imm(0xf80,temp);
+}
+
+static void c2op_mfc2_29_assemble(signed char tl, signed char temp)
+{
+  if (temp < 0) {
+    host_tempreg_acquire();
+    temp = HOST_TEMPREG;
+  }
+  do_mfc2_31_one(9,temp);
+  emit_shrimm(temp,7,tl);
+  do_mfc2_31_one(10,temp);
+  emit_orrshr_imm(temp,2,tl);
+  do_mfc2_31_one(11,temp);
+  emit_orrshl_imm(temp,3,tl);
+  emit_writeword(tl,&reg_cop2d[29]);
+  if (temp == HOST_TEMPREG)
+    host_tempreg_release();
+}
+
 static void multdiv_assemble_arm(int i,struct regstat *i_regs)
 {
   //  case 0x18: MULT
@@ -2559,7 +2230,7 @@ static void multdiv_assemble_arm(int i,struct regstat *i_regs)
         emit_negmi(quotient,quotient); // .. quotient and ..
         emit_negmi(remainder,remainder); // .. remainder for div0 case (will be negated back after jump)
         emit_movs(d2,HOST_TEMPREG);
-        emit_jeq((int)out+52); // Division by zero
+        emit_jeq(out+52); // Division by zero
         emit_negsmi(HOST_TEMPREG,HOST_TEMPREG);
 #ifdef HAVE_ARMV5
         emit_clz(HOST_TEMPREG,quotient);
@@ -2568,7 +2239,7 @@ static void multdiv_assemble_arm(int i,struct regstat *i_regs)
         emit_movimm(0,quotient);
         emit_addpl_imm(quotient,1,quotient);
         emit_lslpls_imm(HOST_TEMPREG,1,HOST_TEMPREG);
-        emit_jns((int)out-2*4);
+        emit_jns(out-2*4);
 #endif
         emit_orimm(quotient,1<<31,quotient);
         emit_shr(quotient,quotient,quotient);
@@ -2595,7 +2266,7 @@ static void multdiv_assemble_arm(int i,struct regstat *i_regs)
         emit_mov(d1,remainder);
         emit_movimm(0xffffffff,quotient); // div0 case
         emit_test(d2,d2);
-        emit_jeq((int)out+40); // Division by zero
+        emit_jeq(out+40); // Division by zero
 #ifdef HAVE_ARMV5
         emit_clz(d2,HOST_TEMPREG);
         emit_movimm(1<<31,quotient);
@@ -2604,7 +2275,7 @@ static void multdiv_assemble_arm(int i,struct regstat *i_regs)
         emit_movimm(0,HOST_TEMPREG);
         emit_addpl_imm(HOST_TEMPREG,1,HOST_TEMPREG);
         emit_lslpls_imm(d2,1,d2);
-        emit_jns((int)out-2*4);
+        emit_jns(out-2*4);
         emit_movimm(1<<31,quotient);
 #endif
         emit_shr(quotient,HOST_TEMPREG,quotient);
@@ -2631,6 +2302,11 @@ static void multdiv_assemble_arm(int i,struct regstat *i_regs)
 }
 #define multdiv_assemble multdiv_assemble_arm
 
+static void do_jump_vaddr(int rs)
+{
+  emit_far_jump(jump_vaddr_reg[rs]);
+}
+
 static void do_preload_rhash(int r) {
   // Don't need this for ARM.  On x86, this puts the value 0xf8 into the
   // register.  On ARM the hash can be done with a single instruction (below)
@@ -2653,11 +2329,11 @@ static void do_miniht_jump(int rs,int rh,int ht) {
   emit_cmp(rh,rs);
   emit_ldreq_indexed(ht,4,15);
   #ifdef CORTEX_A8_BRANCH_PREDICTION_HACK
-  emit_mov(rs,7);
-  emit_jmp(jump_vaddr_reg[7]);
-  #else
-  emit_jmp(jump_vaddr_reg[rs]);
+  if(rs!=7)
+    emit_mov(rs,7);
+  rs=7;
   #endif
+  do_jump_vaddr(rs);
 }
 
 static void do_miniht_insert(u_int return_address,int rt,int temp) {
@@ -2677,51 +2353,18 @@ static void do_miniht_insert(u_int return_address,int rt,int temp) {
   #endif
 }
 
-static void mark_clear_cache(void *target)
-{
-  u_long offset = (u_char *)target - translation_cache;
-  u_int mask = 1u << ((offset >> 12) & 31);
-  if (!(needs_clear_cache[offset >> 17] & mask)) {
-    char *start = (char *)((u_long)target & ~4095ul);
-    start_tcache_write(start, start + 4096);
-    needs_clear_cache[offset >> 17] |= mask;
-  }
-}
-
-// Clearing the cache is rather slow on ARM Linux, so mark the areas
-// that need to be cleared, and then only clear these areas once.
-static void do_clear_cache()
-{
-  int i,j;
-  for (i=0;i<(1<<(TARGET_SIZE_2-17));i++)
-  {
-    u_int bitmap=needs_clear_cache[i];
-    if(bitmap) {
-      u_char *start, *end;
-      for(j=0;j<32;j++)
-      {
-        if(bitmap&(1<<j)) {
-          start=translation_cache+i*131072+j*4096;
-          end=start+4095;
-          j++;
-          while(j<32) {
-            if(bitmap&(1<<j)) {
-              end+=4096;
-              j++;
-            }else{
-              end_tcache_write(start, end);
-              break;
-            }
-          }
-        }
-      }
-      needs_clear_cache[i]=0;
-    }
-  }
-}
-
 // CPU-architecture-specific initialization
-static void arch_init() {
+static void arch_init(void)
+{
+  uintptr_t diff = (u_char *)&ndrc->tramp.f - (u_char *)&ndrc->tramp.ops - 8;
+  struct tramp_insns *ops = ndrc->tramp.ops;
+  size_t i;
+  assert(!(diff & 3));
+  assert(diff < 0x1000);
+  start_tcache_write(ops, (u_char *)ops + sizeof(ndrc->tramp.ops));
+  for (i = 0; i < ARRAY_SIZE(ndrc->tramp.ops); i++)
+    ops[i].ldrpc = 0xe5900000 | rd_rn_rm(15,15,0) | diff; // ldr pc, [=val]
+  end_tcache_write(ops, (u_char *)ops + sizeof(ndrc->tramp.ops));
 }
 
 // vim:shiftwidth=2:expandtab