X-Git-Url: https://notaz.gp2x.de/cgi-bin/gitweb.cgi?p=pcsx_rearmed.git;a=blobdiff_plain;f=libpcsxcore%2Fnew_dynarec%2Fassem_arm.c;h=186d0af40941ea2b28fd4f1b7f9869a571349a15;hp=ed00103fd192701fa960905858719c6064440713;hb=e3c6bdb5e46f72f063bb7f588da6588ac1893b17;hpb=d1e4ebd9988a9a5d9fb38b89f19e24b9ab6029d7 diff --git a/libpcsxcore/new_dynarec/assem_arm.c b/libpcsxcore/new_dynarec/assem_arm.c index ed00103f..186d0af4 100644 --- a/libpcsxcore/new_dynarec/assem_arm.c +++ b/libpcsxcore/new_dynarec/assem_arm.c @@ -1,7 +1,7 @@ /* * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * Mupen64plus/PCSX - assem_arm.c * * Copyright (C) 2009-2011 Ari64 * - * Copyright (C) 2010-2011 Gražvydas "notaz" Ignotas * + * Copyright (C) 2010-2021 Gražvydas "notaz" Ignotas * * * * This program is free software; you can redistribute it and/or modify * * it under the terms of the GNU General Public License as published by * @@ -19,7 +19,6 @@ * 51 Franklin Street, Fifth Floor, Boston, MA 02110-1301, USA. * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * */ -#include "../gte.h" #define FLAGLESS #include "../gte.h" #undef FLAGLESS @@ -28,13 +27,6 @@ #include "pcnt.h" #include "arm_features.h" -#if defined(BASE_ADDR_FIXED) -#elif defined(BASE_ADDR_DYNAMIC) -u_char *translation_cache; -#else -u_char translation_cache[1 << TARGET_SIZE_2] __attribute__((aligned(4096))); -#endif - #ifndef __MACH__ #define CALLER_SAVE_REGS 0x100f #else @@ -237,7 +229,7 @@ static void *get_clean_addr(void *addr) return ptr; } -static int verify_dirty(u_int *ptr) +static int verify_dirty(const u_int *ptr) { #ifndef HAVE_ARMV7 u_int offset; @@ -601,12 +593,6 @@ static void emit_not(int rs,int rt) output_w32(0xe1e00000|rd_rn_rm(rt,0,rs)); } -static void emit_mvnmi(int rs,int rt) -{ - assem_debug("mvnmi %s,%s\n",regname[rt],regname[rs]); - output_w32(0x41e00000|rd_rn_rm(rt,0,rs)); -} - static void emit_and(u_int rs1,u_int rs2,u_int rt) { assem_debug("and %s,%s,%s\n",regname[rt],regname[rs1],regname[rs2]); @@ -643,6 +629,12 @@ static void emit_xor(u_int rs1,u_int rs2,u_int rt) output_w32(0xe0200000|rd_rn_rm(rt,rs1,rs2)); } +static void emit_xorsar_imm(u_int rs1,u_int rs2,u_int imm,u_int rt) +{ + assem_debug("eor %s,%s,%s,asr #%d\n",regname[rt],regname[rs1],regname[rs2],imm); + output_w32(0xe0200040|rd_rn_rm(rt,rs1,rs2)|(imm<<7)); +} + static void emit_addimm(u_int rs,int imm,u_int rt) { assert(rs<16); @@ -888,7 +880,7 @@ static void emit_sar(u_int rs,u_int shift,u_int rt) output_w32(0xe1a00000|rd_rn_rm(rt,0,rs)|0x50|(shift<<8)); } -static void emit_orrshl(u_int rs,u_int shift,u_int rt) +static unused void emit_orrshl(u_int rs,u_int shift,u_int rt) { assert(rs<16); assert(rt<16); @@ -897,7 +889,7 @@ static void emit_orrshl(u_int rs,u_int shift,u_int rt) output_w32(0xe1800000|rd_rn_rm(rt,rt,rs)|0x10|(shift<<8)); } -static void emit_orrshr(u_int rs,u_int shift,u_int rt) +static unused void emit_orrshr(u_int rs,u_int shift,u_int rt) { assert(rs<16); assert(rt<16); @@ -952,6 +944,14 @@ static void emit_cmovb_imm(int imm,int rt) output_w32(0x33a00000|rd_rn_rm(rt,0,0)|armval); } +static void emit_cmovae_imm(int imm,int rt) +{ + assem_debug("movcs %s,#%d\n",regname[rt],imm); + u_int armval; + genimm_checked(imm,&armval); + output_w32(0x23a00000|rd_rn_rm(rt,0,0)|armval); +} + static void emit_cmovne_reg(int rs,int rt) { assem_debug("movne %s,%s\n",regname[rt],regname[rs]); @@ -964,6 +964,12 @@ static void emit_cmovl_reg(int rs,int rt) output_w32(0xb1a00000|rd_rn_rm(rt,0,rs)); } +static void emit_cmovb_reg(int rs,int rt) +{ + assem_debug("movcc %s,%s\n",regname[rt],regname[rs]); + output_w32(0x31a00000|rd_rn_rm(rt,0,rs)); +} + static void emit_cmovs_reg(int rs,int rt) { assem_debug("movmi %s,%s\n",regname[rt],regname[rs]); @@ -1026,6 +1032,12 @@ static void emit_set_if_carry32(int rs1, int rs2, int rt) emit_cmovb_imm(1,rt); } +static int can_jump_or_call(const void *a) +{ + intptr_t offset = (u_char *)a - out - 8; + return (-33554432 <= offset && offset < 33554432); +} + static void emit_call(const void *a_) { int a = (int)a_; @@ -1114,7 +1126,7 @@ static void emit_jcc(const void *a_) output_w32(0x3a000000|offset); } -static void emit_callreg(u_int r) +static unused void emit_callreg(u_int r) { assert(r<15); assem_debug("blx %s\n",regname[r]); @@ -1379,7 +1391,7 @@ static void emit_teq(int rs, int rt) output_w32(0xe1300000|rd_rn_rm(0,rs,rt)); } -static void emit_rsbimm(int rs, int imm, int rt) +static unused void emit_rsbimm(int rs, int imm, int rt) { u_int armval; genimm_checked(imm,&armval); @@ -1578,7 +1590,7 @@ static void emit_extjump2(u_char *addr, u_int target, void *linker) emit_loadlp(target,0); emit_loadlp((u_int)addr,1); - assert(addr>=translation_cache&&addr<(translation_cache+(1<=ndrc->translation_cache&&addr<(ndrc->translation_cache+(1<=0x80000000&&target<0x80800000)||(target>0xA4000000&&target<0xA4001000)); //DEBUG > #ifdef DEBUG_CYCLE_COUNT @@ -1590,7 +1602,7 @@ static void emit_extjump2(u_char *addr, u_int target, void *linker) emit_writeword(ECX,&last_count); #endif //DEBUG < - emit_jmp(linker); + emit_far_jump(linker); } static void check_extjump2(void *src) @@ -1667,9 +1679,9 @@ static void do_readstub(int n) enum stub_type type=stubs[n].type; int i=stubs[n].a; int rs=stubs[n].b; - struct regstat *i_regs=(struct regstat *)stubs[n].c; + const struct regstat *i_regs=(struct regstat *)stubs[n].c; u_int reglist=stubs[n].e; - signed char *i_regmap=i_regs->regmap; + const signed char *i_regmap=i_regs->regmap; int rt; if(itype[i]==C1LS||itype[i]==C2LS||itype[i]==LOADLR) { rt=get_reg(i_regmap,FTEMP); @@ -1729,8 +1741,8 @@ static void do_readstub(int n) int cc=get_reg(i_regmap,CCREG); if(cc<0) emit_loadreg(CCREG,2); - emit_addimm(cc<0?2:cc,CLOCK_ADJUST((int)stubs[n].d+1),2); - emit_call(handler); + emit_addimm(cc<0?2:cc,CLOCK_ADJUST((int)stubs[n].d),2); + emit_far_call(handler); if(itype[i]==C1LS||itype[i]==C2LS||(rt>=0&&rt1[i]!=0)) { mov_loadtype_adj(type,0,rt); } @@ -1740,17 +1752,18 @@ static void do_readstub(int n) emit_jmp(stubs[n].retaddr); // return address } -static void inline_readstub(enum stub_type type, int i, u_int addr, signed char regmap[], int target, int adj, u_int reglist) +static void inline_readstub(enum stub_type type, int i, u_int addr, + const signed char regmap[], int target, int adj, u_int reglist) { int rs=get_reg(regmap,target); int rt=get_reg(regmap,target); if(rs<0) rs=get_reg(regmap,-1); assert(rs>=0); - u_int is_dynamic,far_call=0; + u_int is_dynamic; uintptr_t host_addr = 0; void *handler; int cc=get_reg(regmap,CCREG); - if(pcsx_direct_read(type,addr,CLOCK_ADJUST(adj+1),cc,target?rs:-1,rt)) + if(pcsx_direct_read(type,addr,CLOCK_ADJUST(adj),cc,target?rs:-1,rt)) return; handler = get_direct_memhandler(mem_rtab, addr, type, &host_addr); if (handler == NULL) { @@ -1786,29 +1799,20 @@ static void inline_readstub(enum stub_type type, int i, u_int addr, signed char emit_movimm(addr,0); else if(rs!=0) emit_mov(rs,0); - int offset=(u_char *)handler-out-8; - if(offset<-33554432||offset>=33554432) { - // unreachable memhandler, a plugin func perhaps - emit_movimm((u_int)handler,12); - far_call=1; - } if(cc<0) emit_loadreg(CCREG,2); if(is_dynamic) { emit_movimm(((u_int *)mem_rtab)[addr>>12]<<1,1); - emit_addimm(cc<0?2:cc,CLOCK_ADJUST(adj+1),2); + emit_addimm(cc<0?2:cc,CLOCK_ADJUST(adj),2); } else { emit_readword(&last_count,3); - emit_addimm(cc<0?2:cc,CLOCK_ADJUST(adj+1),2); + emit_addimm(cc<0?2:cc,CLOCK_ADJUST(adj),2); emit_add(2,3,2); emit_writeword(2,&Count); } - if(far_call) - emit_callreg(12); - else - emit_call(handler); + emit_far_call(handler); if(rt>=0&&rt1[i]!=0) { switch(type) { @@ -1831,9 +1835,9 @@ static void do_writestub(int n) enum stub_type type=stubs[n].type; int i=stubs[n].a; int rs=stubs[n].b; - struct regstat *i_regs=(struct regstat *)stubs[n].c; + const struct regstat *i_regs=(struct regstat *)stubs[n].c; u_int reglist=stubs[n].e; - signed char *i_regmap=i_regs->regmap; + const signed char *i_regmap=i_regs->regmap; int rt,r; if(itype[i]==C1LS||itype[i]==C2LS) { rt=get_reg(i_regmap,r=FTEMP); @@ -1892,10 +1896,10 @@ static void do_writestub(int n) int cc=get_reg(i_regmap,CCREG); if(cc<0) emit_loadreg(CCREG,2); - emit_addimm(cc<0?2:cc,CLOCK_ADJUST((int)stubs[n].d+1),2); + emit_addimm(cc<0?2:cc,CLOCK_ADJUST((int)stubs[n].d),2); // returns new cycle_count - emit_call(handler); - emit_addimm(0,-CLOCK_ADJUST((int)stubs[n].d+1),cc<0?2:cc); + emit_far_call(handler); + emit_addimm(0,-CLOCK_ADJUST((int)stubs[n].d),cc<0?2:cc); if(cc<0) emit_storereg(CCREG,2); if(restore_jump) @@ -1904,7 +1908,8 @@ static void do_writestub(int n) emit_jmp(stubs[n].retaddr); } -static void inline_writestub(enum stub_type type, int i, u_int addr, signed char regmap[], int target, int adj, u_int reglist) +static void inline_writestub(enum stub_type type, int i, u_int addr, + const signed char regmap[], int target, int adj, u_int reglist) { int rs=get_reg(regmap,-1); int rt=get_reg(regmap,target); @@ -1930,104 +1935,16 @@ static void inline_writestub(enum stub_type type, int i, u_int addr, signed char int cc=get_reg(regmap,CCREG); if(cc<0) emit_loadreg(CCREG,2); - emit_addimm(cc<0?2:cc,CLOCK_ADJUST(adj+1),2); + emit_addimm(cc<0?2:cc,CLOCK_ADJUST(adj),2); emit_movimm((u_int)handler,3); // returns new cycle_count - emit_call(jump_handler_write_h); - emit_addimm(0,-CLOCK_ADJUST(adj+1),cc<0?2:cc); + emit_far_call(jump_handler_write_h); + emit_addimm(0,-CLOCK_ADJUST(adj),cc<0?2:cc); if(cc<0) emit_storereg(CCREG,2); restore_regs(reglist); } -static void do_unalignedwritestub(int n) -{ - assem_debug("do_unalignedwritestub %x\n",start+stubs[n].a*4); - literal_pool(256); - set_jump_target(stubs[n].addr, out); - - int i=stubs[n].a; - struct regstat *i_regs=(struct regstat *)stubs[n].c; - int addr=stubs[n].b; - u_int reglist=stubs[n].e; - signed char *i_regmap=i_regs->regmap; - int temp2=get_reg(i_regmap,FTEMP); - int rt; - rt=get_reg(i_regmap,rs2[i]); - assert(rt>=0); - assert(addr>=0); - assert(opcode[i]==0x2a||opcode[i]==0x2e); // SWL/SWR only implemented - reglist|=(1<regmap,rt1[i]); - s=get_reg(i_regs->regmap,rs1[i]); - shift=get_reg(i_regs->regmap,rs2[i]); - if(t>=0){ - if(rs1[i]==0) - { - emit_zeroreg(t); - } - else if(rs2[i]==0) - { - assert(s>=0); - if(s!=t) emit_mov(s,t); - } - else - { - emit_andimm(shift,31,HOST_TEMPREG); - if(opcode2[i]==4) // SLLV - { - emit_shl(s,HOST_TEMPREG,t); - } - if(opcode2[i]==6) // SRLV - { - emit_shr(s,HOST_TEMPREG,t); - } - if(opcode2[i]==7) // SRAV - { - emit_sar(s,HOST_TEMPREG,t); - } - } - } - } else { // DSLLV/DSRLV/DSRAV - signed char sh,sl,th,tl,shift; - th=get_reg(i_regs->regmap,rt1[i]|64); - tl=get_reg(i_regs->regmap,rt1[i]); - sh=get_reg(i_regs->regmap,rs1[i]|64); - sl=get_reg(i_regs->regmap,rs1[i]); - shift=get_reg(i_regs->regmap,rs2[i]); - if(tl>=0){ - if(rs1[i]==0) - { - emit_zeroreg(tl); - if(th>=0) emit_zeroreg(th); - } - else if(rs2[i]==0) - { - assert(sl>=0); - if(sl!=tl) emit_mov(sl,tl); - if(th>=0&&sh!=th) emit_mov(sh,th); - } - else - { - // FIXME: What if shift==tl ? - assert(shift!=tl); - int temp=get_reg(i_regs->regmap,-1); - int real_th=th; - if(th<0&&opcode2[i]!=0x14) {th=temp;} // DSLLV doesn't need a temporary register - assert(sl>=0); - assert(sh>=0); - emit_andimm(shift,31,HOST_TEMPREG); - if(opcode2[i]==0x14) // DSLLV - { - if(th>=0) emit_shl(sh,HOST_TEMPREG,th); - emit_rsbimm(HOST_TEMPREG,32,HOST_TEMPREG); - emit_orrshr(sl,HOST_TEMPREG,th); - emit_andimm(shift,31,HOST_TEMPREG); - emit_testimm(shift,32); - emit_shl(sl,HOST_TEMPREG,tl); - if(th>=0) emit_cmovne_reg(tl,th); - emit_cmovne_imm(0,tl); - } - if(opcode2[i]==0x16) // DSRLV - { - assert(th>=0); - emit_shr(sl,HOST_TEMPREG,tl); - emit_rsbimm(HOST_TEMPREG,32,HOST_TEMPREG); - emit_orrshl(sh,HOST_TEMPREG,tl); - emit_andimm(shift,31,HOST_TEMPREG); - emit_testimm(shift,32); - emit_shr(sh,HOST_TEMPREG,th); - emit_cmovne_reg(th,tl); - if(real_th>=0) emit_cmovne_imm(0,th); - } - if(opcode2[i]==0x17) // DSRAV - { - assert(th>=0); - emit_shr(sl,HOST_TEMPREG,tl); - emit_rsbimm(HOST_TEMPREG,32,HOST_TEMPREG); - if(real_th>=0) { - assert(temp>=0); - emit_sarimm(th,31,temp); - } - emit_orrshl(sh,HOST_TEMPREG,tl); - emit_andimm(shift,31,HOST_TEMPREG); - emit_testimm(shift,32); - emit_sar(sh,HOST_TEMPREG,th); - emit_cmovne_reg(th,tl); - if(real_th>=0) emit_cmovne_reg(temp,th); - } - } - } - } - } -} -#define shift_assemble shift_assemble_arm - -static void loadlr_assemble_arm(int i,struct regstat *i_regs) -{ - int s,tl,temp,temp2,addr; - int offset; - void *jaddr=0; - int memtarget=0,c=0; - int fastio_reg_override=-1; - u_int hr,reglist=0; - tl=get_reg(i_regs->regmap,rt1[i]); - s=get_reg(i_regs->regmap,rs1[i]); - temp=get_reg(i_regs->regmap,-1); - temp2=get_reg(i_regs->regmap,FTEMP); - addr=get_reg(i_regs->regmap,AGEN1+(i&1)); - assert(addr<0); - offset=imm[i]; - for(hr=0;hrregmap[hr]>=0) reglist|=1<=0) { - c=(i_regs->wasconst>>s)&1; - if(c) { - memtarget=((signed int)(constmap[i][s]+offset))<(signed int)0x80000000+RAM_SIZE; - } - } - if(!c) { - emit_shlimm(addr,3,temp); - if (opcode[i]==0x22||opcode[i]==0x26) { - emit_andimm(addr,0xFFFFFFFC,temp2); // LWL/LWR - }else{ - emit_andimm(addr,0xFFFFFFF8,temp2); // LDL/LDR - } - jaddr=emit_fastpath_cmp_jump(i,temp2,&fastio_reg_override); - } - else { - if(ram_offset&&memtarget) { - host_tempreg_acquire(); - emit_addimm(temp2,ram_offset,HOST_TEMPREG); - fastio_reg_override=HOST_TEMPREG; - } - if (opcode[i]==0x22||opcode[i]==0x26) { - emit_movimm(((constmap[i][s]+offset)<<3)&24,temp); // LWL/LWR - }else{ - emit_movimm(((constmap[i][s]+offset)<<3)&56,temp); // LDL/LDR - } - } - if (opcode[i]==0x22||opcode[i]==0x26) { // LWL/LWR - if(!c||memtarget) { - int a=temp2; - if(fastio_reg_override>=0) a=fastio_reg_override; - emit_readword_indexed(0,a,temp2); - if(fastio_reg_override==HOST_TEMPREG) host_tempreg_release(); - if(jaddr) add_stub_r(LOADW_STUB,jaddr,out,i,temp2,i_regs,ccadj[i],reglist); - } - else - inline_readstub(LOADW_STUB,i,(constmap[i][s]+offset)&0xFFFFFFFC,i_regs->regmap,FTEMP,ccadj[i],reglist); - if(rt1[i]) { - assert(tl>=0); - emit_andimm(temp,24,temp); -#ifdef BIG_ENDIAN_MIPS - if (opcode[i]==0x26) // LWR -#else - if (opcode[i]==0x22) // LWL -#endif - emit_xorimm(temp,24,temp); - emit_movimm(-1,HOST_TEMPREG); - if (opcode[i]==0x26) { - emit_shr(temp2,temp,temp2); - emit_bic_lsr(tl,HOST_TEMPREG,temp,tl); - }else{ - emit_shl(temp2,temp,temp2); - emit_bic_lsl(tl,HOST_TEMPREG,temp,tl); - } - emit_or(temp2,tl,tl); - } - //emit_storereg(rt1[i],tl); // DEBUG - } - if (opcode[i]==0x1A||opcode[i]==0x1B) { // LDL/LDR - assert(0); - } -} -#define loadlr_assemble loadlr_assemble_arm - -static void c2op_prologue(u_int op,u_int reglist) +static void c2op_prologue(u_int op, int i, const struct regstat *i_regs, u_int reglist) { save_regs_all(reglist); + cop2_call_stall_check(op, i, i_regs, 0); #ifdef PCNT - emit_movimm(op,0); - emit_call((int)pcnt_gte_start); + emit_movimm(op, 0); + emit_far_call(pcnt_gte_start); #endif - emit_addimm(FP,(int)&psxRegs.CP2D.r[0]-(int)&dynarec_local,0); // cop2 regs + emit_addimm(FP, (u_char *)&psxRegs.CP2D.r[0] - (u_char *)&dynarec_local, 0); // cop2 regs } static void c2op_epilogue(u_int op,u_int reglist) { #ifdef PCNT emit_movimm(op,0); - emit_call((int)pcnt_gte_end); + emit_far_call(pcnt_gte_end); #endif restore_regs_all(reglist); } @@ -2284,37 +2006,34 @@ static void c2op_epilogue(u_int op,u_int reglist) static void c2op_call_MACtoIR(int lm,int need_flags) { if(need_flags) - emit_call(lm?gteMACtoIR_lm1:gteMACtoIR_lm0); + emit_far_call(lm?gteMACtoIR_lm1:gteMACtoIR_lm0); else - emit_call(lm?gteMACtoIR_lm1_nf:gteMACtoIR_lm0_nf); + emit_far_call(lm?gteMACtoIR_lm1_nf:gteMACtoIR_lm0_nf); } static void c2op_call_rgb_func(void *func,int lm,int need_ir,int need_flags) { - emit_call(func); + emit_far_call(func); // func is C code and trashes r0 emit_addimm(FP,(int)&psxRegs.CP2D.r[0]-(int)&dynarec_local,0); if(need_flags||need_ir) c2op_call_MACtoIR(lm,need_flags); - emit_call(need_flags?gteMACtoRGB:gteMACtoRGB_nf); + emit_far_call(need_flags?gteMACtoRGB:gteMACtoRGB_nf); } -static void c2op_assemble(int i,struct regstat *i_regs) +static void c2op_assemble(int i, const struct regstat *i_regs) { - u_int c2op=source[i]&0x3f; - u_int hr,reglist_full=0,reglist; - int need_flags,need_ir; - for(hr=0;hrregmap[hr]>=0) reglist_full|=1<regmap); + u_int reglist = reglist_full & CALLER_SAVE_REGS; + int need_flags, need_ir; if (gte_handlers[c2op]!=NULL) { need_flags=!(gte_unneeded[i+1]>>63); // +1 because of how liveness detection works need_ir=(gte_unneeded[i+1]&0xe00)!=0xe00; assem_debug("gte op %08x, unneeded %016llx, need_flags %d, need_ir %d\n", source[i],gte_unneeded[i+1],need_flags,need_ir); - if(new_dynarec_hacks&NDHACK_GTE_NO_FLAGS) + if(HACK_ENABLED(NDHACK_GTE_NO_FLAGS)) need_flags=0; int shift = (source[i] >> 19) & 1; int lm = (source[i] >> 10) & 1; @@ -2326,7 +2045,7 @@ static void c2op_assemble(int i,struct regstat *i_regs) int cv = (source[i] >> 13) & 3; int mx = (source[i] >> 17) & 3; reglist=reglist_full&(CALLER_SAVE_REGS|0xf0); // +{r4-r7} - c2op_prologue(c2op,reglist); + c2op_prologue(c2op,i,i_regs,reglist); /* r4,r5 = VXYZ(v) packed; r6 = &MX11(mx); r7 = &CV1(cv) */ if(v<3) emit_ldrd(v*8,0,4); @@ -2346,79 +2065,118 @@ static void c2op_assemble(int i,struct regstat *i_regs) emit_readword(&zeromem_ptr,7); #ifdef __ARM_NEON__ emit_movimm(source[i],1); // opcode - emit_call(gteMVMVA_part_neon); + emit_far_call(gteMVMVA_part_neon); if(need_flags) { emit_movimm(lm,1); - emit_call(gteMACtoIR_flags_neon); + emit_far_call(gteMACtoIR_flags_neon); } #else if(cv==3&&shift) - emit_call((int)gteMVMVA_part_cv3sh12_arm); + emit_far_call((int)gteMVMVA_part_cv3sh12_arm); else { emit_movimm(shift,1); - emit_call((int)(need_flags?gteMVMVA_part_arm:gteMVMVA_part_nf_arm)); + emit_far_call((int)(need_flags?gteMVMVA_part_arm:gteMVMVA_part_nf_arm)); } if(need_flags||need_ir) c2op_call_MACtoIR(lm,need_flags); #endif #else /* if not HAVE_ARMV5 */ - c2op_prologue(c2op,reglist); + c2op_prologue(c2op,i,i_regs,reglist); emit_movimm(source[i],1); // opcode emit_writeword(1,&psxRegs.code); - emit_call((int)(need_flags?gte_handlers[c2op]:gte_handlers_nf[c2op])); + emit_far_call(need_flags?gte_handlers[c2op]:gte_handlers_nf[c2op]); #endif break; } case GTE_OP: - c2op_prologue(c2op,reglist); - emit_call(shift?gteOP_part_shift:gteOP_part_noshift); + c2op_prologue(c2op,i,i_regs,reglist); + emit_far_call(shift?gteOP_part_shift:gteOP_part_noshift); if(need_flags||need_ir) { emit_addimm(FP,(int)&psxRegs.CP2D.r[0]-(int)&dynarec_local,0); c2op_call_MACtoIR(lm,need_flags); } break; case GTE_DPCS: - c2op_prologue(c2op,reglist); + c2op_prologue(c2op,i,i_regs,reglist); c2op_call_rgb_func(shift?gteDPCS_part_shift:gteDPCS_part_noshift,lm,need_ir,need_flags); break; case GTE_INTPL: - c2op_prologue(c2op,reglist); + c2op_prologue(c2op,i,i_regs,reglist); c2op_call_rgb_func(shift?gteINTPL_part_shift:gteINTPL_part_noshift,lm,need_ir,need_flags); break; case GTE_SQR: - c2op_prologue(c2op,reglist); - emit_call(shift?gteSQR_part_shift:gteSQR_part_noshift); + c2op_prologue(c2op,i,i_regs,reglist); + emit_far_call(shift?gteSQR_part_shift:gteSQR_part_noshift); if(need_flags||need_ir) { emit_addimm(FP,(int)&psxRegs.CP2D.r[0]-(int)&dynarec_local,0); c2op_call_MACtoIR(lm,need_flags); } break; case GTE_DCPL: - c2op_prologue(c2op,reglist); + c2op_prologue(c2op,i,i_regs,reglist); c2op_call_rgb_func(gteDCPL_part,lm,need_ir,need_flags); break; case GTE_GPF: - c2op_prologue(c2op,reglist); + c2op_prologue(c2op,i,i_regs,reglist); c2op_call_rgb_func(shift?gteGPF_part_shift:gteGPF_part_noshift,lm,need_ir,need_flags); break; case GTE_GPL: - c2op_prologue(c2op,reglist); + c2op_prologue(c2op,i,i_regs,reglist); c2op_call_rgb_func(shift?gteGPL_part_shift:gteGPL_part_noshift,lm,need_ir,need_flags); break; #endif default: - c2op_prologue(c2op,reglist); + c2op_prologue(c2op,i,i_regs,reglist); #ifdef DRC_DBG emit_movimm(source[i],1); // opcode emit_writeword(1,&psxRegs.code); #endif - emit_call(need_flags?gte_handlers[c2op]:gte_handlers_nf[c2op]); + emit_far_call(need_flags?gte_handlers[c2op]:gte_handlers_nf[c2op]); break; } c2op_epilogue(c2op,reglist); } } +static void c2op_ctc2_31_assemble(signed char sl, signed char temp) +{ + //value = value & 0x7ffff000; + //if (value & 0x7f87e000) value |= 0x80000000; + emit_shrimm(sl,12,temp); + emit_shlimm(temp,12,temp); + emit_testimm(temp,0x7f000000); + emit_testeqimm(temp,0x00870000); + emit_testeqimm(temp,0x0000e000); + emit_orrne_imm(temp,0x80000000,temp); +} + +static void do_mfc2_31_one(u_int copr,signed char temp) +{ + emit_readword(®_cop2d[copr],temp); + emit_testimm(temp,0x8000); // do we need this? + emit_andne_imm(temp,0,temp); + emit_cmpimm(temp,0xf80); + emit_andimm(temp,0xf80,temp); + emit_cmovae_imm(0xf80,temp); +} + +static void c2op_mfc2_29_assemble(signed char tl, signed char temp) +{ + if (temp < 0) { + host_tempreg_acquire(); + temp = HOST_TEMPREG; + } + do_mfc2_31_one(9,temp); + emit_shrimm(temp,7,tl); + do_mfc2_31_one(10,temp); + emit_orrshr_imm(temp,2,tl); + do_mfc2_31_one(11,temp); + emit_orrshl_imm(temp,3,tl); + emit_writeword(tl,®_cop2d[29]); + if (temp == HOST_TEMPREG) + host_tempreg_release(); +} + static void multdiv_assemble_arm(int i,struct regstat *i_regs) { // case 0x18: MULT @@ -2546,7 +2304,7 @@ static void multdiv_assemble_arm(int i,struct regstat *i_regs) static void do_jump_vaddr(int rs) { - emit_jmp(jump_vaddr_reg[rs]); + emit_far_jump(jump_vaddr_reg[rs]); } static void do_preload_rhash(int r) { @@ -2595,51 +2353,18 @@ static void do_miniht_insert(u_int return_address,int rt,int temp) { #endif } -static void mark_clear_cache(void *target) -{ - u_long offset = (u_char *)target - translation_cache; - u_int mask = 1u << ((offset >> 12) & 31); - if (!(needs_clear_cache[offset >> 17] & mask)) { - char *start = (char *)((u_long)target & ~4095ul); - start_tcache_write(start, start + 4096); - needs_clear_cache[offset >> 17] |= mask; - } -} - -// Clearing the cache is rather slow on ARM Linux, so mark the areas -// that need to be cleared, and then only clear these areas once. -static void do_clear_cache() -{ - int i,j; - for (i=0;i<(1<<(TARGET_SIZE_2-17));i++) - { - u_int bitmap=needs_clear_cache[i]; - if(bitmap) { - u_char *start, *end; - for(j=0;j<32;j++) - { - if(bitmap&(1<tramp.f - (u_char *)&ndrc->tramp.ops - 8; + struct tramp_insns *ops = ndrc->tramp.ops; + size_t i; + assert(!(diff & 3)); + assert(diff < 0x1000); + start_tcache_write(ops, (u_char *)ops + sizeof(ndrc->tramp.ops)); + for (i = 0; i < ARRAY_SIZE(ndrc->tramp.ops); i++) + ops[i].ldrpc = 0xe5900000 | rd_rn_rm(15,15,0) | diff; // ldr pc, [=val] + end_tcache_write(ops, (u_char *)ops + sizeof(ndrc->tramp.ops)); } // vim:shiftwidth=2:expandtab