X-Git-Url: https://notaz.gp2x.de/cgi-bin/gitweb.cgi?p=pcsx_rearmed.git;a=blobdiff_plain;f=libpcsxcore%2Fnew_dynarec%2Fassem_arm.c;h=57c6e917e4ad3ff6debdd8bf54a1cb5fc9a9dd48;hp=3447874ab690e999bbe27c50967c2e37e424999b;hb=13e35c04a17506ac0848d7fb089fa817b3d697e9;hpb=b96d3df7d4272503a287d243c09173eb6c842609

diff --git a/libpcsxcore/new_dynarec/assem_arm.c b/libpcsxcore/new_dynarec/assem_arm.c
index 3447874a..57c6e917 100644
--- a/libpcsxcore/new_dynarec/assem_arm.c
+++ b/libpcsxcore/new_dynarec/assem_arm.c
@@ -1134,7 +1134,6 @@ void emit_addimm(u_int rs,int imm,u_int rt)
   assert(rs<16);
   assert(rt<16);
   if(imm!=0) {
-    assert(imm>-65536&&imm<65536);
     u_int armval;
     if(genimm(imm,&armval)) {
       assem_debug("add %s,%s,#%d\n",regname[rt],regname[rs],imm);
@@ -1143,11 +1142,13 @@ void emit_addimm(u_int rs,int imm,u_int rt)
       assem_debug("sub %s,%s,#%d\n",regname[rt],regname[rs],imm);
       output_w32(0xe2400000|rd_rn_rm(rt,rs,0)|armval);
     }else if(imm<0) {
+      assert(imm>-65536);
       assem_debug("sub %s,%s,#%d\n",regname[rt],regname[rs],(-imm)&0xFF00);
       assem_debug("sub %s,%s,#%d\n",regname[rt],regname[rt],(-imm)&0xFF);
       output_w32(0xe2400000|rd_rn_imm_shift(rt,rs,(-imm)>>8,8));
       output_w32(0xe2400000|rd_rn_imm_shift(rt,rt,(-imm)&0xff,0));
     }else{
+      assert(imm<65536);
       assem_debug("add %s,%s,#%d\n",regname[rt],regname[rs],imm&0xFF00);
       assem_debug("add %s,%s,#%d\n",regname[rt],regname[rt],imm&0xFF);
       output_w32(0xe2800000|rd_rn_imm_shift(rt,rs,imm>>8,8));
@@ -2676,9 +2677,18 @@ emit_extjump_ds(int addr, int target)
   emit_extjump2(addr, target, (int)dyna_linker_ds);
 }
 
-#ifdef PCSX
-#include "pcsxmem_inline.c"
-#endif
+// put rt_val into rt, potentially making use of rs with value rs_val
+static void emit_movimm_from(u_int rs_val,int rs,u_int rt_val,int rt)
+{
+  u_int xor=rs_val^rt_val;
+  u_int xs;
+  for(xs=xor;xs!=0&&(xs&3)==0;xs>>=2)
+    ;
+  if(xs<0x100)
+    emit_xorimm(rs,xor,rt);
+  else
+    emit_movimm(rt_val,rt);
+}
 
 // trashes r2
 static void pass_args(int a0, int a1)
@@ -2905,14 +2915,12 @@ inline_readstub(int type, int i, u_int addr, signed char regmap[], int target, i
   assert(rs>=0);
 #ifdef PCSX
   u_int handler,host_addr=0;
-  if(pcsx_direct_read(type,addr,target?rs:-1,rt))
-    return;
   handler=get_direct_memhandler(mem_rtab,addr,type,&host_addr);
   if (handler==0) {
     if(rt<0)
       return;
-    if(target==0||addr!=host_addr)
-      emit_movimm(host_addr,rs);
+    if(addr!=host_addr)
+      emit_movimm_from(addr,rs,host_addr,rs);
     switch(type) {
       case LOADB_STUB:  emit_movsbl_indexed(0,rs,rt); break;
       case LOADBU_STUB: emit_movzbl_indexed(0,rs,rt); break;
@@ -3210,12 +3218,10 @@ inline_writestub(int type, int i, u_int addr, signed char regmap[], int target,
   assert(rt>=0);
 #ifdef PCSX
   u_int handler,host_addr=0;
-  if(pcsx_direct_write(type,addr,rs,rt,regmap))
-    return;
   handler=get_direct_memhandler(mem_wtab,addr,type,&host_addr);
   if (handler==0) {
-    if(target==0||addr!=host_addr)
-      emit_movimm(host_addr,rs);
+    if(addr!=host_addr)
+      emit_movimm_from(addr,rs,host_addr,rs);
     switch(type) {
       case STOREB_STUB: emit_writebyte_indexed(rt,0,rs); break;
       case STOREH_STUB: emit_writehword_indexed(rt,0,rs); break;
@@ -3227,9 +3233,7 @@ inline_writestub(int type, int i, u_int addr, signed char regmap[], int target,
 
   // call a memhandler
   save_regs(reglist);
-  pass_args(target!=0?rs:-1,rt);
-  if(target==0)
-    emit_movimm(addr,0);
+  pass_args(rs,rt);
   int cc=get_reg(regmap,CCREG);
   if(cc<0)
     emit_loadreg(CCREG,2);
@@ -3698,6 +3702,182 @@ void shift_assemble_arm(int i,struct regstat *i_regs)
     }
   }
 }
+
+#ifdef PCSX
+static void speculate_mov(int rs,int rt)
+{
+  if(rt!=0) {
+    smrv_strong_next|=1<<rt;
+    smrv[rt]=smrv[rs];
+  }
+}
+
+static void speculate_mov_weak(int rs,int rt)
+{
+  if(rt!=0) {
+    smrv_weak_next|=1<<rt;
+    smrv[rt]=smrv[rs];
+  }
+}
+
+static void speculate_register_values(int i)
+{
+  if(i==0) {
+    memcpy(smrv,psxRegs.GPR.r,sizeof(smrv));
+    // gp,sp are likely to stay the same throughout the block
+    smrv_strong_next=(1<<28)|(1<<29)|(1<<30);
+    smrv_weak_next=~smrv_strong_next;
+    //printf(" llr %08x\n", smrv[4]);
+  }
+  smrv_strong=smrv_strong_next;
+  smrv_weak=smrv_weak_next;
+  switch(itype[i]) {
+    case ALU:
+      if     ((smrv_strong>>rs1[i])&1) speculate_mov(rs1[i],rt1[i]);
+      else if((smrv_strong>>rs2[i])&1) speculate_mov(rs2[i],rt1[i]);
+      else if((smrv_weak>>rs1[i])&1) speculate_mov_weak(rs1[i],rt1[i]);
+      else if((smrv_weak>>rs2[i])&1) speculate_mov_weak(rs2[i],rt1[i]);
+      else {
+        smrv_strong_next&=~(1<<rt1[i]);
+        smrv_weak_next&=~(1<<rt1[i]);
+      }
+      break;
+    case SHIFTIMM:
+      smrv_strong_next&=~(1<<rt1[i]);
+      smrv_weak_next&=~(1<<rt1[i]);
+      // fallthrough
+    case IMM16:
+      if(rt1[i]&&is_const(&regs[i],rt1[i])) {
+        int value,hr=get_reg(regs[i].regmap,rt1[i]);
+        if(hr>=0) {
+          if(get_final_value(hr,i,&value))
+               smrv[rt1[i]]=value;
+          else smrv[rt1[i]]=constmap[i][hr];
+          smrv_strong_next|=1<<rt1[i];
+        }
+      }
+      else {
+        if     ((smrv_strong>>rs1[i])&1) speculate_mov(rs1[i],rt1[i]);
+        else if((smrv_weak>>rs1[i])&1) speculate_mov_weak(rs1[i],rt1[i]);
+      }
+      break;
+    case LOAD:
+      if(start<0x2000&&(rt1[i]==26||(smrv[rt1[i]]>>24)==0xa0)) {
+        // special case for BIOS
+        smrv[rt1[i]]=0xa0000000;
+        smrv_strong_next|=1<<rt1[i];
+        break;
+      }
+      // fallthrough
+    case SHIFT:
+    case LOADLR:
+    case MOV:
+      smrv_strong_next&=~(1<<rt1[i]);
+      smrv_weak_next&=~(1<<rt1[i]);
+      break;
+    case COP0:
+    case COP2:
+      if(opcode2[i]==0||opcode2[i]==2) { // MFC/CFC
+        smrv_strong_next&=~(1<<rt1[i]);
+        smrv_weak_next&=~(1<<rt1[i]);
+      }
+      break;
+    case C2LS:
+      if (opcode[i]==0x32) { // LWC2
+        smrv_strong_next&=~(1<<rt1[i]);
+        smrv_weak_next&=~(1<<rt1[i]);
+      }
+      break;
+  }
+#if 0
+  int r=4;
+  printf("x %08x %08x %d %d c %08x %08x\n",smrv[r],start+i*4,
+    ((smrv_strong>>r)&1),(smrv_weak>>r)&1,regs[i].isconst,regs[i].wasconst);
+#endif
+}
+
+enum {
+  MTYPE_8000 = 0,
+  MTYPE_8020,
+  MTYPE_0000,
+  MTYPE_A000,
+  MTYPE_1F80,
+};
+
+static int get_ptr_mem_type(u_int a)
+{
+  if(a < 0x00200000) {
+    if(a<0x1000&&((start>>20)==0xbfc||(start>>24)==0xa0))
+      // return wrong, must use memhandler for BIOS self-test to pass
+      // 007 does similar stuff from a00 mirror, weird stuff
+      return MTYPE_8000;
+    return MTYPE_0000;
+  }
+  if(0x1f800000 <= a && a < 0x1f801000)
+    return MTYPE_1F80;
+  if(0x80200000 <= a && a < 0x80800000)
+    return MTYPE_8020;
+  if(0xa0000000 <= a && a < 0xa0200000)
+    return MTYPE_A000;
+  return MTYPE_8000;
+}
+#endif
+
+static int emit_fastpath_cmp_jump(int i,int addr,int *addr_reg_override)
+{
+  int jaddr,type=0;
+
+#ifdef PCSX
+  int mr=rs1[i];
+  if(((smrv_strong|smrv_weak)>>mr)&1) {
+    type=get_ptr_mem_type(smrv[mr]);
+    //printf("set %08x @%08x r%d %d\n", smrv[mr], start+i*4, mr, type);
+  }
+  else {
+    // use the mirror we are running on
+    type=get_ptr_mem_type(start);
+    //printf("set nospec   @%08x r%d %d\n", start+i*4, mr, type);
+  }
+
+  if(type==MTYPE_8020) { // RAM 80200000+ mirror
+    emit_andimm(addr,~0x00e00000,HOST_TEMPREG);
+    addr=*addr_reg_override=HOST_TEMPREG;
+    type=0;
+  }
+  else if(type==MTYPE_0000) { // RAM 0 mirror
+    emit_orimm(addr,0x80000000,HOST_TEMPREG);
+    addr=*addr_reg_override=HOST_TEMPREG;
+    type=0;
+  }
+  else if(type==MTYPE_A000) { // RAM A mirror
+    emit_andimm(addr,~0x20000000,HOST_TEMPREG);
+    addr=*addr_reg_override=HOST_TEMPREG;
+    type=0;
+  }
+  else if(type==MTYPE_1F80) { // scratchpad
+    emit_addimm(addr,-0x1f800000,HOST_TEMPREG);
+    emit_cmpimm(HOST_TEMPREG,0x1000);
+    jaddr=(int)out;
+    emit_jc(0);
+  }
+#endif
+
+  if(type==0)
+  {
+    emit_cmpimm(addr,RAM_SIZE);
+    jaddr=(int)out;
+    #ifdef CORTEX_A8_BRANCH_PREDICTION_HACK
+    // Hint to branch predictor that the branch is unlikely to be taken
+    if(rs1[i]>=28)
+      emit_jno_unlikely(0);
+    else
+    #endif
+      emit_jno(0);
+  }
+
+  return jaddr;
+}
+
 #define shift_assemble shift_assemble_arm
 
 void loadlr_assemble_arm(int i,struct regstat *i_regs)
@@ -3706,6 +3886,7 @@ void loadlr_assemble_arm(int i,struct regstat *i_regs)
   int offset;
   int jaddr=0;
   int memtarget=0,c=0;
+  int fastload_reg_override=0;
   u_int hr,reglist=0;
   th=get_reg(i_regs->regmap,rt1[i]|64);
   tl=get_reg(i_regs->regmap,rt1[i]);
@@ -3740,9 +3921,7 @@ void loadlr_assemble_arm(int i,struct regstat *i_regs)
       }else{
         emit_andimm(addr,0xFFFFFFF8,temp2); // LDL/LDR
       }
-      emit_cmpimm(addr,RAM_SIZE);
-      jaddr=(int)out;
-      emit_jno(0);
+      jaddr=emit_fastpath_cmp_jump(i,temp2,&fastload_reg_override);
     }
     else {
       if (opcode[i]==0x22||opcode[i]==0x26) {
@@ -3775,8 +3954,10 @@ void loadlr_assemble_arm(int i,struct regstat *i_regs)
   }
   if (opcode[i]==0x22||opcode[i]==0x26) { // LWL/LWR
     if(!c||memtarget) {
+      int a=temp2;
+      if(fastload_reg_override) a=fastload_reg_override;
       //emit_readword_indexed((int)rdram-0x80000000,temp2,temp2);
-      emit_readword_indexed_tlb(0,temp2,map,temp2);
+      emit_readword_indexed_tlb(0,a,map,temp2);
       if(jaddr) add_stub(LOADW_STUB,jaddr,(int)out,i,temp2,(int)i_regs,ccadj[i],reglist);
     }
     else
@@ -3803,7 +3984,7 @@ void loadlr_assemble_arm(int i,struct regstat *i_regs)
     //emit_storereg(rt1[i],tl); // DEBUG
   }
   if (opcode[i]==0x1A||opcode[i]==0x1B) { // LDL/LDR
-    // FIXME: little endian
+    // FIXME: little endian, fastload_reg_override
     int temp2h=get_reg(i_regs->regmap,FTEMP|64);
     if(!c||memtarget) {
       //if(th>=0) emit_readword_indexed((int)rdram-0x80000000,temp2,temp2h);
@@ -4890,6 +5071,7 @@ void multdiv_assemble_arm(int i,struct regstat *i_regs)
       }
     }
     else // 64-bit
+#ifndef FORCE32
     {
       if(opcode2[i]==0x1C) // DMULT
       {
@@ -5063,6 +5245,9 @@ void multdiv_assemble_arm(int i,struct regstat *i_regs)
         if(lol>=0) emit_loadreg(LOREG,lol);
       }
     }
+#else
+    assert(0);
+#endif
   }
   else
   {