X-Git-Url: https://notaz.gp2x.de/cgi-bin/gitweb.cgi?p=pcsx_rearmed.git;a=blobdiff_plain;f=libpcsxcore%2Fnew_dynarec%2Fassem_arm.c;h=71c397c038e6c1ea3c347fe894debeb3750dc78a;hp=5ee226b0d15fd487147db2385a630e4a8d50db6f;hb=4600ba0381ea86bdfdcba8f4f762c89f5c51af5b;hpb=5a05d80c2ed15a50915dc7f820155893c4735e01

diff --git a/libpcsxcore/new_dynarec/assem_arm.c b/libpcsxcore/new_dynarec/assem_arm.c
index 5ee226b0..71c397c0 100644
--- a/libpcsxcore/new_dynarec/assem_arm.c
+++ b/libpcsxcore/new_dynarec/assem_arm.c
@@ -1,6 +1,7 @@
 /* * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * *
- *   Mupen64plus - assem_arm.c                                             *
+ *   Mupen64plus/PCSX - assem_arm.c                                        *
  *   Copyright (C) 2009-2011 Ari64                                         *
+ *   Copyright (C) 2010-2011 Gražvydas "notaz" Ignotas                     *
  *                                                                         *
  *   This program is free software; you can redistribute it and/or modify  *
  *   it under the terms of the GNU General Public License as published by  *
@@ -170,6 +171,7 @@ void set_jump_target_fillslot(int addr,u_int target,int copy)
 /* Literal pool */
 add_literal(int addr,int val)
 {
+  assert(literalcount<sizeof(literals)/sizeof(literals[0]));
   literals[literalcount][0]=addr;
   literals[literalcount][1]=val;
   literalcount++; 
@@ -186,11 +188,15 @@ void *kill_pointer(void *stub)
   return i_ptr;
 }
 
+// find where external branch is liked to using addr of it's stub:
+// get address that insn one after stub loads (dyna_linker arg1),
+// treat it as a pointer to branch insn,
+// return addr where that branch jumps to
 int get_pointer(void *stub)
 {
   //printf("get_pointer(%x)\n",(int)stub);
   int *ptr=(int *)(stub+4);
-  assert((*ptr&0x0ff00000)==0x05900000);
+  assert((*ptr&0x0fff0000)==0x059f0000);
   u_int offset=*ptr&0xfff;
   int **l_ptr=(void *)ptr+offset+8;
   int *i_ptr=*l_ptr;
@@ -222,7 +228,7 @@ int verify_dirty(int addr)
   u_int *ptr=(u_int *)addr;
   #ifdef ARMv5_ONLY
   // get from literal pool
-  assert((*ptr&0xFFF00000)==0xe5900000);
+  assert((*ptr&0xFFFF0000)==0xe59f0000);
   u_int offset=*ptr&0xfff;
   u_int *l_ptr=(void *)ptr+offset+8;
   u_int source=l_ptr[0];
@@ -275,7 +281,7 @@ void get_bounds(int addr,u_int *start,u_int *end)
   u_int *ptr=(u_int *)addr;
   #ifdef ARMv5_ONLY
   // get from literal pool
-  assert((*ptr&0xFFF00000)==0xe5900000);
+  assert((*ptr&0xFFFF0000)==0xe59f0000);
   u_int offset=*ptr&0xfff;
   u_int *l_ptr=(void *)ptr+offset+8;
   u_int source=l_ptr[0];
@@ -1319,6 +1325,14 @@ void emit_shlimm(int rs,u_int imm,int rt)
   output_w32(0xe1a00000|rd_rn_rm(rt,0,rs)|(imm<<7));
 }
 
+void emit_lsls_imm(int rs,int imm,int rt)
+{
+  assert(imm>0);
+  assert(imm<32);
+  assem_debug("lsls %s,%s,#%d\n",regname[rt],regname[rs],imm);
+  output_w32(0xe1b00000|rd_rn_rm(rt,0,rs)|(imm<<7));
+}
+
 void emit_shrimm(int rs,u_int imm,int rt)
 {
   assert(imm>0);
@@ -1378,6 +1392,17 @@ void emit_signextend16(int rs,int rt)
   #endif
 }
 
+void emit_signextend8(int rs,int rt)
+{
+  #ifdef ARMv5_ONLY
+  emit_shlimm(rs,24,rt);
+  emit_sarimm(rt,24,rt);
+  #else
+  assem_debug("sxtb %s,%s\n",regname[rt],regname[rs]);
+  output_w32(0xe6af0070|rd_rn_rm(rt,0,rs));
+  #endif
+}
+
 void emit_shl(u_int rs,u_int shift,u_int rt)
 {
   assert(rs<16);
@@ -1751,8 +1776,9 @@ void emit_popreg(u_int r)
 }
 void emit_callreg(u_int r)
 {
-  assem_debug("call *%%%s\n",regname[r]);
-  assert(0);
+  assert(r<15);
+  assem_debug("blx %s\n",regname[r]);
+  output_w32(0xe12fff30|r);
 }
 void emit_jmpreg(u_int r)
 {
@@ -1775,6 +1801,31 @@ void emit_readword_dualindexedx4(int rs1, int rs2, int rt)
   assem_debug("ldr %s,%s,%s lsl #2\n",regname[rt],regname[rs1],regname[rs2]);
   output_w32(0xe7900000|rd_rn_rm(rt,rs1,rs2)|0x100);
 }
+void emit_ldrcc_dualindexed(int rs1, int rs2, int rt)
+{
+  assem_debug("ldrcc %s,%s,%s\n",regname[rt],regname[rs1],regname[rs2]);
+  output_w32(0x37900000|rd_rn_rm(rt,rs1,rs2));
+}
+void emit_ldrccb_dualindexed(int rs1, int rs2, int rt)
+{
+  assem_debug("ldrccb %s,%s,%s\n",regname[rt],regname[rs1],regname[rs2]);
+  output_w32(0x37d00000|rd_rn_rm(rt,rs1,rs2));
+}
+void emit_ldrccsb_dualindexed(int rs1, int rs2, int rt)
+{
+  assem_debug("ldrccsb %s,%s,%s\n",regname[rt],regname[rs1],regname[rs2]);
+  output_w32(0x319000d0|rd_rn_rm(rt,rs1,rs2));
+}
+void emit_ldrcch_dualindexed(int rs1, int rs2, int rt)
+{
+  assem_debug("ldrcch %s,%s,%s\n",regname[rt],regname[rs1],regname[rs2]);
+  output_w32(0x319000b0|rd_rn_rm(rt,rs1,rs2));
+}
+void emit_ldrccsh_dualindexed(int rs1, int rs2, int rt)
+{
+  assem_debug("ldrccsh %s,%s,%s\n",regname[rt],regname[rs1],regname[rs2]);
+  output_w32(0x319000f0|rd_rn_rm(rt,rs1,rs2));
+}
 void emit_readword_indexed_tlb(int addr, int rs, int map, int rt)
 {
   if(map<0) emit_readword_indexed(addr, rs, rt);
@@ -1990,6 +2041,21 @@ void emit_writebyte_indexed_tlb(int rt, int addr, int rs, int map, int temp)
     }
   }
 }
+void emit_strcc_dualindexed(int rs1, int rs2, int rt)
+{
+  assem_debug("strcc %s,%s,%s\n",regname[rt],regname[rs1],regname[rs2]);
+  output_w32(0x37800000|rd_rn_rm(rt,rs1,rs2));
+}
+void emit_strccb_dualindexed(int rs1, int rs2, int rt)
+{
+  assem_debug("strccb %s,%s,%s\n",regname[rt],regname[rs1],regname[rs2]);
+  output_w32(0x37c00000|rd_rn_rm(rt,rs1,rs2));
+}
+void emit_strcch_dualindexed(int rs1, int rs2, int rt)
+{
+  assem_debug("strcch %s,%s,%s\n",regname[rt],regname[rs1],regname[rs2]);
+  output_w32(0x318000b0|rd_rn_rm(rt,rs1,rs2));
+}
 void emit_writeword(int rt, int addr)
 {
   u_int offset = addr-(u_int)&dynarec_local;
@@ -2614,6 +2680,23 @@ emit_extjump_ds(int addr, int target)
 #include "pcsxmem_inline.c"
 #endif
 
+// trashes r2
+static void pass_args(int a0, int a1)
+{
+  if(a0==1&&a1==0) {
+    // must swap
+    emit_mov(a0,2); emit_mov(a1,1); emit_mov(2,0);
+  }
+  else if(a0!=0&&a1==0) {
+    emit_mov(a1,1);
+    if (a0>=0) emit_mov(a0,0);
+  }
+  else {
+    if(a0>=0&&a0!=0) emit_mov(a0,0);
+    if(a1>=0&&a1!=1) emit_mov(a1,1);
+  }
+}
+
 do_readstub(int n)
 {
   assem_debug("do_readstub %x\n",start+stubs[n][3]*4);
@@ -2636,6 +2719,73 @@ do_readstub(int n)
     rt=get_reg(i_regmap,rt1[i]);
   }
   assert(rs>=0);
+#ifdef PCSX
+  int r,temp=-1,temp2=HOST_TEMPREG,regs_saved=0,restore_jump=0;
+  reglist|=(1<<rs);
+  for(r=0;r<=12;r++) {
+    if(((1<<r)&0x13ff)&&((1<<r)&reglist)==0) {
+      temp=r; break;
+    }
+  }
+  if(rt>=0)
+    reglist&=~(1<<rt);
+  if(temp==-1) {
+    save_regs(reglist);
+    regs_saved=1;
+    temp=(rs==0)?2:0;
+  }
+  if((regs_saved||(reglist&2)==0)&&temp!=1&&rs!=1)
+    temp2=1;
+  emit_readword((int)&mem_rtab,temp);
+  emit_shrimm(rs,12,temp2);
+  emit_readword_dualindexedx4(temp,temp2,temp2);
+  emit_lsls_imm(temp2,1,temp2);
+  if(itype[i]==C1LS||itype[i]==C2LS||(rt>=0&&rt1[i]!=0)) {
+    switch(type) {
+      case LOADB_STUB:  emit_ldrccsb_dualindexed(temp2,rs,rt); break;
+      case LOADBU_STUB: emit_ldrccb_dualindexed(temp2,rs,rt); break;
+      case LOADH_STUB:  emit_ldrccsh_dualindexed(temp2,rs,rt); break;
+      case LOADHU_STUB: emit_ldrcch_dualindexed(temp2,rs,rt); break;
+      case LOADW_STUB:  emit_ldrcc_dualindexed(temp2,rs,rt); break;
+    }
+  }
+  if(regs_saved) {
+    restore_jump=(int)out;
+    emit_jcc(0); // jump to reg restore
+  }
+  else
+    emit_jcc(stubs[n][2]); // return address
+
+  if(!regs_saved)
+    save_regs(reglist);
+  int handler=0;
+  if(type==LOADB_STUB||type==LOADBU_STUB)
+    handler=(int)jump_handler_read8;
+  if(type==LOADH_STUB||type==LOADHU_STUB)
+    handler=(int)jump_handler_read16;
+  if(type==LOADW_STUB)
+    handler=(int)jump_handler_read32;
+  assert(handler!=0);
+  pass_args(rs,temp2);
+  int cc=get_reg(i_regmap,CCREG);
+  if(cc<0)
+    emit_loadreg(CCREG,2);
+  emit_addimm(cc<0?2:cc,CLOCK_DIVIDER*stubs[n][6]+2,2);
+  emit_call(handler);
+  if(itype[i]==C1LS||itype[i]==C2LS||(rt>=0&&rt1[i]!=0)) {
+    switch(type) {
+      case LOADB_STUB:  emit_signextend8(0,rt); break;
+      case LOADBU_STUB: emit_andimm(0,0xff,rt); break;
+      case LOADH_STUB:  emit_signextend16(0,rt); break;
+      case LOADHU_STUB: emit_andimm(0,0xffff,rt); break;
+      case LOADW_STUB:  if(rt!=0) emit_mov(0,rt); break;
+    }
+  }
+  if(restore_jump)
+    set_jump_target(restore_jump,(int)out);
+  restore_regs(reglist);
+  emit_jmp(stubs[n][2]); // return address
+#else // !PCSX
   if(addr<0) addr=rt;
   if(addr<0&&itype[i]!=C1LS&&itype[i]!=C2LS&&itype[i]!=LOADLR) addr=get_reg(i_regmap,-1);
   assert(addr>=0);
@@ -2714,7 +2864,37 @@ do_readstub(int n)
     }
   }
   emit_jmp(stubs[n][2]); // return address
+#endif // !PCSX
+}
+
+#ifdef PCSX
+// return memhandler, or get directly accessable address and return 0
+u_int get_direct_memhandler(void *table,u_int addr,int type,u_int *addr_host)
+{
+  u_int l1,l2=0;
+  l1=((u_int *)table)[addr>>12];
+  if((l1&(1<<31))==0) {
+    u_int v=l1<<1;
+    *addr_host=v+addr;
+    return 0;
+  }
+  else {
+    l1<<=1;
+    if(type==LOADB_STUB||type==LOADBU_STUB||type==STOREB_STUB)
+      l2=((u_int *)l1)[0x1000/4 + 0x1000/2 + (addr&0xfff)];
+    else if(type==LOADH_STUB||type==LOADHU_STUB||type==STOREH_STUB)
+      l2=((u_int *)l1)[0x1000/4 + (addr&0xfff)/2];
+    else
+      l2=((u_int *)l1)[(addr&0xfff)/4];
+    if((l2&(1<<31))==0) {
+      u_int v=l2<<1;
+      *addr_host=v+(addr&0xfff);
+      return 0;
+    }
+    return l2<<1;
+  }
 }
+#endif
 
 inline_readstub(int type, int i, u_int addr, signed char regmap[], int target, int adj, u_int reglist)
 {
@@ -2723,6 +2903,63 @@ inline_readstub(int type, int i, u_int addr, signed char regmap[], int target, i
   int rt=get_reg(regmap,target);
   if(rs<0) rs=get_reg(regmap,-1);
   assert(rs>=0);
+#ifdef PCSX
+  u_int handler,host_addr=0;
+  if(pcsx_direct_read(type,addr,target?rs:-1,rt))
+    return;
+  handler=get_direct_memhandler(mem_rtab,addr,type,&host_addr);
+  if (handler==0) {
+    if(rt<0)
+      return;
+    if(target==0||addr!=host_addr)
+      emit_movimm(host_addr,rs);
+    switch(type) {
+      case LOADB_STUB:  emit_movsbl_indexed(0,rs,rt); break;
+      case LOADBU_STUB: emit_movzbl_indexed(0,rs,rt); break;
+      case LOADH_STUB:  emit_movswl_indexed(0,rs,rt); break;
+      case LOADHU_STUB: emit_movzwl_indexed(0,rs,rt); break;
+      case LOADW_STUB:  emit_readword_indexed(0,rs,rt); break;
+      default:          assert(0);
+    }
+    return;
+  }
+
+  // call a memhandler
+  if(rt>=0)
+    reglist&=~(1<<rt);
+  save_regs(reglist);
+  if(target==0)
+    emit_movimm(addr,0);
+  else if(rs!=0)
+    emit_mov(rs,0);
+  int cc=get_reg(regmap,CCREG);
+  if(cc<0)
+    emit_loadreg(CCREG,2);
+  emit_readword((int)&last_count,3);
+  emit_addimm(cc<0?2:cc,CLOCK_DIVIDER*(adj+1),2);
+  emit_add(2,3,3);
+  emit_writeword(3,(int)&Count);
+
+  int offset=(int)handler-(int)out-8;
+  if(offset<-33554432||offset>=33554432) {
+    // unreachable memhandler, a plugin func perhaps
+    emit_movimm(handler,1);
+    emit_callreg(1);
+  }
+  else
+    emit_call(handler);
+  if(rt>=0) {
+    switch(type) {
+      case LOADB_STUB:  emit_signextend8(0,rt); break;
+      case LOADBU_STUB: emit_andimm(0,0xff,rt); break;
+      case LOADH_STUB:  emit_signextend16(0,rt); break;
+      case LOADHU_STUB: emit_andimm(0,0xffff,rt); break;
+      case LOADW_STUB:  if(rt!=0) emit_mov(0,rt); break;
+      default:          assert(0);
+    }
+  }
+  restore_regs(reglist);
+#else // if !PCSX
   int ftable=0;
   if(type==LOADB_STUB||type==LOADBU_STUB)
     ftable=(int)readmemb;
@@ -2735,10 +2972,6 @@ inline_readstub(int type, int i, u_int addr, signed char regmap[], int target, i
     ftable=(int)readmemd;
 #endif
   assert(ftable!=0);
-#ifdef PCSX
-  if(pcsx_direct_read(type,addr,target?rs:-1,rt))
-    return;
-#endif
   if(target==0)
     emit_movimm(addr,rs);
   emit_writeword(rs,(int)&address);
@@ -2806,6 +3039,7 @@ inline_readstub(int type, int i, u_int addr, signed char regmap[], int target, i
       if(rth>=0) emit_readword(((int)&readmem_dword)+4,rth);
     }
   }
+#endif // !PCSX
 }
 
 do_writestub(int n)
@@ -2831,6 +3065,68 @@ do_writestub(int n)
   }
   assert(rs>=0);
   assert(rt>=0);
+#ifdef PCSX
+  int rtmp,temp=-1,temp2=HOST_TEMPREG,regs_saved=0,restore_jump=0,ra;
+  int reglist2=reglist|(1<<rs)|(1<<rt);
+  for(rtmp=0;rtmp<=12;rtmp++) {
+    if(((1<<rtmp)&0x13ff)&&((1<<rtmp)&reglist2)==0) {
+      temp=rtmp; break;
+    }
+  }
+  if(temp==-1) {
+    save_regs(reglist);
+    regs_saved=1;
+    for(rtmp=0;rtmp<=3;rtmp++)
+      if(rtmp!=rs&&rtmp!=rt)
+        {temp=rtmp;break;}
+  }
+  if((regs_saved||(reglist2&8)==0)&&temp!=3&&rs!=3&&rt!=3)
+    temp2=3;
+  emit_readword((int)&mem_wtab,temp);
+  emit_shrimm(rs,12,temp2);
+  emit_readword_dualindexedx4(temp,temp2,temp2);
+  emit_lsls_imm(temp2,1,temp2);
+  switch(type) {
+    case STOREB_STUB: emit_strccb_dualindexed(temp2,rs,rt); break;
+    case STOREH_STUB: emit_strcch_dualindexed(temp2,rs,rt); break;
+    case STOREW_STUB: emit_strcc_dualindexed(temp2,rs,rt); break;
+    default:          assert(0);
+  }
+  if(regs_saved) {
+    restore_jump=(int)out;
+    emit_jcc(0); // jump to reg restore
+  }
+  else
+    emit_jcc(stubs[n][2]); // return address (invcode check)
+
+  if(!regs_saved)
+    save_regs(reglist);
+  int handler=0;
+  switch(type) {
+    case STOREB_STUB: handler=(int)jump_handler_write8; break;
+    case STOREH_STUB: handler=(int)jump_handler_write16; break;
+    case STOREW_STUB: handler=(int)jump_handler_write32; break;
+  }
+  assert(handler!=0);
+  pass_args(rs,rt);
+  if(temp2!=3)
+    emit_mov(temp2,3);
+  int cc=get_reg(i_regmap,CCREG);
+  if(cc<0)
+    emit_loadreg(CCREG,2);
+  emit_addimm(cc<0?2:cc,CLOCK_DIVIDER*stubs[n][6]+2,2);
+  // returns new cycle_count
+  emit_call(handler);
+  emit_addimm(0,-CLOCK_DIVIDER*stubs[n][6]-2,cc<0?2:cc);
+  if(cc<0)
+    emit_storereg(CCREG,2);
+  if(restore_jump)
+    set_jump_target(restore_jump,(int)out);
+  restore_regs(reglist);
+  ra=stubs[n][2];
+  if(!restore_jump) ra+=4*3; // skip invcode check
+  emit_jmp(ra);
+#else // if !PCSX
   if(addr<0) addr=get_reg(i_regmap,-1);
   assert(addr>=0);
   int ftable=0;
@@ -2902,6 +3198,7 @@ do_writestub(int n)
   //  emit_loadreg(CCREG,cc);
   //}
   emit_jmp(stubs[n][2]); // return address
+#endif // !PCSX
 }
 
 inline_writestub(int type, int i, u_int addr, signed char regmap[], int target, int adj, u_int reglist)
@@ -2912,9 +3209,39 @@ inline_writestub(int type, int i, u_int addr, signed char regmap[], int target,
   assert(rs>=0);
   assert(rt>=0);
 #ifdef PCSX
+  u_int handler,host_addr=0;
   if(pcsx_direct_write(type,addr,rs,rt,regmap))
     return;
-#endif
+  handler=get_direct_memhandler(mem_wtab,addr,type,&host_addr);
+  if (handler==0) {
+    if(target==0||addr!=host_addr)
+      emit_movimm(host_addr,rs);
+    switch(type) {
+      case STOREB_STUB: emit_writebyte_indexed(rt,0,rs); break;
+      case STOREH_STUB: emit_writehword_indexed(rt,0,rs); break;
+      case STOREW_STUB: emit_writeword_indexed(rt,0,rs); break;
+      default:          assert(0);
+    }
+    return;
+  }
+
+  // call a memhandler
+  save_regs(reglist);
+  pass_args(target!=0?rs:-1,rt);
+  if(target==0)
+    emit_movimm(addr,0);
+  int cc=get_reg(regmap,CCREG);
+  if(cc<0)
+    emit_loadreg(CCREG,2);
+  emit_addimm(cc<0?2:cc,CLOCK_DIVIDER*(adj+1),2);
+  emit_movimm(handler,3);
+  // returns new cycle_count
+  emit_call((int)jump_handler_write_h);
+  emit_addimm(0,-CLOCK_DIVIDER*(adj+1),cc<0?2:cc);
+  if(cc<0)
+    emit_storereg(CCREG,2);
+  restore_regs(reglist);
+#else // if !pcsx
   int ftable=0;
   if(type==STOREB_STUB)
     ftable=(int)writememb;
@@ -2989,6 +3316,7 @@ inline_writestub(int type, int i, u_int addr, signed char regmap[], int target,
   }
   //emit_popa();
   restore_regs(reglist);
+#endif
 }
 
 do_unalignedwritestub(int n)
@@ -3012,6 +3340,21 @@ do_unalignedwritestub(int n)
   reglist|=(1<<addr);
   reglist&=~(1<<temp2);
 
+#if 1
+  // don't bother with it and call write handler
+  save_regs(reglist);
+  pass_args(addr,rt);
+  int cc=get_reg(i_regmap,CCREG);
+  if(cc<0)
+    emit_loadreg(CCREG,2);
+  emit_addimm(cc<0?2:cc,CLOCK_DIVIDER*stubs[n][6]+2,2);
+  emit_call((int)(opcode[i]==0x2a?jump_handle_swl:jump_handle_swr));
+  emit_addimm(0,-CLOCK_DIVIDER*stubs[n][6]-2,cc<0?2:cc);
+  if(cc<0)
+    emit_storereg(CCREG,2);
+  restore_regs(reglist);
+  emit_jmp(stubs[n][2]); // return address
+#else
   emit_andimm(addr,0xfffffffc,temp2);
   emit_writeword(temp2,(int)&address);
 
@@ -3074,6 +3417,7 @@ do_unalignedwritestub(int n)
   }
   restore_regs(reglist);
   emit_jmp(stubs[n][2]); // return address
+#endif
 }
 
 void printregs(int edi,int esi,int ebp,int esp,int b,int d,int c,int a)
@@ -3791,6 +4135,7 @@ void c2op_assemble(int i,struct regstat *i_regs)
   signed char temp=get_reg(i_regs->regmap,-1);
   u_int c2op=source[i]&0x3f;
   u_int hr,reglist=0;
+  int need_flags;
   for(hr=0;hr<HOST_REGS;hr++) {
     if(i_regs->regmap[hr]>=0) reglist|=1<<hr;
   }
@@ -3804,7 +4149,13 @@ void c2op_assemble(int i,struct regstat *i_regs)
       emit_addimm(cc,gte_cycletab[c2op]/2,cc); // XXX: could just adjust ccadj?
     emit_addimm(FP,(int)&psxRegs.CP2D.r[0]-(int)&dynarec_local,0); // cop2 regs
     emit_writeword(1,(int)&psxRegs.code);
-    emit_call((int)gte_handlers[c2op]);
+    need_flags=!(gte_unneeded[i+1]>>63); // +1 because of how liveness detection works
+    assem_debug("gte unneeded %016llx, need_flags %d\n",gte_unneeded[i+1],need_flags);
+#ifdef ARMv5_ONLY
+    // let's take more risk here
+    need_flags=need_flags&&gte_reads_flags;
+#endif
+    emit_call((int)(need_flags?gte_handlers[c2op]:gte_handlers_nf[c2op]));
   }
 
   if(i>=slen-1||itype[i+1]!=C2OP)
@@ -4493,7 +4844,9 @@ void multdiv_assemble_arm(int i,struct regstat *i_regs)
         assert(quotient>=0);
         assert(remainder>=0);
         emit_movs(d1,remainder);
-        emit_negmi(remainder,remainder);
+        emit_movimm(0xffffffff,quotient);
+        emit_negmi(quotient,quotient); // .. quotient and ..
+        emit_negmi(remainder,remainder); // .. remainder for div0 case (will be negated back after jump)
         emit_movs(d2,HOST_TEMPREG);
         emit_jeq((int)out+52); // Division by zero
         emit_negmi(HOST_TEMPREG,HOST_TEMPREG);
@@ -4521,12 +4874,13 @@ void multdiv_assemble_arm(int i,struct regstat *i_regs)
         signed char remainder=get_reg(i_regs->regmap,HIREG);
         assert(quotient>=0);
         assert(remainder>=0);
+        emit_mov(d1,remainder);
+        emit_movimm(0xffffffff,quotient); // div0 case
         emit_test(d2,d2);
-        emit_jeq((int)out+44); // Division by zero
+        emit_jeq((int)out+40); // Division by zero
         emit_clz(d2,HOST_TEMPREG);
         emit_movimm(1<<31,quotient);
         emit_shl(d2,HOST_TEMPREG,d2);
-        emit_mov(d1,remainder);
         emit_shr(quotient,HOST_TEMPREG,quotient);
         emit_cmp(remainder,d2);
         emit_subcs(remainder,d2,remainder);
@@ -4536,6 +4890,7 @@ void multdiv_assemble_arm(int i,struct regstat *i_regs)
       }
     }
     else // 64-bit
+#ifndef FORCE32
     {
       if(opcode2[i]==0x1C) // DMULT
       {
@@ -4709,6 +5064,9 @@ void multdiv_assemble_arm(int i,struct regstat *i_regs)
         if(lol>=0) emit_loadreg(LOREG,lol);
       }
     }
+#else
+    assert(0);
+#endif
   }
   else
   {