X-Git-Url: https://notaz.gp2x.de/cgi-bin/gitweb.cgi?p=pcsx_rearmed.git;a=blobdiff_plain;f=libpcsxcore%2Fnew_dynarec%2Fassem_arm.c;h=adbde599f3c6c33b56452cef0413f1095a1a28c6;hp=8432884bc2af1fe0d875bee2a907aeced07f42dc;hb=0c2ca3ba2ca8a191fc3f6d9782dc2420537b1964;hpb=f51dc36c05395bf077ff3b76452f36477581c8e1

diff --git a/libpcsxcore/new_dynarec/assem_arm.c b/libpcsxcore/new_dynarec/assem_arm.c
index 8432884b..adbde599 100644
--- a/libpcsxcore/new_dynarec/assem_arm.c
+++ b/libpcsxcore/new_dynarec/assem_arm.c
@@ -1,6 +1,6 @@
 /* * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * *
  *   Mupen64plus - assem_arm.c                                             *
- *   Copyright (C) 2009-2010 Ari64                                         *
+ *   Copyright (C) 2009-2011 Ari64                                         *
  *                                                                         *
  *   This program is free software; you can redistribute it and/or modify  *
  *   it under the terms of the GNU General Public License as published by  *
@@ -170,6 +170,7 @@ void set_jump_target_fillslot(int addr,u_int target,int copy)
 /* Literal pool */
 add_literal(int addr,int val)
 {
+  assert(literalcount<sizeof(literals)/sizeof(literals[0]));
   literals[literalcount][0]=addr;
   literals[literalcount][1]=val;
   literalcount++; 
@@ -186,11 +187,15 @@ void *kill_pointer(void *stub)
   return i_ptr;
 }
 
+// find where external branch is liked to using addr of it's stub:
+// get address that insn one after stub loads (dyna_linker arg1),
+// treat it as a pointer to branch insn,
+// return addr where that branch jumps to
 int get_pointer(void *stub)
 {
   //printf("get_pointer(%x)\n",(int)stub);
   int *ptr=(int *)(stub+4);
-  assert((*ptr&0x0ff00000)==0x05900000);
+  assert((*ptr&0x0fff0000)==0x059f0000);
   u_int offset=*ptr&0xfff;
   int **l_ptr=(void *)ptr+offset+8;
   int *i_ptr=*l_ptr;
@@ -222,7 +227,7 @@ int verify_dirty(int addr)
   u_int *ptr=(u_int *)addr;
   #ifdef ARMv5_ONLY
   // get from literal pool
-  assert((*ptr&0xFFF00000)==0xe5900000);
+  assert((*ptr&0xFFFF0000)==0xe59f0000);
   u_int offset=*ptr&0xfff;
   u_int *l_ptr=(void *)ptr+offset+8;
   u_int source=l_ptr[0];
@@ -275,7 +280,7 @@ void get_bounds(int addr,u_int *start,u_int *end)
   u_int *ptr=(u_int *)addr;
   #ifdef ARMv5_ONLY
   // get from literal pool
-  assert((*ptr&0xFFF00000)==0xe5900000);
+  assert((*ptr&0xFFFF0000)==0xe59f0000);
   u_int offset=*ptr&0xfff;
   u_int *l_ptr=(void *)ptr+offset+8;
   u_int source=l_ptr[0];
@@ -762,15 +767,20 @@ void alloc_reg_temp(struct regstat *cur,int i,signed char reg)
 void alloc_arm_reg(struct regstat *cur,int i,signed char reg,char hr)
 {
   int n;
+  int dirty=0;
   
   // see if it's already allocated (and dealloc it)
   for(n=0;n<HOST_REGS;n++)
   {
-    if(n!=EXCLUDE_REG&&cur->regmap[n]==reg) {cur->regmap[n]=-1;}
+    if(n!=EXCLUDE_REG&&cur->regmap[n]==reg) {
+      dirty=(cur->dirty>>n)&1;
+      cur->regmap[n]=-1;
+    }
   }
   
   cur->regmap[hr]=reg;
   cur->dirty&=~(1<<hr);
+  cur->dirty|=dirty<<hr;
   cur->isconst&=~(1<<hr);
 }
 
@@ -845,7 +855,8 @@ u_int rd_rn_imm_shift(u_int rd, u_int rn, u_int imm, u_int shift)
 }
 u_int genimm(u_int imm,u_int *encoded)
 {
-  if(imm==0) {*encoded=0;return 1;}
+  *encoded=0;
+  if(imm==0) return 1;
   int i=32;
   while(i>0)
   {
@@ -1002,7 +1013,8 @@ void emit_loadreg(int r, int hr)
 #ifdef FORCE32
   if(r&64) {
     printf("64bit load in 32bit mode!\n");
-    exit(1);
+    assert(0);
+    return;
   }
 #endif
   if((r&63)==0)
@@ -1026,7 +1038,8 @@ void emit_storereg(int r, int hr)
 #ifdef FORCE32
   if(r&64) {
     printf("64bit store in 32bit mode!\n");
-    exit(1);
+    assert(0);
+    return;
   }
 #endif
   int addr=((int)reg)+((r&63)<<REG_SHIFT)+((r&64)>>4);
@@ -1049,7 +1062,7 @@ void emit_test(int rs, int rt)
 void emit_testimm(int rs,int imm)
 {
   u_int armval;
-  assem_debug("tst %s,$%d\n",regname[rs],imm);
+  assem_debug("tst %s,#%d\n",regname[rs],imm);
   genimm_checked(imm,&armval);
   output_w32(0xe3100000|rd_rn_rm(0,rs,0)|armval);
 }
@@ -1442,10 +1455,10 @@ void emit_cmpimm(int rs,int imm)
 {
   u_int armval;
   if(genimm(imm,&armval)) {
-    assem_debug("cmp %s,$%d\n",regname[rs],imm);
+    assem_debug("cmp %s,#%d\n",regname[rs],imm);
     output_w32(0xe3500000|rd_rn_rm(0,rs,0)|armval);
   }else if(genimm(-imm,&armval)) {
-    assem_debug("cmn %s,$%d\n",regname[rs],imm);
+    assem_debug("cmn %s,#%d\n",regname[rs],imm);
     output_w32(0xe3700000|rd_rn_rm(0,rs,0)|armval);
   }else if(imm>0) {
     assert(imm<65536);
@@ -2602,6 +2615,10 @@ emit_extjump_ds(int addr, int target)
   emit_extjump2(addr, target, (int)dyna_linker_ds);
 }
 
+#ifdef PCSX
+#include "pcsxmem_inline.c"
+#endif
+
 do_readstub(int n)
 {
   assem_debug("do_readstub %x\n",start+stubs[n][3]*4);
@@ -2642,12 +2659,14 @@ do_readstub(int n)
   emit_writeword(rs,(int)&address);
   //emit_pusha();
   save_regs(reglist);
+#ifndef PCSX
   ds=i_regs!=&regs[i];
   int real_rs=(itype[i]==LOADLR)?-1:get_reg(i_regmap,rs1[i]);
   u_int cmask=ds?-1:(0x100f|~i_regs->wasconst);
   if(!ds) load_all_consts(regs[i].regmap_entry,regs[i].was32,regs[i].wasdirty&~(1<<addr)&(real_rs<0?-1:~(1<<real_rs))&0x100f,i);
   wb_dirtys(i_regs->regmap_entry,i_regs->was32,i_regs->wasdirty&cmask&~(1<<addr)&(real_rs<0?-1:~(1<<real_rs)));
   if(!ds) wb_consts(regs[i].regmap_entry,regs[i].was32,regs[i].wasdirty&~(1<<addr)&(real_rs<0?-1:~(1<<real_rs))&~0x100f,i);
+#endif
   emit_shrimm(rs,16,1);
   int cc=get_reg(i_regmap,CCREG);
   if(cc<0) {
@@ -2721,11 +2740,27 @@ inline_readstub(int type, int i, u_int addr, signed char regmap[], int target, i
     ftable=(int)readmemd;
 #endif
   assert(ftable!=0);
+#ifdef PCSX
+  if(pcsx_direct_read(type,addr,target?rs:-1,rt))
+    return;
+#endif
   if(target==0)
     emit_movimm(addr,rs);
   emit_writeword(rs,(int)&address);
   //emit_pusha();
   save_regs(reglist);
+#ifndef PCSX
+  if((signed int)addr>=(signed int)0xC0000000) {
+    // Theoretically we can have a pagefault here, if the TLB has never
+    // been enabled and the address is outside the range 80000000..BFFFFFFF
+    // Write out the registers so the pagefault can be handled.  This is
+    // a very rare case and likely represents a bug.
+    int ds=regmap!=regs[i].regmap;
+    if(!ds) load_all_consts(regs[i].regmap_entry,regs[i].was32,regs[i].wasdirty,i);
+    if(!ds) wb_dirtys(regs[i].regmap_entry,regs[i].was32,regs[i].wasdirty);
+    else wb_dirtys(branch_regs[i-1].regmap_entry,branch_regs[i-1].was32,branch_regs[i-1].wasdirty);
+  }
+#endif
   //emit_shrimm(rs,16,1);
   int cc=get_reg(regmap,CCREG);
   if(cc<0) {
@@ -2834,12 +2869,14 @@ do_writestub(int n)
   }
   //emit_pusha();
   save_regs(reglist);
+#ifndef PCSX
   ds=i_regs!=&regs[i];
   int real_rs=get_reg(i_regmap,rs1[i]);
   u_int cmask=ds?-1:(0x100f|~i_regs->wasconst);
   if(!ds) load_all_consts(regs[i].regmap_entry,regs[i].was32,regs[i].wasdirty&~(1<<addr)&(real_rs<0?-1:~(1<<real_rs))&0x100f,i);
   wb_dirtys(i_regs->regmap_entry,i_regs->was32,i_regs->wasdirty&cmask&~(1<<addr)&(real_rs<0?-1:~(1<<real_rs)));
   if(!ds) wb_consts(regs[i].regmap_entry,regs[i].was32,regs[i].wasdirty&~(1<<addr)&(real_rs<0?-1:~(1<<real_rs))&~0x100f,i);
+#endif
   emit_shrimm(rs,16,1);
   int cc=get_reg(i_regmap,CCREG);
   if(cc<0) {
@@ -2879,6 +2916,10 @@ inline_writestub(int type, int i, u_int addr, signed char regmap[], int target,
   int rt=get_reg(regmap,target);
   assert(rs>=0);
   assert(rt>=0);
+#ifdef PCSX
+  if(pcsx_direct_write(type,addr,rs,rt,regmap))
+    return;
+#endif
   int ftable=0;
   if(type==STOREB_STUB)
     ftable=(int)writememb;
@@ -2910,6 +2951,19 @@ inline_writestub(int type, int i, u_int addr, signed char regmap[], int target,
   }
   //emit_pusha();
   save_regs(reglist);
+#ifndef PCSX
+  // rearmed note: load_all_consts prevents BIOS boot, some bug?
+  if((signed int)addr>=(signed int)0xC0000000) {
+    // Theoretically we can have a pagefault here, if the TLB has never
+    // been enabled and the address is outside the range 80000000..BFFFFFFF
+    // Write out the registers so the pagefault can be handled.  This is
+    // a very rare case and likely represents a bug.
+    int ds=regmap!=regs[i].regmap;
+    if(!ds) load_all_consts(regs[i].regmap_entry,regs[i].was32,regs[i].wasdirty,i);
+    if(!ds) wb_dirtys(regs[i].regmap_entry,regs[i].was32,regs[i].wasdirty);
+    else wb_dirtys(branch_regs[i-1].regmap_entry,branch_regs[i-1].was32,branch_regs[i-1].wasdirty);
+  }
+#endif
   //emit_shrimm(rs,16,1);
   int cc=get_reg(regmap,CCREG);
   if(cc<0) {
@@ -2967,12 +3021,14 @@ do_unalignedwritestub(int n)
   emit_writeword(temp2,(int)&address);
 
   save_regs(reglist);
+#ifndef PCSX
   ds=i_regs!=&regs[i];
   real_rs=get_reg(i_regmap,rs1[i]);
   u_int cmask=ds?-1:(0x100f|~i_regs->wasconst);
   if(!ds) load_all_consts(regs[i].regmap_entry,regs[i].was32,regs[i].wasdirty&~(1<<addr)&(real_rs<0?-1:~(1<<real_rs))&0x100f,i);
   wb_dirtys(i_regs->regmap_entry,i_regs->was32,i_regs->wasdirty&cmask&~(1<<addr)&(real_rs<0?-1:~(1<<real_rs)));
   if(!ds) wb_consts(regs[i].regmap_entry,regs[i].was32,regs[i].wasdirty&~(1<<addr)&(real_rs<0?-1:~(1<<real_rs))&~0x100f,i);
+#endif
   emit_shrimm(addr,16,1);
   int cc=get_reg(i_regmap,CCREG);
   if(cc<0) {
@@ -3310,7 +3366,7 @@ void loadlr_assemble_arm(int i,struct regstat *i_regs)
   int s,th,tl,temp,temp2,addr,map=-1;
   int offset;
   int jaddr=0;
-  int memtarget,c=0;
+  int memtarget=0,c=0;
   u_int hr,reglist=0;
   th=get_reg(i_regs->regmap,rt1[i]|64);
   tl=get_reg(i_regs->regmap,rt1[i]);
@@ -3328,8 +3384,10 @@ void loadlr_assemble_arm(int i,struct regstat *i_regs)
   else addr=s;
   if(s>=0) {
     c=(i_regs->wasconst>>s)&1;
-    memtarget=((signed int)(constmap[i][s]+offset))<(signed int)0x80000000+RAM_SIZE;
-    if(using_tlb&&((signed int)(constmap[i][s]+offset))>=(signed int)0xC0000000) memtarget=1;
+    if(c) {
+      memtarget=((signed int)(constmap[i][s]+offset))<(signed int)0x80000000+RAM_SIZE;
+      if(using_tlb&&((signed int)(constmap[i][s]+offset))>=(signed int)0xC0000000) memtarget=1;
+    }
   }
   if(!using_tlb) {
     if(!c) {
@@ -3365,6 +3423,7 @@ void loadlr_assemble_arm(int i,struct regstat *i_regs)
     }
     map=get_reg(i_regs->regmap,TLREG);
     assert(map>=0);
+    reglist&=~(1<<map);
     map=do_tlb_r(addr,temp2,map,0,a,c?-1:temp,c,constmap[i][s]+offset);
     if(c) {
       if (opcode[i]==0x22||opcode[i]==0x26) {
@@ -3737,6 +3796,7 @@ void c2op_assemble(int i,struct regstat *i_regs)
   signed char temp=get_reg(i_regs->regmap,-1);
   u_int c2op=source[i]&0x3f;
   u_int hr,reglist=0;
+  int need_flags;
   for(hr=0;hr<HOST_REGS;hr++) {
     if(i_regs->regmap[hr]>=0) reglist|=1<<hr;
   }
@@ -3745,11 +3805,18 @@ void c2op_assemble(int i,struct regstat *i_regs)
 
   if (gte_handlers[c2op]!=NULL) {
     int cc=get_reg(i_regs->regmap,CCREG);
-    emit_movimm(source[i],temp); // opcode
+    emit_movimm(source[i],1); // opcode
     if (cc>=0&&gte_cycletab[c2op])
-      emit_addimm(cc,gte_cycletab[c2op]/2,cc); // XXX: cound just adjust ccadj?
-    emit_writeword(temp,(int)&psxRegs.code);
-    emit_call((int)gte_handlers[c2op]);
+      emit_addimm(cc,gte_cycletab[c2op]/2,cc); // XXX: could just adjust ccadj?
+    emit_addimm(FP,(int)&psxRegs.CP2D.r[0]-(int)&dynarec_local,0); // cop2 regs
+    emit_writeword(1,(int)&psxRegs.code);
+    need_flags=!(gte_unneeded[i+1]>>63); // +1 because of how liveness detection works
+    assem_debug("gte unneeded %016llx, need_flags %d\n",gte_unneeded[i+1],need_flags);
+#ifdef ARMv5_ONLY
+    // let's take more risk here
+    need_flags=need_flags&&gte_reads_flags;
+#endif
+    emit_call((int)(need_flags?gte_handlers[c2op]:gte_handlers_nf[c2op]));
   }
 
   if(i>=slen-1||itype[i+1]!=C2OP)
@@ -4438,7 +4505,9 @@ void multdiv_assemble_arm(int i,struct regstat *i_regs)
         assert(quotient>=0);
         assert(remainder>=0);
         emit_movs(d1,remainder);
-        emit_negmi(remainder,remainder);
+        emit_movimm(0xffffffff,quotient);
+        emit_negmi(quotient,quotient); // .. quotient and ..
+        emit_negmi(remainder,remainder); // .. remainder for div0 case (will be negated back after jump)
         emit_movs(d2,HOST_TEMPREG);
         emit_jeq((int)out+52); // Division by zero
         emit_negmi(HOST_TEMPREG,HOST_TEMPREG);
@@ -4466,12 +4535,13 @@ void multdiv_assemble_arm(int i,struct regstat *i_regs)
         signed char remainder=get_reg(i_regs->regmap,HIREG);
         assert(quotient>=0);
         assert(remainder>=0);
+        emit_mov(d1,remainder);
+        emit_movimm(0xffffffff,quotient); // div0 case
         emit_test(d2,d2);
-        emit_jeq((int)out+44); // Division by zero
+        emit_jeq((int)out+40); // Division by zero
         emit_clz(d2,HOST_TEMPREG);
         emit_movimm(1<<31,quotient);
         emit_shl(d2,HOST_TEMPREG,d2);
-        emit_mov(d1,remainder);
         emit_shr(quotient,HOST_TEMPREG,quotient);
         emit_cmp(remainder,d2);
         emit_subcs(remainder,d2,remainder);
@@ -4748,7 +4818,7 @@ void wb_valid(signed char pre[],signed char entry[],u_int dirty_pre,u_int dirty,
     if(hr!=EXCLUDE_REG) {
       reg=pre[hr];
       if(((~u)>>(reg&63))&1) {
-        if(reg==entry[hr]||(reg>0&&entry[hr]<0)) {
+        if(reg>0) {
           if(((dirty_pre&~dirty)>>hr)&1) {
             if(reg>0&&reg<34) {
               emit_storereg(reg,hr);
@@ -4762,21 +4832,6 @@ void wb_valid(signed char pre[],signed char entry[],u_int dirty_pre,u_int dirty,
             }
           }
         }
-        else // Check if register moved to a different register
-        if((new_hr=get_reg(entry,reg))>=0) {
-          if((dirty_pre>>hr)&(~dirty>>new_hr)&1) {
-            if(reg>0&&reg<34) {
-              emit_storereg(reg,hr);
-              if( ((is32_pre&~uu)>>reg)&1 ) {
-                emit_sarimm(hr,31,HOST_TEMPREG);
-                emit_storereg(reg|64,HOST_TEMPREG);
-              }
-            }
-            else if(reg>=64) {
-              emit_storereg(reg,hr);
-            }
-          }
-        }
       }
     }
   }