X-Git-Url: https://notaz.gp2x.de/cgi-bin/gitweb.cgi?p=pcsx_rearmed.git;a=blobdiff_plain;f=libpcsxcore%2Fnew_dynarec%2Fassem_arm.c;h=af45ce37b032c586872c46f2b225b8881327bb1f;hp=a40acf1725543b466d5d7b686bec80c42d7144f4;hb=f776eb14d490a2c4391666ce5beefe058e7e03d5;hpb=0bbd14543fec5fd4f5664b676771812663235252 diff --git a/libpcsxcore/new_dynarec/assem_arm.c b/libpcsxcore/new_dynarec/assem_arm.c index a40acf17..af45ce37 100644 --- a/libpcsxcore/new_dynarec/assem_arm.c +++ b/libpcsxcore/new_dynarec/assem_arm.c @@ -1,6 +1,6 @@ /* * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * Mupen64plus - assem_arm.c * - * Copyright (C) 2009-2010 Ari64 * + * Copyright (C) 2009-2011 Ari64 * * * * This program is free software; you can redistribute it and/or modify * * it under the terms of the GNU General Public License as published by * @@ -762,15 +762,20 @@ void alloc_reg_temp(struct regstat *cur,int i,signed char reg) void alloc_arm_reg(struct regstat *cur,int i,signed char reg,char hr) { int n; + int dirty=0; // see if it's already allocated (and dealloc it) for(n=0;nregmap[n]==reg) {cur->regmap[n]=-1;} + if(n!=EXCLUDE_REG&&cur->regmap[n]==reg) { + dirty=(cur->dirty>>n)&1; + cur->regmap[n]=-1; + } } cur->regmap[hr]=reg; cur->dirty&=~(1<dirty|=dirty<isconst&=~(1<0) { @@ -1002,7 +1008,8 @@ void emit_loadreg(int r, int hr) #ifdef FORCE32 if(r&64) { printf("64bit load in 32bit mode!\n"); - exit(1); + assert(0); + return; } #endif if((r&63)==0) @@ -1026,7 +1033,8 @@ void emit_storereg(int r, int hr) #ifdef FORCE32 if(r&64) { printf("64bit store in 32bit mode!\n"); - exit(1); + assert(0); + return; } #endif int addr=((int)reg)+((r&63)<>4); @@ -2602,6 +2610,10 @@ emit_extjump_ds(int addr, int target) emit_extjump2(addr, target, (int)dyna_linker_ds); } +#ifdef PCSX +#include "pcsxmem_inline.c" +#endif + do_readstub(int n) { assem_debug("do_readstub %x\n",start+stubs[n][3]*4); @@ -2642,12 +2654,14 @@ do_readstub(int n) emit_writeword(rs,(int)&address); //emit_pusha(); save_regs(reglist); +#ifndef PCSX ds=i_regs!=®s[i]; int real_rs=(itype[i]==LOADLR)?-1:get_reg(i_regmap,rs1[i]); u_int cmask=ds?-1:(0x100f|~i_regs->wasconst); if(!ds) load_all_consts(regs[i].regmap_entry,regs[i].was32,regs[i].wasdirty&~(1<regmap_entry,i_regs->was32,i_regs->wasdirty&cmask&~(1<>rs1[i])&1)<<1)+ds,3); +#endif //emit_readword((int)&last_count,temp); //emit_add(cc,temp,cc); //emit_writeword(cc,(int)&Count); @@ -2663,6 +2679,7 @@ do_readstub(int n) emit_call((int)&indirect_jump_indexed); //emit_callreg(rs); //emit_readword_dualindexedx4(rs,HOST_TEMPREG,15); +#ifndef PCSX // We really shouldn't need to update the count here, // but not doing so causes random crashes... emit_readword((int)&Count,HOST_TEMPREG); @@ -2673,6 +2690,7 @@ do_readstub(int n) if(cc<0) { emit_storereg(CCREG,HOST_TEMPREG); } +#endif //emit_popa(); restore_regs(reglist); //if((cc=get_reg(regmap,CCREG))>=0) { @@ -2717,11 +2735,27 @@ inline_readstub(int type, int i, u_int addr, signed char regmap[], int target, i ftable=(int)readmemd; #endif assert(ftable!=0); +#ifdef PCSX + if(pcsx_direct_read(type,addr,target?rs:-1,rt)) + return; +#endif if(target==0) emit_movimm(addr,rs); emit_writeword(rs,(int)&address); //emit_pusha(); save_regs(reglist); +#ifndef PCSX + if((signed int)addr>=(signed int)0xC0000000) { + // Theoretically we can have a pagefault here, if the TLB has never + // been enabled and the address is outside the range 80000000..BFFFFFFF + // Write out the registers so the pagefault can be handled. This is + // a very rare case and likely represents a bug. + int ds=regmap!=regs[i].regmap; + if(!ds) load_all_consts(regs[i].regmap_entry,regs[i].was32,regs[i].wasdirty,i); + if(!ds) wb_dirtys(regs[i].regmap_entry,regs[i].was32,regs[i].wasdirty); + else wb_dirtys(branch_regs[i-1].regmap_entry,branch_regs[i-1].was32,branch_regs[i-1].wasdirty); + } +#endif //emit_shrimm(rs,16,1); int cc=get_reg(regmap,CCREG); if(cc<0) { @@ -2731,15 +2765,18 @@ inline_readstub(int type, int i, u_int addr, signed char regmap[], int target, i emit_movimm(((u_int *)ftable)[addr>>16],0); //emit_readword((int)&last_count,12); emit_addimm(cc<0?2:cc,CLOCK_DIVIDER*(adj+1),2); +#ifndef PCSX if((signed int)addr>=(signed int)0xC0000000) { // Pagefault address int ds=regmap!=regs[i].regmap; emit_movimm(start+i*4+(((regs[i].was32>>rs1[i])&1)<<1)+ds,3); } +#endif //emit_add(12,2,2); //emit_writeword(2,(int)&Count); //emit_call(((u_int *)ftable)[addr>>16]); emit_call((int)&indirect_jump); +#ifndef PCSX // We really shouldn't need to update the count here, // but not doing so causes random crashes... emit_readword((int)&Count,HOST_TEMPREG); @@ -2750,6 +2787,7 @@ inline_readstub(int type, int i, u_int addr, signed char regmap[], int target, i if(cc<0) { emit_storereg(CCREG,HOST_TEMPREG); } +#endif //emit_popa(); restore_regs(reglist); if(rt>=0) { @@ -2826,12 +2864,14 @@ do_writestub(int n) } //emit_pusha(); save_regs(reglist); +#ifndef PCSX ds=i_regs!=®s[i]; int real_rs=get_reg(i_regmap,rs1[i]); u_int cmask=ds?-1:(0x100f|~i_regs->wasconst); if(!ds) load_all_consts(regs[i].regmap_entry,regs[i].was32,regs[i].wasdirty&~(1<regmap_entry,i_regs->was32,i_regs->wasdirty&cmask&~(1<>rs1[i])&1)<<1)+ds,3); +#endif //emit_readword((int)&last_count,temp); //emit_addimm(cc,2*stubs[n][5]+2,cc); //emit_add(cc,temp,cc); @@ -2869,6 +2911,10 @@ inline_writestub(int type, int i, u_int addr, signed char regmap[], int target, int rt=get_reg(regmap,target); assert(rs>=0); assert(rt>=0); +#ifdef PCSX + if(pcsx_direct_write(type,addr,rs,rt,regmap)) + return; +#endif int ftable=0; if(type==STOREB_STUB) ftable=(int)writememb; @@ -2900,6 +2946,19 @@ inline_writestub(int type, int i, u_int addr, signed char regmap[], int target, } //emit_pusha(); save_regs(reglist); +#ifndef PCSX + // rearmed note: load_all_consts prevents BIOS boot, some bug? + if((signed int)addr>=(signed int)0xC0000000) { + // Theoretically we can have a pagefault here, if the TLB has never + // been enabled and the address is outside the range 80000000..BFFFFFFF + // Write out the registers so the pagefault can be handled. This is + // a very rare case and likely represents a bug. + int ds=regmap!=regs[i].regmap; + if(!ds) load_all_consts(regs[i].regmap_entry,regs[i].was32,regs[i].wasdirty,i); + if(!ds) wb_dirtys(regs[i].regmap_entry,regs[i].was32,regs[i].wasdirty); + else wb_dirtys(branch_regs[i-1].regmap_entry,branch_regs[i-1].was32,branch_regs[i-1].wasdirty); + } +#endif //emit_shrimm(rs,16,1); int cc=get_reg(regmap,CCREG); if(cc<0) { @@ -2909,11 +2968,13 @@ inline_writestub(int type, int i, u_int addr, signed char regmap[], int target, emit_movimm(((u_int *)ftable)[addr>>16],0); //emit_readword((int)&last_count,12); emit_addimm(cc<0?2:cc,CLOCK_DIVIDER*(adj+1),2); +#ifndef PCSX if((signed int)addr>=(signed int)0xC0000000) { // Pagefault address int ds=regmap!=regs[i].regmap; emit_movimm(start+i*4+(((regs[i].was32>>rs1[i])&1)<<1)+ds,3); } +#endif //emit_add(12,2,2); //emit_writeword(2,(int)&Count); //emit_call(((u_int *)ftable)[addr>>16]); @@ -2955,12 +3016,14 @@ do_unalignedwritestub(int n) emit_writeword(temp2,(int)&address); save_regs(reglist); +#ifndef PCSX ds=i_regs!=®s[i]; real_rs=get_reg(i_regmap,rs1[i]); u_int cmask=ds?-1:(0x100f|~i_regs->wasconst); if(!ds) load_all_consts(regs[i].regmap_entry,regs[i].was32,regs[i].wasdirty&~(1<regmap_entry,i_regs->was32,i_regs->wasdirty&cmask&~(1<>rs1[i])&1)<<1)+ds,3); // XXX: can be rm'd? +#ifndef PCSX + // pagefault address + emit_movimm(start+stubs[n][3]*4+(((regs[i].was32>>rs1[i])&1)<<1)+ds,3); +#endif emit_call((int)&indirect_jump_indexed); restore_regs(reglist); @@ -3295,7 +3361,7 @@ void loadlr_assemble_arm(int i,struct regstat *i_regs) int s,th,tl,temp,temp2,addr,map=-1; int offset; int jaddr=0; - int memtarget,c=0; + int memtarget=0,c=0; u_int hr,reglist=0; th=get_reg(i_regs->regmap,rt1[i]|64); tl=get_reg(i_regs->regmap,rt1[i]); @@ -3313,8 +3379,10 @@ void loadlr_assemble_arm(int i,struct regstat *i_regs) else addr=s; if(s>=0) { c=(i_regs->wasconst>>s)&1; - memtarget=((signed int)(constmap[i][s]+offset))<(signed int)0x80000000+RAM_SIZE; - if(using_tlb&&((signed int)(constmap[i][s]+offset))>=(signed int)0xC0000000) memtarget=1; + if(c) { + memtarget=((signed int)(constmap[i][s]+offset))<(signed int)0x80000000+RAM_SIZE; + if(using_tlb&&((signed int)(constmap[i][s]+offset))>=(signed int)0xC0000000) memtarget=1; + } } if(!using_tlb) { if(!c) { @@ -3350,6 +3418,7 @@ void loadlr_assemble_arm(int i,struct regstat *i_regs) } map=get_reg(i_regs->regmap,TLREG); assert(map>=0); + reglist&=~(1<regmap,CCREG); - emit_movimm(source[i],temp); // opcode + emit_movimm(source[i],1); // opcode if (cc>=0&>e_cycletab[c2op]) - emit_addimm(cc,gte_cycletab[c2op]/2,cc); // XXX: cound just adjust ccadj? - emit_writeword(temp,(int)&psxRegs.code); + emit_addimm(cc,gte_cycletab[c2op]/2,cc); // XXX: could just adjust ccadj? + emit_addimm(FP,(int)&psxRegs.CP2D.r[0]-(int)&dynarec_local,0); // cop2 regs + emit_writeword(1,(int)&psxRegs.code); emit_call((int)gte_handlers[c2op]); } @@ -4733,7 +4803,7 @@ void wb_valid(signed char pre[],signed char entry[],u_int dirty_pre,u_int dirty, if(hr!=EXCLUDE_REG) { reg=pre[hr]; if(((~u)>>(reg&63))&1) { - if(reg==entry[hr]||(reg>0&&entry[hr]<0)) { + if(reg>0) { if(((dirty_pre&~dirty)>>hr)&1) { if(reg>0&®<34) { emit_storereg(reg,hr); @@ -4747,21 +4817,6 @@ void wb_valid(signed char pre[],signed char entry[],u_int dirty_pre,u_int dirty, } } } - else // Check if register moved to a different register - if((new_hr=get_reg(entry,reg))>=0) { - if((dirty_pre>>hr)&(~dirty>>new_hr)&1) { - if(reg>0&®<34) { - emit_storereg(reg,hr); - if( ((is32_pre&~uu)>>reg)&1 ) { - emit_sarimm(hr,31,HOST_TEMPREG); - emit_storereg(reg|64,HOST_TEMPREG); - } - } - else if(reg>=64) { - emit_storereg(reg,hr); - } - } - } } } }