X-Git-Url: https://notaz.gp2x.de/cgi-bin/gitweb.cgi?p=pcsx_rearmed.git;a=blobdiff_plain;f=libpcsxcore%2Fnew_dynarec%2Fassem_arm.c;h=cb6a88b9920854eb9ea13ca4b209ecb77303cd6d;hp=51cceec40a660a4b38b7a4f56f692452d7484c88;hb=c43b5311cb0f9b559b65c94ad4d8f6afaddae27f;hpb=665f33e1e8ce2e40a7939a33075c3bce1c90790c diff --git a/libpcsxcore/new_dynarec/assem_arm.c b/libpcsxcore/new_dynarec/assem_arm.c index 51cceec4..cb6a88b9 100644 --- a/libpcsxcore/new_dynarec/assem_arm.c +++ b/libpcsxcore/new_dynarec/assem_arm.c @@ -493,7 +493,7 @@ void alloc_reg(struct regstat *cur,int i,signed char reg) } } } - printf("This shouldn't happen (alloc_reg)");exit(1); + SysPrintf("This shouldn't happen (alloc_reg)");exit(1); } void alloc_reg64(struct regstat *cur,int i,signed char reg) @@ -659,7 +659,7 @@ void alloc_reg64(struct regstat *cur,int i,signed char reg) } } } - printf("This shouldn't happen");exit(1); + SysPrintf("This shouldn't happen");exit(1); } // Allocate a temporary register. This is done without regard to @@ -782,7 +782,7 @@ void alloc_reg_temp(struct regstat *cur,int i,signed char reg) } } } - printf("This shouldn't happen");exit(1); + SysPrintf("This shouldn't happen");exit(1); } // Allocate a specific ARM register. void alloc_arm_reg(struct regstat *cur,int i,signed char reg,char hr) @@ -899,7 +899,7 @@ u_int genjmp(u_int addr) int offset=addr-(int)out-8; if(offset<-33554432||offset>=33554432) { if (addr>2) { - printf("genjmp: out of range: %08x\n", offset); + SysPrintf("genjmp: out of range: %08x\n", offset); exit(1); } return 0; @@ -1033,7 +1033,7 @@ void emit_loadreg(int r, int hr) { #ifdef FORCE32 if(r&64) { - printf("64bit load in 32bit mode!\n"); + SysPrintf("64bit load in 32bit mode!\n"); assert(0); return; } @@ -1058,7 +1058,7 @@ void emit_storereg(int r, int hr) { #ifdef FORCE32 if(r&64) { - printf("64bit store in 32bit mode!\n"); + SysPrintf("64bit store in 32bit mode!\n"); assert(0); return; } @@ -3288,7 +3288,7 @@ do_writestub(int n) emit_writeword(rt,(int)&dword); emit_writeword(r?rth:rt,(int)&dword+4); #else - printf("STORED_STUB\n"); + SysPrintf("STORED_STUB\n"); #endif } //emit_pusha(); @@ -3397,7 +3397,7 @@ inline_writestub(int type, int i, u_int addr, signed char regmap[], int target, emit_writeword(rt,(int)&dword); emit_writeword(target?rth:rt,(int)&dword+4); #else - printf("STORED_STUB\n"); + SysPrintf("STORED_STUB\n"); #endif } //emit_pusha(); @@ -4531,8 +4531,8 @@ static void c2op_assemble(int i,struct regstat *i_regs) int lm = (source[i] >> 10) & 1; switch(c2op) { #ifndef DRC_DBG -#ifdef HAVE_ARMV5 case GTE_MVMVA: { +#ifdef HAVE_ARMV5 int v = (source[i] >> 15) & 3; int cv = (source[i] >> 13) & 3; int mx = (source[i] >> 17) & 3; @@ -4571,10 +4571,15 @@ static void c2op_assemble(int i,struct regstat *i_regs) } if(need_flags||need_ir) c2op_call_MACtoIR(lm,need_flags); +#endif +#else /* if not HAVE_ARMV5 */ + c2op_prologue(c2op,reglist); + emit_movimm(source[i],1); // opcode + emit_writeword(1,(int)&psxRegs.code); + emit_call((int)(need_flags?gte_handlers[c2op]:gte_handlers_nf[c2op])); #endif break; } -#endif /* HAVE_ARMV5 */ case GTE_OP: c2op_prologue(c2op,reglist); emit_call((int)(shift?gteOP_part_shift:gteOP_part_noshift)); @@ -5312,7 +5317,7 @@ void multdiv_assemble_arm(int i,struct regstat *i_regs) emit_negmi(remainder,remainder); // .. remainder for div0 case (will be negated back after jump) emit_movs(d2,HOST_TEMPREG); emit_jeq((int)out+52); // Division by zero - emit_negmi(HOST_TEMPREG,HOST_TEMPREG); + emit_negsmi(HOST_TEMPREG,HOST_TEMPREG); #ifdef HAVE_ARMV5 emit_clz(HOST_TEMPREG,quotient); emit_shl(HOST_TEMPREG,quotient,HOST_TEMPREG); @@ -5354,8 +5359,8 @@ void multdiv_assemble_arm(int i,struct regstat *i_regs) emit_shl(d2,HOST_TEMPREG,d2); #else emit_movimm(0,HOST_TEMPREG); - emit_addpl_imm(d2,1,d2); - emit_lslpls_imm(HOST_TEMPREG,1,HOST_TEMPREG); + emit_addpl_imm(HOST_TEMPREG,1,HOST_TEMPREG); + emit_lslpls_imm(d2,1,d2); emit_jns((int)out-2*4); emit_movimm(1<<31,quotient); #endif