X-Git-Url: https://notaz.gp2x.de/cgi-bin/gitweb.cgi?p=pcsx_rearmed.git;a=blobdiff_plain;f=libpcsxcore%2Fnew_dynarec%2Fassem_arm.c;h=d0b1bd7941ee5fd10a7644ffc90f0f321bac1d68;hp=36a3e45ac9606540eca8b611f3c373d014ee9f8d;hb=be516ebe45e48044b599e9d9f9f2d296c3f3ee62;hpb=643aeae3222be00a799ca1e96e795ff846f81fee

diff --git a/libpcsxcore/new_dynarec/assem_arm.c b/libpcsxcore/new_dynarec/assem_arm.c
index 36a3e45a..d0b1bd79 100644
--- a/libpcsxcore/new_dynarec/assem_arm.c
+++ b/libpcsxcore/new_dynarec/assem_arm.c
@@ -55,7 +55,6 @@ extern int pcaddr;
 extern int pending_exception;
 extern int branch_target;
 extern uint64_t readmem_dword;
-extern void *dynarec_local;
 extern u_int mini_ht[32][2];
 
 void indirect_jump_indexed();
@@ -296,7 +295,7 @@ static int isclean(void *addr)
 }
 
 // get source that block at addr was compiled from (host pointers)
-static void get_bounds(void *addr,u_int *start,u_int *end)
+static void get_bounds(void *addr, u_char **start, u_char **end)
 {
   u_int *ptr = addr;
   #ifndef HAVE_ARMV7
@@ -325,466 +324,8 @@ static void get_bounds(void *addr,u_int *start,u_int *end)
   #endif
   if((*ptr&0xFF000000)!=0xeb000000) ptr++;
   assert((*ptr&0xFF000000)==0xeb000000); // bl instruction
-  *start=source;
-  *end=source+len;
-}
-
-/* Register allocation */
-
-// Note: registers are allocated clean (unmodified state)
-// if you intend to modify the register, you must call dirty_reg().
-static void alloc_reg(struct regstat *cur,int i,signed char reg)
-{
-  int r,hr;
-  int preferred_reg = (reg&7);
-  if(reg==CCREG) preferred_reg=HOST_CCREG;
-  if(reg==PTEMP||reg==FTEMP) preferred_reg=12;
-
-  // Don't allocate unused registers
-  if((cur->u>>reg)&1) return;
-
-  // see if it's already allocated
-  for(hr=0;hr<HOST_REGS;hr++)
-  {
-    if(cur->regmap[hr]==reg) return;
-  }
-
-  // Keep the same mapping if the register was already allocated in a loop
-  preferred_reg = loop_reg(i,reg,preferred_reg);
-
-  // Try to allocate the preferred register
-  if(cur->regmap[preferred_reg]==-1) {
-    cur->regmap[preferred_reg]=reg;
-    cur->dirty&=~(1<<preferred_reg);
-    cur->isconst&=~(1<<preferred_reg);
-    return;
-  }
-  r=cur->regmap[preferred_reg];
-  if(r<64&&((cur->u>>r)&1)) {
-    cur->regmap[preferred_reg]=reg;
-    cur->dirty&=~(1<<preferred_reg);
-    cur->isconst&=~(1<<preferred_reg);
-    return;
-  }
-  if(r>=64&&((cur->uu>>(r&63))&1)) {
-    cur->regmap[preferred_reg]=reg;
-    cur->dirty&=~(1<<preferred_reg);
-    cur->isconst&=~(1<<preferred_reg);
-    return;
-  }
-
-  // Clear any unneeded registers
-  // We try to keep the mapping consistent, if possible, because it
-  // makes branches easier (especially loops).  So we try to allocate
-  // first (see above) before removing old mappings.  If this is not
-  // possible then go ahead and clear out the registers that are no
-  // longer needed.
-  for(hr=0;hr<HOST_REGS;hr++)
-  {
-    r=cur->regmap[hr];
-    if(r>=0) {
-      if(r<64) {
-        if((cur->u>>r)&1) {cur->regmap[hr]=-1;break;}
-      }
-      else
-      {
-        if((cur->uu>>(r&63))&1) {cur->regmap[hr]=-1;break;}
-      }
-    }
-  }
-  // Try to allocate any available register, but prefer
-  // registers that have not been used recently.
-  if(i>0) {
-    for(hr=0;hr<HOST_REGS;hr++) {
-      if(hr!=EXCLUDE_REG&&cur->regmap[hr]==-1) {
-        if(regs[i-1].regmap[hr]!=rs1[i-1]&&regs[i-1].regmap[hr]!=rs2[i-1]&&regs[i-1].regmap[hr]!=rt1[i-1]&&regs[i-1].regmap[hr]!=rt2[i-1]) {
-          cur->regmap[hr]=reg;
-          cur->dirty&=~(1<<hr);
-          cur->isconst&=~(1<<hr);
-          return;
-        }
-      }
-    }
-  }
-  // Try to allocate any available register
-  for(hr=0;hr<HOST_REGS;hr++) {
-    if(hr!=EXCLUDE_REG&&cur->regmap[hr]==-1) {
-      cur->regmap[hr]=reg;
-      cur->dirty&=~(1<<hr);
-      cur->isconst&=~(1<<hr);
-      return;
-    }
-  }
-
-  // Ok, now we have to evict someone
-  // Pick a register we hopefully won't need soon
-  u_char hsn[MAXREG+1];
-  memset(hsn,10,sizeof(hsn));
-  int j;
-  lsn(hsn,i,&preferred_reg);
-  //printf("eax=%d ecx=%d edx=%d ebx=%d ebp=%d esi=%d edi=%d\n",cur->regmap[0],cur->regmap[1],cur->regmap[2],cur->regmap[3],cur->regmap[5],cur->regmap[6],cur->regmap[7]);
-  //printf("hsn(%x): %d %d %d %d %d %d %d\n",start+i*4,hsn[cur->regmap[0]&63],hsn[cur->regmap[1]&63],hsn[cur->regmap[2]&63],hsn[cur->regmap[3]&63],hsn[cur->regmap[5]&63],hsn[cur->regmap[6]&63],hsn[cur->regmap[7]&63]);
-  if(i>0) {
-    // Don't evict the cycle count at entry points, otherwise the entry
-    // stub will have to write it.
-    if(bt[i]&&hsn[CCREG]>2) hsn[CCREG]=2;
-    if(i>1&&hsn[CCREG]>2&&(itype[i-2]==RJUMP||itype[i-2]==UJUMP||itype[i-2]==CJUMP||itype[i-2]==SJUMP||itype[i-2]==FJUMP)) hsn[CCREG]=2;
-    for(j=10;j>=3;j--)
-    {
-      // Alloc preferred register if available
-      if(hsn[r=cur->regmap[preferred_reg]&63]==j) {
-        for(hr=0;hr<HOST_REGS;hr++) {
-          // Evict both parts of a 64-bit register
-          if((cur->regmap[hr]&63)==r) {
-            cur->regmap[hr]=-1;
-            cur->dirty&=~(1<<hr);
-            cur->isconst&=~(1<<hr);
-          }
-        }
-        cur->regmap[preferred_reg]=reg;
-        return;
-      }
-      for(r=1;r<=MAXREG;r++)
-      {
-        if(hsn[r]==j&&r!=rs1[i-1]&&r!=rs2[i-1]&&r!=rt1[i-1]&&r!=rt2[i-1]) {
-          for(hr=0;hr<HOST_REGS;hr++) {
-            if(hr!=HOST_CCREG||j<hsn[CCREG]) {
-              if(cur->regmap[hr]==r+64) {
-                cur->regmap[hr]=reg;
-                cur->dirty&=~(1<<hr);
-                cur->isconst&=~(1<<hr);
-                return;
-              }
-            }
-          }
-          for(hr=0;hr<HOST_REGS;hr++) {
-            if(hr!=HOST_CCREG||j<hsn[CCREG]) {
-              if(cur->regmap[hr]==r) {
-                cur->regmap[hr]=reg;
-                cur->dirty&=~(1<<hr);
-                cur->isconst&=~(1<<hr);
-                return;
-              }
-            }
-          }
-        }
-      }
-    }
-  }
-  for(j=10;j>=0;j--)
-  {
-    for(r=1;r<=MAXREG;r++)
-    {
-      if(hsn[r]==j) {
-        for(hr=0;hr<HOST_REGS;hr++) {
-          if(cur->regmap[hr]==r+64) {
-            cur->regmap[hr]=reg;
-            cur->dirty&=~(1<<hr);
-            cur->isconst&=~(1<<hr);
-            return;
-          }
-        }
-        for(hr=0;hr<HOST_REGS;hr++) {
-          if(cur->regmap[hr]==r) {
-            cur->regmap[hr]=reg;
-            cur->dirty&=~(1<<hr);
-            cur->isconst&=~(1<<hr);
-            return;
-          }
-        }
-      }
-    }
-  }
-  SysPrintf("This shouldn't happen (alloc_reg)");exit(1);
-}
-
-static void alloc_reg64(struct regstat *cur,int i,signed char reg)
-{
-  int preferred_reg = 8+(reg&1);
-  int r,hr;
-
-  // allocate the lower 32 bits
-  alloc_reg(cur,i,reg);
-
-  // Don't allocate unused registers
-  if((cur->uu>>reg)&1) return;
-
-  // see if the upper half is already allocated
-  for(hr=0;hr<HOST_REGS;hr++)
-  {
-    if(cur->regmap[hr]==reg+64) return;
-  }
-
-  // Keep the same mapping if the register was already allocated in a loop
-  preferred_reg = loop_reg(i,reg,preferred_reg);
-
-  // Try to allocate the preferred register
-  if(cur->regmap[preferred_reg]==-1) {
-    cur->regmap[preferred_reg]=reg|64;
-    cur->dirty&=~(1<<preferred_reg);
-    cur->isconst&=~(1<<preferred_reg);
-    return;
-  }
-  r=cur->regmap[preferred_reg];
-  if(r<64&&((cur->u>>r)&1)) {
-    cur->regmap[preferred_reg]=reg|64;
-    cur->dirty&=~(1<<preferred_reg);
-    cur->isconst&=~(1<<preferred_reg);
-    return;
-  }
-  if(r>=64&&((cur->uu>>(r&63))&1)) {
-    cur->regmap[preferred_reg]=reg|64;
-    cur->dirty&=~(1<<preferred_reg);
-    cur->isconst&=~(1<<preferred_reg);
-    return;
-  }
-
-  // Clear any unneeded registers
-  // We try to keep the mapping consistent, if possible, because it
-  // makes branches easier (especially loops).  So we try to allocate
-  // first (see above) before removing old mappings.  If this is not
-  // possible then go ahead and clear out the registers that are no
-  // longer needed.
-  for(hr=HOST_REGS-1;hr>=0;hr--)
-  {
-    r=cur->regmap[hr];
-    if(r>=0) {
-      if(r<64) {
-        if((cur->u>>r)&1) {cur->regmap[hr]=-1;break;}
-      }
-      else
-      {
-        if((cur->uu>>(r&63))&1) {cur->regmap[hr]=-1;break;}
-      }
-    }
-  }
-  // Try to allocate any available register, but prefer
-  // registers that have not been used recently.
-  if(i>0) {
-    for(hr=0;hr<HOST_REGS;hr++) {
-      if(hr!=EXCLUDE_REG&&cur->regmap[hr]==-1) {
-        if(regs[i-1].regmap[hr]!=rs1[i-1]&&regs[i-1].regmap[hr]!=rs2[i-1]&&regs[i-1].regmap[hr]!=rt1[i-1]&&regs[i-1].regmap[hr]!=rt2[i-1]) {
-          cur->regmap[hr]=reg|64;
-          cur->dirty&=~(1<<hr);
-          cur->isconst&=~(1<<hr);
-          return;
-        }
-      }
-    }
-  }
-  // Try to allocate any available register
-  for(hr=0;hr<HOST_REGS;hr++) {
-    if(hr!=EXCLUDE_REG&&cur->regmap[hr]==-1) {
-      cur->regmap[hr]=reg|64;
-      cur->dirty&=~(1<<hr);
-      cur->isconst&=~(1<<hr);
-      return;
-    }
-  }
-
-  // Ok, now we have to evict someone
-  // Pick a register we hopefully won't need soon
-  u_char hsn[MAXREG+1];
-  memset(hsn,10,sizeof(hsn));
-  int j;
-  lsn(hsn,i,&preferred_reg);
-  //printf("eax=%d ecx=%d edx=%d ebx=%d ebp=%d esi=%d edi=%d\n",cur->regmap[0],cur->regmap[1],cur->regmap[2],cur->regmap[3],cur->regmap[5],cur->regmap[6],cur->regmap[7]);
-  //printf("hsn(%x): %d %d %d %d %d %d %d\n",start+i*4,hsn[cur->regmap[0]&63],hsn[cur->regmap[1]&63],hsn[cur->regmap[2]&63],hsn[cur->regmap[3]&63],hsn[cur->regmap[5]&63],hsn[cur->regmap[6]&63],hsn[cur->regmap[7]&63]);
-  if(i>0) {
-    // Don't evict the cycle count at entry points, otherwise the entry
-    // stub will have to write it.
-    if(bt[i]&&hsn[CCREG]>2) hsn[CCREG]=2;
-    if(i>1&&hsn[CCREG]>2&&(itype[i-2]==RJUMP||itype[i-2]==UJUMP||itype[i-2]==CJUMP||itype[i-2]==SJUMP||itype[i-2]==FJUMP)) hsn[CCREG]=2;
-    for(j=10;j>=3;j--)
-    {
-      // Alloc preferred register if available
-      if(hsn[r=cur->regmap[preferred_reg]&63]==j) {
-        for(hr=0;hr<HOST_REGS;hr++) {
-          // Evict both parts of a 64-bit register
-          if((cur->regmap[hr]&63)==r) {
-            cur->regmap[hr]=-1;
-            cur->dirty&=~(1<<hr);
-            cur->isconst&=~(1<<hr);
-          }
-        }
-        cur->regmap[preferred_reg]=reg|64;
-        return;
-      }
-      for(r=1;r<=MAXREG;r++)
-      {
-        if(hsn[r]==j&&r!=rs1[i-1]&&r!=rs2[i-1]&&r!=rt1[i-1]&&r!=rt2[i-1]) {
-          for(hr=0;hr<HOST_REGS;hr++) {
-            if(hr!=HOST_CCREG||j<hsn[CCREG]) {
-              if(cur->regmap[hr]==r+64) {
-                cur->regmap[hr]=reg|64;
-                cur->dirty&=~(1<<hr);
-                cur->isconst&=~(1<<hr);
-                return;
-              }
-            }
-          }
-          for(hr=0;hr<HOST_REGS;hr++) {
-            if(hr!=HOST_CCREG||j<hsn[CCREG]) {
-              if(cur->regmap[hr]==r) {
-                cur->regmap[hr]=reg|64;
-                cur->dirty&=~(1<<hr);
-                cur->isconst&=~(1<<hr);
-                return;
-              }
-            }
-          }
-        }
-      }
-    }
-  }
-  for(j=10;j>=0;j--)
-  {
-    for(r=1;r<=MAXREG;r++)
-    {
-      if(hsn[r]==j) {
-        for(hr=0;hr<HOST_REGS;hr++) {
-          if(cur->regmap[hr]==r+64) {
-            cur->regmap[hr]=reg|64;
-            cur->dirty&=~(1<<hr);
-            cur->isconst&=~(1<<hr);
-            return;
-          }
-        }
-        for(hr=0;hr<HOST_REGS;hr++) {
-          if(cur->regmap[hr]==r) {
-            cur->regmap[hr]=reg|64;
-            cur->dirty&=~(1<<hr);
-            cur->isconst&=~(1<<hr);
-            return;
-          }
-        }
-      }
-    }
-  }
-  SysPrintf("This shouldn't happen");exit(1);
-}
-
-// Allocate a temporary register.  This is done without regard to
-// dirty status or whether the register we request is on the unneeded list
-// Note: This will only allocate one register, even if called multiple times
-static void alloc_reg_temp(struct regstat *cur,int i,signed char reg)
-{
-  int r,hr;
-  int preferred_reg = -1;
-
-  // see if it's already allocated
-  for(hr=0;hr<HOST_REGS;hr++)
-  {
-    if(hr!=EXCLUDE_REG&&cur->regmap[hr]==reg) return;
-  }
-
-  // Try to allocate any available register
-  for(hr=HOST_REGS-1;hr>=0;hr--) {
-    if(hr!=EXCLUDE_REG&&cur->regmap[hr]==-1) {
-      cur->regmap[hr]=reg;
-      cur->dirty&=~(1<<hr);
-      cur->isconst&=~(1<<hr);
-      return;
-    }
-  }
-
-  // Find an unneeded register
-  for(hr=HOST_REGS-1;hr>=0;hr--)
-  {
-    r=cur->regmap[hr];
-    if(r>=0) {
-      if(r<64) {
-        if((cur->u>>r)&1) {
-          if(i==0||((unneeded_reg[i-1]>>r)&1)) {
-            cur->regmap[hr]=reg;
-            cur->dirty&=~(1<<hr);
-            cur->isconst&=~(1<<hr);
-            return;
-          }
-        }
-      }
-      else
-      {
-        if((cur->uu>>(r&63))&1) {
-          if(i==0||((unneeded_reg_upper[i-1]>>(r&63))&1)) {
-            cur->regmap[hr]=reg;
-            cur->dirty&=~(1<<hr);
-            cur->isconst&=~(1<<hr);
-            return;
-          }
-        }
-      }
-    }
-  }
-
-  // Ok, now we have to evict someone
-  // Pick a register we hopefully won't need soon
-  // TODO: we might want to follow unconditional jumps here
-  // TODO: get rid of dupe code and make this into a function
-  u_char hsn[MAXREG+1];
-  memset(hsn,10,sizeof(hsn));
-  int j;
-  lsn(hsn,i,&preferred_reg);
-  //printf("hsn: %d %d %d %d %d %d %d\n",hsn[cur->regmap[0]&63],hsn[cur->regmap[1]&63],hsn[cur->regmap[2]&63],hsn[cur->regmap[3]&63],hsn[cur->regmap[5]&63],hsn[cur->regmap[6]&63],hsn[cur->regmap[7]&63]);
-  if(i>0) {
-    // Don't evict the cycle count at entry points, otherwise the entry
-    // stub will have to write it.
-    if(bt[i]&&hsn[CCREG]>2) hsn[CCREG]=2;
-    if(i>1&&hsn[CCREG]>2&&(itype[i-2]==RJUMP||itype[i-2]==UJUMP||itype[i-2]==CJUMP||itype[i-2]==SJUMP||itype[i-2]==FJUMP)) hsn[CCREG]=2;
-    for(j=10;j>=3;j--)
-    {
-      for(r=1;r<=MAXREG;r++)
-      {
-        if(hsn[r]==j&&r!=rs1[i-1]&&r!=rs2[i-1]&&r!=rt1[i-1]&&r!=rt2[i-1]) {
-          for(hr=0;hr<HOST_REGS;hr++) {
-            if(hr!=HOST_CCREG||hsn[CCREG]>2) {
-              if(cur->regmap[hr]==r+64) {
-                cur->regmap[hr]=reg;
-                cur->dirty&=~(1<<hr);
-                cur->isconst&=~(1<<hr);
-                return;
-              }
-            }
-          }
-          for(hr=0;hr<HOST_REGS;hr++) {
-            if(hr!=HOST_CCREG||hsn[CCREG]>2) {
-              if(cur->regmap[hr]==r) {
-                cur->regmap[hr]=reg;
-                cur->dirty&=~(1<<hr);
-                cur->isconst&=~(1<<hr);
-                return;
-              }
-            }
-          }
-        }
-      }
-    }
-  }
-  for(j=10;j>=0;j--)
-  {
-    for(r=1;r<=MAXREG;r++)
-    {
-      if(hsn[r]==j) {
-        for(hr=0;hr<HOST_REGS;hr++) {
-          if(cur->regmap[hr]==r+64) {
-            cur->regmap[hr]=reg;
-            cur->dirty&=~(1<<hr);
-            cur->isconst&=~(1<<hr);
-            return;
-          }
-        }
-        for(hr=0;hr<HOST_REGS;hr++) {
-          if(cur->regmap[hr]==r) {
-            cur->regmap[hr]=reg;
-            cur->dirty&=~(1<<hr);
-            cur->isconst&=~(1<<hr);
-            return;
-          }
-        }
-      }
-    }
-  }
-  SysPrintf("This shouldn't happen");exit(1);
+  *start=(u_char *)source;
+  *end=(u_char *)source+len;
 }
 
 // Allocate a specific ARM register.
@@ -814,9 +355,6 @@ static void alloc_cc(struct regstat *cur,int i)
   alloc_arm_reg(cur,i,CCREG,HOST_CCREG);
 }
 
-/* Special alloc */
-
-
 /* Assembler */
 
 static unused char regname[16][4] = {
@@ -926,42 +464,18 @@ static void emit_adcs(int rs1,int rs2,int rt)
   output_w32(0xe0b00000|rd_rn_rm(rt,rs1,rs2));
 }
 
-static void emit_sbc(int rs1,int rs2,int rt)
-{
-  assem_debug("sbc %s,%s,%s\n",regname[rt],regname[rs1],regname[rs2]);
-  output_w32(0xe0c00000|rd_rn_rm(rt,rs1,rs2));
-}
-
-static void emit_sbcs(int rs1,int rs2,int rt)
-{
-  assem_debug("sbcs %s,%s,%s\n",regname[rt],regname[rs1],regname[rs2]);
-  output_w32(0xe0d00000|rd_rn_rm(rt,rs1,rs2));
-}
-
 static void emit_neg(int rs, int rt)
 {
   assem_debug("rsb %s,%s,#0\n",regname[rt],regname[rs]);
   output_w32(0xe2600000|rd_rn_rm(rt,rs,0));
 }
 
-static void emit_negs(int rs, int rt)
-{
-  assem_debug("rsbs %s,%s,#0\n",regname[rt],regname[rs]);
-  output_w32(0xe2700000|rd_rn_rm(rt,rs,0));
-}
-
 static void emit_sub(int rs1,int rs2,int rt)
 {
   assem_debug("sub %s,%s,%s\n",regname[rt],regname[rs1],regname[rs2]);
   output_w32(0xe0400000|rd_rn_rm(rt,rs1,rs2));
 }
 
-static void emit_subs(int rs1,int rs2,int rt)
-{
-  assem_debug("subs %s,%s,%s\n",regname[rt],regname[rs1],regname[rs2]);
-  output_w32(0xe0500000|rd_rn_rm(rt,rs1,rs2));
-}
-
 static void emit_zeroreg(int rt)
 {
   assem_debug("mov %s,#0\n",regname[rt]);
@@ -1037,7 +551,6 @@ static void emit_loadreg(int r, int hr)
     if((r&63)==LOREG) addr=(int)&lo+((r&64)>>4);
     if(r==CCREG) addr=(int)&cycle_count;
     if(r==CSREG) addr=(int)&Status;
-    if(r==FSREG) addr=(int)&FCR31;
     if(r==INVCP) addr=(int)&invc_ptr;
     u_int offset = addr-(u_int)&dynarec_local;
     assert(offset<4096);
@@ -1057,7 +570,6 @@ static void emit_storereg(int r, int hr)
   if((r&63)==HIREG) addr=(int)&hi+((r&64)>>4);
   if((r&63)==LOREG) addr=(int)&lo+((r&64)>>4);
   if(r==CCREG) addr=(int)&cycle_count;
-  if(r==FSREG) addr=(int)&FCR31;
   u_int offset = addr-(u_int)&dynarec_local;
   assert(offset<4096);
   assem_debug("str %s,fp+%d\n",regname[hr],offset);
@@ -1110,12 +622,6 @@ static void emit_or(u_int rs1,u_int rs2,u_int rt)
   output_w32(0xe1800000|rd_rn_rm(rt,rs1,rs2));
 }
 
-static void emit_or_and_set_flags(int rs1,int rs2,int rt)
-{
-  assem_debug("orrs %s,%s,%s\n",regname[rt],regname[rs1],regname[rs2]);
-  output_w32(0xe1900000|rd_rn_rm(rt,rs1,rs2));
-}
-
 static void emit_orrshl_imm(u_int rs,u_int imm,u_int rt)
 {
   assert(rs<16);
@@ -1224,15 +730,6 @@ static void emit_adcimm(u_int rs,int imm,u_int rt)
   output_w32(0xe2a00000|rd_rn_rm(rt,rs,0)|armval);
 }
 
-static void emit_rscimm(int rs,int imm,u_int rt)
-{
-  assert(0);
-  u_int armval;
-  genimm_checked(imm,&armval);
-  assem_debug("rsc %s,%s,#%d\n",regname[rt],regname[rs],imm);
-  output_w32(0xe2e00000|rd_rn_rm(rt,rs,0)|armval);
-}
-
 static void emit_addimm64_32(int rsh,int rsl,int imm,int rth,int rtl)
 {
   // TODO: if(genimm(imm,&armval)) ...
@@ -1361,30 +858,6 @@ static void emit_rorimm(int rs,u_int imm,int rt)
   output_w32(0xe1a00000|rd_rn_rm(rt,0,rs)|0x60|(imm<<7));
 }
 
-static void emit_shldimm(int rs,int rs2,u_int imm,int rt)
-{
-  assem_debug("shld %%%s,%%%s,%d\n",regname[rt],regname[rs2],imm);
-  assert(imm>0);
-  assert(imm<32);
-  //if(imm==1) ...
-  assem_debug("lsl %s,%s,#%d\n",regname[rt],regname[rs],imm);
-  output_w32(0xe1a00000|rd_rn_rm(rt,0,rs)|(imm<<7));
-  assem_debug("orr %s,%s,%s,lsr #%d\n",regname[rt],regname[rt],regname[rs2],32-imm);
-  output_w32(0xe1800020|rd_rn_rm(rt,rt,rs2)|((32-imm)<<7));
-}
-
-static void emit_shrdimm(int rs,int rs2,u_int imm,int rt)
-{
-  assem_debug("shrd %%%s,%%%s,%d\n",regname[rt],regname[rs2],imm);
-  assert(imm>0);
-  assert(imm<32);
-  //if(imm==1) ...
-  assem_debug("lsr %s,%s,#%d\n",regname[rt],regname[rs],imm);
-  output_w32(0xe1a00020|rd_rn_rm(rt,0,rs)|(imm<<7));
-  assem_debug("orr %s,%s,%s,lsl #%d\n",regname[rt],regname[rt],regname[rs2],32-imm);
-  output_w32(0xe1800000|rd_rn_rm(rt,rt,rs2)|((32-imm)<<7));
-}
-
 static void emit_signextend16(int rs,int rt)
 {
   #ifndef HAVE_ARMV6
@@ -1499,20 +972,6 @@ static void emit_cmovb_imm(int imm,int rt)
   output_w32(0x33a00000|rd_rn_rm(rt,0,0)|armval);
 }
 
-static void emit_cmovs_imm(int imm,int rt)
-{
-  assem_debug("movmi %s,#%d\n",regname[rt],imm);
-  u_int armval;
-  genimm_checked(imm,&armval);
-  output_w32(0x43a00000|rd_rn_rm(rt,0,0)|armval);
-}
-
-static void emit_cmove_reg(int rs,int rt)
-{
-  assem_debug("moveq %s,%s\n",regname[rt],regname[rs]);
-  output_w32(0x01a00000|rd_rn_rm(rt,0,rs));
-}
-
 static void emit_cmovne_reg(int rs,int rt)
 {
   assem_debug("movne %s,%s\n",regname[rt],regname[rs]);
@@ -1547,40 +1006,6 @@ static void emit_sltiu32(int rs,int imm,int rt)
   emit_cmovb_imm(1,rt);
 }
 
-static void emit_slti64_32(int rsh,int rsl,int imm,int rt)
-{
-  assert(rsh!=rt);
-  emit_slti32(rsl,imm,rt);
-  if(imm>=0)
-  {
-    emit_test(rsh,rsh);
-    emit_cmovne_imm(0,rt);
-    emit_cmovs_imm(1,rt);
-  }
-  else
-  {
-    emit_cmpimm(rsh,-1);
-    emit_cmovne_imm(0,rt);
-    emit_cmovl_imm(1,rt);
-  }
-}
-
-static void emit_sltiu64_32(int rsh,int rsl,int imm,int rt)
-{
-  assert(rsh!=rt);
-  emit_sltiu32(rsl,imm,rt);
-  if(imm>=0)
-  {
-    emit_test(rsh,rsh);
-    emit_cmovne_imm(0,rt);
-  }
-  else
-  {
-    emit_cmpimm(rsh,-1);
-    emit_cmovne_imm(1,rt);
-  }
-}
-
 static void emit_cmp(int rs,int rt)
 {
   assem_debug("cmp %s,%s\n",regname[rs],regname[rt]);
@@ -1603,22 +1028,6 @@ static void emit_set_nz32(int rs, int rt)
   emit_cmovne_imm(1,rt);
 }
 
-static void emit_set_gz64_32(int rsh, int rsl, int rt)
-{
-  //assem_debug("set_gz64\n");
-  emit_set_gz32(rsl,rt);
-  emit_test(rsh,rsh);
-  emit_cmovne_imm(1,rt);
-  emit_cmovs_imm(0,rt);
-}
-
-static void emit_set_nz64_32(int rsh, int rsl, int rt)
-{
-  //assem_debug("set_nz64\n");
-  emit_or_and_set_flags(rsh,rsl,rt);
-  emit_cmovne_imm(1,rt);
-}
-
 static void emit_set_if_less32(int rs1, int rs2, int rt)
 {
   //assem_debug("set if less (%%%s,%%%s),%%%s\n",regname[rs1],regname[rs2],regname[rt]);
@@ -1637,69 +1046,6 @@ static void emit_set_if_carry32(int rs1, int rs2, int rt)
   emit_cmovb_imm(1,rt);
 }
 
-static void emit_set_if_less64_32(int u1, int l1, int u2, int l2, int rt)
-{
-  //assem_debug("set if less64 (%%%s,%%%s,%%%s,%%%s),%%%s\n",regname[u1],regname[l1],regname[u2],regname[l2],regname[rt]);
-  assert(u1!=rt);
-  assert(u2!=rt);
-  emit_cmp(l1,l2);
-  emit_movimm(0,rt);
-  emit_sbcs(u1,u2,HOST_TEMPREG);
-  emit_cmovl_imm(1,rt);
-}
-
-static void emit_set_if_carry64_32(int u1, int l1, int u2, int l2, int rt)
-{
-  //assem_debug("set if carry64 (%%%s,%%%s,%%%s,%%%s),%%%s\n",regname[u1],regname[l1],regname[u2],regname[l2],regname[rt]);
-  assert(u1!=rt);
-  assert(u2!=rt);
-  emit_cmp(l1,l2);
-  emit_movimm(0,rt);
-  emit_sbcs(u1,u2,HOST_TEMPREG);
-  emit_cmovb_imm(1,rt);
-}
-
-#ifdef DRC_DBG
-extern void gen_interupt();
-extern void do_insn_cmp();
-#define FUNCNAME(f) { (intptr_t)f, " " #f }
-static const struct {
-  intptr_t addr;
-  const char *name;
-} function_names[] = {
-  FUNCNAME(cc_interrupt),
-  FUNCNAME(gen_interupt),
-  FUNCNAME(get_addr_ht),
-  FUNCNAME(get_addr),
-  FUNCNAME(jump_handler_read8),
-  FUNCNAME(jump_handler_read16),
-  FUNCNAME(jump_handler_read32),
-  FUNCNAME(jump_handler_write8),
-  FUNCNAME(jump_handler_write16),
-  FUNCNAME(jump_handler_write32),
-  FUNCNAME(invalidate_addr),
-  FUNCNAME(verify_code_vm),
-  FUNCNAME(verify_code),
-  FUNCNAME(jump_hlecall),
-  FUNCNAME(jump_syscall_hle),
-  FUNCNAME(new_dyna_leave),
-  FUNCNAME(pcsx_mtc0),
-  FUNCNAME(pcsx_mtc0_ds),
-  FUNCNAME(do_insn_cmp),
-};
-
-static const char *func_name(intptr_t a)
-{
-  int i;
-  for (i = 0; i < sizeof(function_names)/sizeof(function_names[0]); i++)
-    if (function_names[i].addr == a)
-      return function_names[i].name;
-  return "";
-}
-#else
-#define func_name(x) ""
-#endif
-
 static void emit_call(const void *a_)
 {
   int a = (int)a_;
@@ -1794,6 +1140,11 @@ static void emit_jmpreg(u_int r)
   output_w32(0xe1a00000|rd_rn_rm(15,0,r));
 }
 
+static void emit_ret(void)
+{
+  emit_jmpreg(14);
+}
+
 static void emit_readword_indexed(int offset, int rs, int rt)
 {
   assert(offset>-4096&&offset<4096);
@@ -1841,28 +1192,6 @@ static void emit_ldrccsh_dualindexed(int rs1, int rs2, int rt)
   output_w32(0x319000f0|rd_rn_rm(rt,rs1,rs2));
 }
 
-static void emit_readword_indexed_tlb(int addr, int rs, int map, int rt)
-{
-  if(map<0) emit_readword_indexed(addr, rs, rt);
-  else {
-    assert(addr==0);
-    emit_readword_dualindexedx4(rs, map, rt);
-  }
-}
-
-static void emit_readdword_indexed_tlb(int addr, int rs, int map, int rh, int rl)
-{
-  if(map<0) {
-    if(rh>=0) emit_readword_indexed(addr, rs, rh);
-    emit_readword_indexed(addr+4, rs, rl);
-  }else{
-    assert(rh!=rs);
-    if(rh>=0) emit_readword_indexed_tlb(addr, rs, map, rh);
-    emit_addimm(map,1,map);
-    emit_readword_indexed_tlb(addr, rs, map, rl);
-  }
-}
-
 static void emit_movsbl_indexed(int offset, int rs, int rt)
 {
   assert(offset>-256&&offset<256);
@@ -1874,23 +1203,6 @@ static void emit_movsbl_indexed(int offset, int rs, int rt)
   }
 }
 
-static void emit_movsbl_indexed_tlb(int addr, int rs, int map, int rt)
-{
-  if(map<0) emit_movsbl_indexed(addr, rs, rt);
-  else {
-    if(addr==0) {
-      emit_shlimm(map,2,map);
-      assem_debug("ldrsb %s,%s+%s\n",regname[rt],regname[rs],regname[map]);
-      output_w32(0xe19000d0|rd_rn_rm(rt,rs,map));
-    }else{
-      assert(addr>-256&&addr<256);
-      assem_debug("add %s,%s,%s,lsl #2\n",regname[rt],regname[rs],regname[map]);
-      output_w32(0xe0800000|rd_rn_rm(rt,rs,map)|(2<<7));
-      emit_movsbl_indexed(addr, rt, rt);
-    }
-  }
-}
-
 static void emit_movswl_indexed(int offset, int rs, int rt)
 {
   assert(offset>-256&&offset<256);
@@ -1913,26 +1225,6 @@ static void emit_movzbl_indexed(int offset, int rs, int rt)
   }
 }
 
-static void emit_movzbl_dualindexedx4(int rs1, int rs2, int rt)
-{
-  assert(rs2>=0);
-  assem_debug("ldrb %s,%s,%s lsl #2\n",regname[rt],regname[rs1],regname[rs2]);
-  output_w32(0xe7d00000|rd_rn_rm(rt,rs1,rs2)|0x100);
-}
-
-static void emit_movzbl_indexed_tlb(int addr, int rs, int map, int rt)
-{
-  if(map<0) emit_movzbl_indexed(addr, rs, rt);
-  else {
-    if(addr==0) {
-      emit_movzbl_dualindexedx4(rs, map, rt);
-    }else{
-      emit_addimm(rs,addr,rt);
-      emit_movzbl_dualindexedx4(rt, map, rt);
-    }
-  }
-}
-
 static void emit_movzwl_indexed(int offset, int rs, int rt)
 {
   assert(offset>-256&&offset<256);
@@ -1963,38 +1255,6 @@ static void emit_readword(void *addr, int rt)
   output_w32(0xe5900000|rd_rn_rm(rt,FP,0)|offset);
 }
 
-static unused void emit_movsbl(int addr, int rt)
-{
-  u_int offset = addr-(u_int)&dynarec_local;
-  assert(offset<256);
-  assem_debug("ldrsb %s,fp+%d\n",regname[rt],offset);
-  output_w32(0xe1d000d0|rd_rn_rm(rt,FP,0)|((offset<<4)&0xf00)|(offset&0xf));
-}
-
-static unused void emit_movswl(int addr, int rt)
-{
-  u_int offset = addr-(u_int)&dynarec_local;
-  assert(offset<256);
-  assem_debug("ldrsh %s,fp+%d\n",regname[rt],offset);
-  output_w32(0xe1d000f0|rd_rn_rm(rt,FP,0)|((offset<<4)&0xf00)|(offset&0xf));
-}
-
-static unused void emit_movzbl(int addr, int rt)
-{
-  u_int offset = addr-(u_int)&dynarec_local;
-  assert(offset<4096);
-  assem_debug("ldrb %s,fp+%d\n",regname[rt],offset);
-  output_w32(0xe5d00000|rd_rn_rm(rt,FP,0)|offset);
-}
-
-static unused void emit_movzwl(int addr, int rt)
-{
-  u_int offset = addr-(u_int)&dynarec_local;
-  assert(offset<256);
-  assem_debug("ldrh %s,fp+%d\n",regname[rt],offset);
-  output_w32(0xe1d000b0|rd_rn_rm(rt,FP,0)|((offset<<4)&0xf00)|(offset&0xf));
-}
-
 static void emit_writeword_indexed(int rt, int offset, int rs)
 {
   assert(offset>-4096&&offset<4096);
@@ -2006,38 +1266,6 @@ static void emit_writeword_indexed(int rt, int offset, int rs)
   }
 }
 
-static void emit_writeword_dualindexedx4(int rt, int rs1, int rs2)
-{
-  assem_debug("str %s,%s,%s lsl #2\n",regname[rt],regname[rs1],regname[rs2]);
-  output_w32(0xe7800000|rd_rn_rm(rt,rs1,rs2)|0x100);
-}
-
-static void emit_writeword_indexed_tlb(int rt, int addr, int rs, int map, int temp)
-{
-  if(map<0) emit_writeword_indexed(rt, addr, rs);
-  else {
-    assert(addr==0);
-    emit_writeword_dualindexedx4(rt, rs, map);
-  }
-}
-
-static void emit_writedword_indexed_tlb(int rh, int rl, int addr, int rs, int map, int temp)
-{
-  if(map<0) {
-    if(rh>=0) emit_writeword_indexed(rh, addr, rs);
-    emit_writeword_indexed(rl, addr+4, rs);
-  }else{
-    assert(rh>=0);
-    if(temp!=rs) emit_addimm(map,1,temp);
-    emit_writeword_indexed_tlb(rh, addr, rs, map, temp);
-    if(temp!=rs) emit_writeword_indexed_tlb(rl, addr, rs, temp, temp);
-    else {
-      emit_addimm(rs,4,rs);
-      emit_writeword_indexed_tlb(rl, addr, rs, map, temp);
-    }
-  }
-}
-
 static void emit_writehword_indexed(int rt, int offset, int rs)
 {
   assert(offset>-256&&offset<256);
@@ -2060,26 +1288,6 @@ static void emit_writebyte_indexed(int rt, int offset, int rs)
   }
 }
 
-static void emit_writebyte_dualindexedx4(int rt, int rs1, int rs2)
-{
-  assert(rs2>=0);
-  assem_debug("strb %s,%s,%s lsl #2\n",regname[rt],regname[rs1],regname[rs2]);
-  output_w32(0xe7c00000|rd_rn_rm(rt,rs1,rs2)|0x100);
-}
-
-static void emit_writebyte_indexed_tlb(int rt, int addr, int rs, int map, int temp)
-{
-  if(map<0) emit_writebyte_indexed(rt, addr, rs);
-  else {
-    if(addr==0) {
-      emit_writebyte_dualindexedx4(rt, rs, map);
-    }else{
-      emit_addimm(rs,addr,temp);
-      emit_writebyte_dualindexedx4(rt, temp, map);
-    }
-  }
-}
-
 static void emit_strcc_dualindexed(int rs1, int rs2, int rt)
 {
   assem_debug("strcc %s,%s,%s\n",regname[rt],regname[rs1],regname[rs2]);
@@ -2106,22 +1314,6 @@ static void emit_writeword(int rt, void *addr)
   output_w32(0xe5800000|rd_rn_rm(rt,FP,0)|offset);
 }
 
-static unused void emit_writehword(int rt, void *addr)
-{
-  uintptr_t offset = (u_char *)addr - (u_char *)&dynarec_local;
-  assert(offset<256);
-  assem_debug("strh %s,fp+%d\n",regname[rt],offset);
-  output_w32(0xe1c000b0|rd_rn_rm(rt,FP,0)|((offset<<4)&0xf00)|(offset&0xf));
-}
-
-static unused void emit_writebyte(int rt, void *addr)
-{
-  uintptr_t offset = (u_char *)addr - (u_char *)&dynarec_local;
-  assert(offset<4096);
-  assem_debug("strb %s,fp+%d\n",regname[rt],offset);
-  output_w32(0xe5c00000|rd_rn_rm(rt,FP,0)|offset);
-}
-
 static void emit_umull(u_int rs1, u_int rs2, u_int hi, u_int lo)
 {
   assem_debug("umull %s, %s, %s, %s\n",regname[lo],regname[hi],regname[rs1],regname[rs2]);
@@ -2182,54 +1374,18 @@ static void emit_negsmi(int rs, int rt)
   output_w32(0x42700000|rd_rn_rm(rt,rs,0));
 }
 
-static void emit_orreq(u_int rs1,u_int rs2,u_int rt)
-{
-  assem_debug("orreq %s,%s,%s\n",regname[rt],regname[rs1],regname[rs2]);
-  output_w32(0x01800000|rd_rn_rm(rt,rs1,rs2));
-}
-
-static void emit_orrne(u_int rs1,u_int rs2,u_int rt)
-{
-  assem_debug("orrne %s,%s,%s\n",regname[rt],regname[rs1],regname[rs2]);
-  output_w32(0x11800000|rd_rn_rm(rt,rs1,rs2));
-}
-
 static void emit_bic_lsl(u_int rs1,u_int rs2,u_int shift,u_int rt)
 {
   assem_debug("bic %s,%s,%s lsl %s\n",regname[rt],regname[rs1],regname[rs2],regname[shift]);
   output_w32(0xe1C00000|rd_rn_rm(rt,rs1,rs2)|0x10|(shift<<8));
 }
 
-static void emit_biceq_lsl(u_int rs1,u_int rs2,u_int shift,u_int rt)
-{
-  assem_debug("biceq %s,%s,%s lsl %s\n",regname[rt],regname[rs1],regname[rs2],regname[shift]);
-  output_w32(0x01C00000|rd_rn_rm(rt,rs1,rs2)|0x10|(shift<<8));
-}
-
-static void emit_bicne_lsl(u_int rs1,u_int rs2,u_int shift,u_int rt)
-{
-  assem_debug("bicne %s,%s,%s lsl %s\n",regname[rt],regname[rs1],regname[rs2],regname[shift]);
-  output_w32(0x11C00000|rd_rn_rm(rt,rs1,rs2)|0x10|(shift<<8));
-}
-
 static void emit_bic_lsr(u_int rs1,u_int rs2,u_int shift,u_int rt)
 {
   assem_debug("bic %s,%s,%s lsr %s\n",regname[rt],regname[rs1],regname[rs2],regname[shift]);
   output_w32(0xe1C00000|rd_rn_rm(rt,rs1,rs2)|0x30|(shift<<8));
 }
 
-static void emit_biceq_lsr(u_int rs1,u_int rs2,u_int shift,u_int rt)
-{
-  assem_debug("biceq %s,%s,%s lsr %s\n",regname[rt],regname[rs1],regname[rs2],regname[shift]);
-  output_w32(0x01C00000|rd_rn_rm(rt,rs1,rs2)|0x30|(shift<<8));
-}
-
-static void emit_bicne_lsr(u_int rs1,u_int rs2,u_int shift,u_int rt)
-{
-  assem_debug("bicne %s,%s,%s lsr %s\n",regname[rt],regname[rs1],regname[rs2],regname[shift]);
-  output_w32(0x11C00000|rd_rn_rm(rt,rs1,rs2)|0x30|(shift<<8));
-}
-
 static void emit_teq(int rs, int rt)
 {
   assem_debug("teq %s,%s\n",regname[rs],regname[rt]);
@@ -2326,46 +1482,6 @@ static void emit_ldreq_indexed(int rs, u_int offset, int rt)
   output_w32(0x05900000|rd_rn_rm(rt,rs,0)|offset);
 }
 
-static unused void emit_bicne_imm(int rs,int imm,int rt)
-{
-  u_int armval;
-  genimm_checked(imm,&armval);
-  assem_debug("bicne %s,%s,#%d\n",regname[rt],regname[rs],imm);
-  output_w32(0x13c00000|rd_rn_rm(rt,rs,0)|armval);
-}
-
-static unused void emit_biccs_imm(int rs,int imm,int rt)
-{
-  u_int armval;
-  genimm_checked(imm,&armval);
-  assem_debug("biccs %s,%s,#%d\n",regname[rt],regname[rs],imm);
-  output_w32(0x23c00000|rd_rn_rm(rt,rs,0)|armval);
-}
-
-static unused void emit_bicvc_imm(int rs,int imm,int rt)
-{
-  u_int armval;
-  genimm_checked(imm,&armval);
-  assem_debug("bicvc %s,%s,#%d\n",regname[rt],regname[rs],imm);
-  output_w32(0x73c00000|rd_rn_rm(rt,rs,0)|armval);
-}
-
-static unused void emit_bichi_imm(int rs,int imm,int rt)
-{
-  u_int armval;
-  genimm_checked(imm,&armval);
-  assem_debug("bichi %s,%s,#%d\n",regname[rt],regname[rs],imm);
-  output_w32(0x83c00000|rd_rn_rm(rt,rs,0)|armval);
-}
-
-static unused void emit_orrvs_imm(int rs,int imm,int rt)
-{
-  u_int armval;
-  genimm_checked(imm,&armval);
-  assem_debug("orrvs %s,%s,#%d\n",regname[rt],regname[rs],imm);
-  output_w32(0x63800000|rd_rn_rm(rt,rs,0)|armval);
-}
-
 static void emit_orrne_imm(int rs,int imm,int rt)
 {
   u_int armval;
@@ -3041,27 +2157,6 @@ static void do_dirty_stub_ds()
   emit_call(&verify_code_ds);
 }
 
-static void do_cop1stub(int n)
-{
-  literal_pool(256);
-  assem_debug("do_cop1stub %x\n",start+stubs[n].a*4);
-  set_jump_target(stubs[n].addr, out);
-  int i=stubs[n].a;
-//  int rs=stubs[n].b;
-  struct regstat *i_regs=(struct regstat *)stubs[n].c;
-  int ds=stubs[n].d;
-  if(!ds) {
-    load_all_consts(regs[i].regmap_entry,regs[i].was32,regs[i].wasdirty,i);
-    //if(i_regs!=&regs[i]) printf("oops: regs[i]=%x i_regs=%x",(int)&regs[i],(int)i_regs);
-  }
-  //else {printf("fp exception in delay slot\n");}
-  wb_dirtys(i_regs->regmap_entry,i_regs->was32,i_regs->wasdirty);
-  if(regs[i].regmap_entry[HOST_CCREG]!=CCREG) emit_loadreg(CCREG,HOST_CCREG);
-  emit_movimm(start+(i-ds)*4,EAX); // Get PC
-  emit_addimm(HOST_CCREG,CLOCK_ADJUST(ccadj[i]),HOST_CCREG); // CHECK: is this right?  There should probably be an extra cycle...
-  emit_jmp(ds?fp_exception_ds:fp_exception);
-}
-
 /* Special assem */
 
 static void shift_assemble_arm(int i,struct regstat *i_regs)
@@ -3173,199 +2268,16 @@ static void shift_assemble_arm(int i,struct regstat *i_regs)
     }
   }
 }
-
-static void speculate_mov(int rs,int rt)
-{
-  if(rt!=0) {
-    smrv_strong_next|=1<<rt;
-    smrv[rt]=smrv[rs];
-  }
-}
-
-static void speculate_mov_weak(int rs,int rt)
-{
-  if(rt!=0) {
-    smrv_weak_next|=1<<rt;
-    smrv[rt]=smrv[rs];
-  }
-}
-
-static void speculate_register_values(int i)
-{
-  if(i==0) {
-    memcpy(smrv,psxRegs.GPR.r,sizeof(smrv));
-    // gp,sp are likely to stay the same throughout the block
-    smrv_strong_next=(1<<28)|(1<<29)|(1<<30);
-    smrv_weak_next=~smrv_strong_next;
-    //printf(" llr %08x\n", smrv[4]);
-  }
-  smrv_strong=smrv_strong_next;
-  smrv_weak=smrv_weak_next;
-  switch(itype[i]) {
-    case ALU:
-      if     ((smrv_strong>>rs1[i])&1) speculate_mov(rs1[i],rt1[i]);
-      else if((smrv_strong>>rs2[i])&1) speculate_mov(rs2[i],rt1[i]);
-      else if((smrv_weak>>rs1[i])&1) speculate_mov_weak(rs1[i],rt1[i]);
-      else if((smrv_weak>>rs2[i])&1) speculate_mov_weak(rs2[i],rt1[i]);
-      else {
-        smrv_strong_next&=~(1<<rt1[i]);
-        smrv_weak_next&=~(1<<rt1[i]);
-      }
-      break;
-    case SHIFTIMM:
-      smrv_strong_next&=~(1<<rt1[i]);
-      smrv_weak_next&=~(1<<rt1[i]);
-      // fallthrough
-    case IMM16:
-      if(rt1[i]&&is_const(&regs[i],rt1[i])) {
-        int value,hr=get_reg(regs[i].regmap,rt1[i]);
-        if(hr>=0) {
-          if(get_final_value(hr,i,&value))
-               smrv[rt1[i]]=value;
-          else smrv[rt1[i]]=constmap[i][hr];
-          smrv_strong_next|=1<<rt1[i];
-        }
-      }
-      else {
-        if     ((smrv_strong>>rs1[i])&1) speculate_mov(rs1[i],rt1[i]);
-        else if((smrv_weak>>rs1[i])&1) speculate_mov_weak(rs1[i],rt1[i]);
-      }
-      break;
-    case LOAD:
-      if(start<0x2000&&(rt1[i]==26||(smrv[rt1[i]]>>24)==0xa0)) {
-        // special case for BIOS
-        smrv[rt1[i]]=0xa0000000;
-        smrv_strong_next|=1<<rt1[i];
-        break;
-      }
-      // fallthrough
-    case SHIFT:
-    case LOADLR:
-    case MOV:
-      smrv_strong_next&=~(1<<rt1[i]);
-      smrv_weak_next&=~(1<<rt1[i]);
-      break;
-    case COP0:
-    case COP2:
-      if(opcode2[i]==0||opcode2[i]==2) { // MFC/CFC
-        smrv_strong_next&=~(1<<rt1[i]);
-        smrv_weak_next&=~(1<<rt1[i]);
-      }
-      break;
-    case C2LS:
-      if (opcode[i]==0x32) { // LWC2
-        smrv_strong_next&=~(1<<rt1[i]);
-        smrv_weak_next&=~(1<<rt1[i]);
-      }
-      break;
-  }
-#if 0
-  int r=4;
-  printf("x %08x %08x %d %d c %08x %08x\n",smrv[r],start+i*4,
-    ((smrv_strong>>r)&1),(smrv_weak>>r)&1,regs[i].isconst,regs[i].wasconst);
-#endif
-}
-
-enum {
-  MTYPE_8000 = 0,
-  MTYPE_8020,
-  MTYPE_0000,
-  MTYPE_A000,
-  MTYPE_1F80,
-};
-
-static int get_ptr_mem_type(u_int a)
-{
-  if(a < 0x00200000) {
-    if(a<0x1000&&((start>>20)==0xbfc||(start>>24)==0xa0))
-      // return wrong, must use memhandler for BIOS self-test to pass
-      // 007 does similar stuff from a00 mirror, weird stuff
-      return MTYPE_8000;
-    return MTYPE_0000;
-  }
-  if(0x1f800000 <= a && a < 0x1f801000)
-    return MTYPE_1F80;
-  if(0x80200000 <= a && a < 0x80800000)
-    return MTYPE_8020;
-  if(0xa0000000 <= a && a < 0xa0200000)
-    return MTYPE_A000;
-  return MTYPE_8000;
-}
-
-static void *emit_fastpath_cmp_jump(int i,int addr,int *addr_reg_override)
-{
-  void *jaddr = NULL;
-  int type=0;
-  int mr=rs1[i];
-  if(((smrv_strong|smrv_weak)>>mr)&1) {
-    type=get_ptr_mem_type(smrv[mr]);
-    //printf("set %08x @%08x r%d %d\n", smrv[mr], start+i*4, mr, type);
-  }
-  else {
-    // use the mirror we are running on
-    type=get_ptr_mem_type(start);
-    //printf("set nospec   @%08x r%d %d\n", start+i*4, mr, type);
-  }
-
-  if(type==MTYPE_8020) { // RAM 80200000+ mirror
-    emit_andimm(addr,~0x00e00000,HOST_TEMPREG);
-    addr=*addr_reg_override=HOST_TEMPREG;
-    type=0;
-  }
-  else if(type==MTYPE_0000) { // RAM 0 mirror
-    emit_orimm(addr,0x80000000,HOST_TEMPREG);
-    addr=*addr_reg_override=HOST_TEMPREG;
-    type=0;
-  }
-  else if(type==MTYPE_A000) { // RAM A mirror
-    emit_andimm(addr,~0x20000000,HOST_TEMPREG);
-    addr=*addr_reg_override=HOST_TEMPREG;
-    type=0;
-  }
-  else if(type==MTYPE_1F80) { // scratchpad
-    if (psxH == (void *)0x1f800000) {
-      emit_addimm(addr,-0x1f800000,HOST_TEMPREG);
-      emit_cmpimm(HOST_TEMPREG,0x1000);
-      jaddr=out;
-      emit_jc(0);
-    }
-    else {
-      // do usual RAM check, jump will go to the right handler
-      type=0;
-    }
-  }
-
-  if(type==0)
-  {
-    emit_cmpimm(addr,RAM_SIZE);
-    jaddr=out;
-    #ifdef CORTEX_A8_BRANCH_PREDICTION_HACK
-    // Hint to branch predictor that the branch is unlikely to be taken
-    if(rs1[i]>=28)
-      emit_jno_unlikely(0);
-    else
-    #endif
-      emit_jno(0);
-    if(ram_offset!=0) {
-      emit_addimm(addr,ram_offset,HOST_TEMPREG);
-      addr=*addr_reg_override=HOST_TEMPREG;
-    }
-  }
-
-  return jaddr;
-}
-
 #define shift_assemble shift_assemble_arm
 
 static void loadlr_assemble_arm(int i,struct regstat *i_regs)
 {
-  int s,th,tl,temp,temp2,addr,map=-1;
+  int s,tl,temp,temp2,addr;
   int offset;
   void *jaddr=0;
   int memtarget=0,c=0;
   int fastload_reg_override=0;
   u_int hr,reglist=0;
-  th=get_reg(i_regs->regmap,rt1[i]|64);
   tl=get_reg(i_regs->regmap,rt1[i]);
   s=get_reg(i_regs->regmap,rs1[i]);
   temp=get_reg(i_regs->regmap,-1);
@@ -3386,10 +2298,6 @@ static void loadlr_assemble_arm(int i,struct regstat *i_regs)
     }
   }
   if(!c) {
-    #ifdef RAM_OFFSET
-    map=get_reg(i_regs->regmap,ROREG);
-    if(map<0) emit_loadreg(ROREG,map=HOST_TEMPREG);
-    #endif
     emit_shlimm(addr,3,temp);
     if (opcode[i]==0x22||opcode[i]==0x26) {
       emit_andimm(addr,0xFFFFFFFC,temp2); // LWL/LWR
@@ -3413,8 +2321,7 @@ static void loadlr_assemble_arm(int i,struct regstat *i_regs)
     if(!c||memtarget) {
       int a=temp2;
       if(fastload_reg_override) a=fastload_reg_override;
-      //emit_readword_indexed((int)rdram-0x80000000,temp2,temp2);
-      emit_readword_indexed_tlb(0,a,map,temp2);
+      emit_readword_indexed(0,a,temp2);
       if(jaddr) add_stub_r(LOADW_STUB,jaddr,out,i,temp2,i_regs,ccadj[i],reglist);
     }
     else
@@ -3441,289 +2348,11 @@ static void loadlr_assemble_arm(int i,struct regstat *i_regs)
     //emit_storereg(rt1[i],tl); // DEBUG
   }
   if (opcode[i]==0x1A||opcode[i]==0x1B) { // LDL/LDR
-    // FIXME: little endian, fastload_reg_override
-    int temp2h=get_reg(i_regs->regmap,FTEMP|64);
-    if(!c||memtarget) {
-      //if(th>=0) emit_readword_indexed((int)rdram-0x80000000,temp2,temp2h);
-      //emit_readword_indexed((int)rdram-0x7FFFFFFC,temp2,temp2);
-      emit_readdword_indexed_tlb(0,temp2,map,temp2h,temp2);
-      if(jaddr) add_stub_r(LOADD_STUB,jaddr,out,i,temp2,i_regs,ccadj[i],reglist);
-    }
-    else
-      inline_readstub(LOADD_STUB,i,(constmap[i][s]+offset)&0xFFFFFFF8,i_regs->regmap,FTEMP,ccadj[i],reglist);
-    if(rt1[i]) {
-      assert(th>=0);
-      assert(tl>=0);
-      emit_testimm(temp,32);
-      emit_andimm(temp,24,temp);
-      if (opcode[i]==0x1A) { // LDL
-        emit_rsbimm(temp,32,HOST_TEMPREG);
-        emit_shl(temp2h,temp,temp2h);
-        emit_orrshr(temp2,HOST_TEMPREG,temp2h);
-        emit_movimm(-1,HOST_TEMPREG);
-        emit_shl(temp2,temp,temp2);
-        emit_cmove_reg(temp2h,th);
-        emit_biceq_lsl(tl,HOST_TEMPREG,temp,tl);
-        emit_bicne_lsl(th,HOST_TEMPREG,temp,th);
-        emit_orreq(temp2,tl,tl);
-        emit_orrne(temp2,th,th);
-      }
-      if (opcode[i]==0x1B) { // LDR
-        emit_xorimm(temp,24,temp);
-        emit_rsbimm(temp,32,HOST_TEMPREG);
-        emit_shr(temp2,temp,temp2);
-        emit_orrshl(temp2h,HOST_TEMPREG,temp2);
-        emit_movimm(-1,HOST_TEMPREG);
-        emit_shr(temp2h,temp,temp2h);
-        emit_cmovne_reg(temp2,tl);
-        emit_bicne_lsr(th,HOST_TEMPREG,temp,th);
-        emit_biceq_lsr(tl,HOST_TEMPREG,temp,tl);
-        emit_orrne(temp2h,th,th);
-        emit_orreq(temp2h,tl,tl);
-      }
-    }
+    assert(0);
   }
 }
 #define loadlr_assemble loadlr_assemble_arm
 
-static void cop0_assemble(int i,struct regstat *i_regs)
-{
-  if(opcode2[i]==0) // MFC0
-  {
-    signed char t=get_reg(i_regs->regmap,rt1[i]);
-    u_int copr=(source[i]>>11)&0x1f;
-    //assert(t>=0); // Why does this happen?  OOT is weird
-    if(t>=0&&rt1[i]!=0) {
-      emit_readword(&reg_cop0[copr],t);
-    }
-  }
-  else if(opcode2[i]==4) // MTC0
-  {
-    signed char s=get_reg(i_regs->regmap,rs1[i]);
-    char copr=(source[i]>>11)&0x1f;
-    assert(s>=0);
-    wb_register(rs1[i],i_regs->regmap,i_regs->dirty,i_regs->is32);
-    if(copr==9||copr==11||copr==12||copr==13) {
-      emit_readword(&last_count,HOST_TEMPREG);
-      emit_loadreg(CCREG,HOST_CCREG); // TODO: do proper reg alloc
-      emit_add(HOST_CCREG,HOST_TEMPREG,HOST_CCREG);
-      emit_addimm(HOST_CCREG,CLOCK_ADJUST(ccadj[i]),HOST_CCREG);
-      emit_writeword(HOST_CCREG,&Count);
-    }
-    // What a mess.  The status register (12) can enable interrupts,
-    // so needs a special case to handle a pending interrupt.
-    // The interrupt must be taken immediately, because a subsequent
-    // instruction might disable interrupts again.
-    if(copr==12||copr==13) {
-      if (is_delayslot) {
-        // burn cycles to cause cc_interrupt, which will
-        // reschedule next_interupt. Relies on CCREG from above.
-        assem_debug("MTC0 DS %d\n", copr);
-        emit_writeword(HOST_CCREG,&last_count);
-        emit_movimm(0,HOST_CCREG);
-        emit_storereg(CCREG,HOST_CCREG);
-        emit_loadreg(rs1[i],1);
-        emit_movimm(copr,0);
-        emit_call(pcsx_mtc0_ds);
-        emit_loadreg(rs1[i],s);
-        return;
-      }
-      emit_movimm(start+i*4+4,HOST_TEMPREG);
-      emit_writeword(HOST_TEMPREG,&pcaddr);
-      emit_movimm(0,HOST_TEMPREG);
-      emit_writeword(HOST_TEMPREG,&pending_exception);
-    }
-    //else if(copr==12&&is_delayslot) emit_call((int)MTC0_R12);
-    //else
-    if(s==HOST_CCREG)
-      emit_loadreg(rs1[i],1);
-    else if(s!=1)
-      emit_mov(s,1);
-    emit_movimm(copr,0);
-    emit_call(pcsx_mtc0);
-    if(copr==9||copr==11||copr==12||copr==13) {
-      emit_readword(&Count,HOST_CCREG);
-      emit_readword(&next_interupt,HOST_TEMPREG);
-      emit_addimm(HOST_CCREG,-CLOCK_ADJUST(ccadj[i]),HOST_CCREG);
-      emit_sub(HOST_CCREG,HOST_TEMPREG,HOST_CCREG);
-      emit_writeword(HOST_TEMPREG,&last_count);
-      emit_storereg(CCREG,HOST_CCREG);
-    }
-    if(copr==12||copr==13) {
-      assert(!is_delayslot);
-      emit_readword(&pending_exception,14);
-      emit_test(14,14);
-      emit_jne(&do_interrupt);
-    }
-    emit_loadreg(rs1[i],s);
-    if(get_reg(i_regs->regmap,rs1[i]|64)>=0)
-      emit_loadreg(rs1[i]|64,get_reg(i_regs->regmap,rs1[i]|64));
-    cop1_usable=0;
-  }
-  else
-  {
-    assert(opcode2[i]==0x10);
-    if((source[i]&0x3f)==0x10) // RFE
-    {
-      emit_readword(&Status,0);
-      emit_andimm(0,0x3c,1);
-      emit_andimm(0,~0xf,0);
-      emit_orrshr_imm(1,2,0);
-      emit_writeword(0,&Status);
-    }
-  }
-}
-
-static void cop2_get_dreg(u_int copr,signed char tl,signed char temp)
-{
-  switch (copr) {
-    case 1:
-    case 3:
-    case 5:
-    case 8:
-    case 9:
-    case 10:
-    case 11:
-      emit_readword(&reg_cop2d[copr],tl);
-      emit_signextend16(tl,tl);
-      emit_writeword(tl,&reg_cop2d[copr]); // hmh
-      break;
-    case 7:
-    case 16:
-    case 17:
-    case 18:
-    case 19:
-      emit_readword(&reg_cop2d[copr],tl);
-      emit_andimm(tl,0xffff,tl);
-      emit_writeword(tl,&reg_cop2d[copr]);
-      break;
-    case 15:
-      emit_readword(&reg_cop2d[14],tl); // SXY2
-      emit_writeword(tl,&reg_cop2d[copr]);
-      break;
-    case 28:
-    case 29:
-      emit_readword(&reg_cop2d[9],temp);
-      emit_testimm(temp,0x8000); // do we need this?
-      emit_andimm(temp,0xf80,temp);
-      emit_andne_imm(temp,0,temp);
-      emit_shrimm(temp,7,tl);
-      emit_readword(&reg_cop2d[10],temp);
-      emit_testimm(temp,0x8000);
-      emit_andimm(temp,0xf80,temp);
-      emit_andne_imm(temp,0,temp);
-      emit_orrshr_imm(temp,2,tl);
-      emit_readword(&reg_cop2d[11],temp);
-      emit_testimm(temp,0x8000);
-      emit_andimm(temp,0xf80,temp);
-      emit_andne_imm(temp,0,temp);
-      emit_orrshl_imm(temp,3,tl);
-      emit_writeword(tl,&reg_cop2d[copr]);
-      break;
-    default:
-      emit_readword(&reg_cop2d[copr],tl);
-      break;
-  }
-}
-
-static void cop2_put_dreg(u_int copr,signed char sl,signed char temp)
-{
-  switch (copr) {
-    case 15:
-      emit_readword(&reg_cop2d[13],temp);  // SXY1
-      emit_writeword(sl,&reg_cop2d[copr]);
-      emit_writeword(temp,&reg_cop2d[12]); // SXY0
-      emit_readword(&reg_cop2d[14],temp);  // SXY2
-      emit_writeword(sl,&reg_cop2d[14]);
-      emit_writeword(temp,&reg_cop2d[13]); // SXY1
-      break;
-    case 28:
-      emit_andimm(sl,0x001f,temp);
-      emit_shlimm(temp,7,temp);
-      emit_writeword(temp,&reg_cop2d[9]);
-      emit_andimm(sl,0x03e0,temp);
-      emit_shlimm(temp,2,temp);
-      emit_writeword(temp,&reg_cop2d[10]);
-      emit_andimm(sl,0x7c00,temp);
-      emit_shrimm(temp,3,temp);
-      emit_writeword(temp,&reg_cop2d[11]);
-      emit_writeword(sl,&reg_cop2d[28]);
-      break;
-    case 30:
-      emit_movs(sl,temp);
-      emit_mvnmi(temp,temp);
-#ifdef HAVE_ARMV5
-      emit_clz(temp,temp);
-#else
-      emit_movs(temp,HOST_TEMPREG);
-      emit_movimm(0,temp);
-      emit_jeq((int)out+4*4);
-      emit_addpl_imm(temp,1,temp);
-      emit_lslpls_imm(HOST_TEMPREG,1,HOST_TEMPREG);
-      emit_jns((int)out-2*4);
-#endif
-      emit_writeword(sl,&reg_cop2d[30]);
-      emit_writeword(temp,&reg_cop2d[31]);
-      break;
-    case 31:
-      break;
-    default:
-      emit_writeword(sl,&reg_cop2d[copr]);
-      break;
-  }
-}
-
-static void cop2_assemble(int i,struct regstat *i_regs)
-{
-  u_int copr=(source[i]>>11)&0x1f;
-  signed char temp=get_reg(i_regs->regmap,-1);
-  if (opcode2[i]==0) { // MFC2
-    signed char tl=get_reg(i_regs->regmap,rt1[i]);
-    if(tl>=0&&rt1[i]!=0)
-      cop2_get_dreg(copr,tl,temp);
-  }
-  else if (opcode2[i]==4) { // MTC2
-    signed char sl=get_reg(i_regs->regmap,rs1[i]);
-    cop2_put_dreg(copr,sl,temp);
-  }
-  else if (opcode2[i]==2) // CFC2
-  {
-    signed char tl=get_reg(i_regs->regmap,rt1[i]);
-    if(tl>=0&&rt1[i]!=0)
-      emit_readword(&reg_cop2c[copr],tl);
-  }
-  else if (opcode2[i]==6) // CTC2
-  {
-    signed char sl=get_reg(i_regs->regmap,rs1[i]);
-    switch(copr) {
-      case 4:
-      case 12:
-      case 20:
-      case 26:
-      case 27:
-      case 29:
-      case 30:
-        emit_signextend16(sl,temp);
-        break;
-      case 31:
-        //value = value & 0x7ffff000;
-        //if (value & 0x7f87e000) value |= 0x80000000;
-        emit_shrimm(sl,12,temp);
-        emit_shlimm(temp,12,temp);
-        emit_testimm(temp,0x7f000000);
-        emit_testeqimm(temp,0x00870000);
-        emit_testeqimm(temp,0x0000e000);
-        emit_orrne_imm(temp,0x80000000,temp);
-        break;
-      default:
-        temp=sl;
-        break;
-    }
-    emit_writeword(temp,&reg_cop2c[copr]);
-    assert(sl>=0);
-  }
-}
-
 static void c2op_prologue(u_int op,u_int reglist)
 {
   save_regs_all(reglist);
@@ -3881,38 +2510,6 @@ static void c2op_assemble(int i,struct regstat *i_regs)
   }
 }
 
-static void cop1_unusable(int i,struct regstat *i_regs)
-{
-  // XXX: should just just do the exception instead
-  if(!cop1_usable) {
-    void *jaddr=out;
-    emit_jmp(0);
-    add_stub_r(FP_STUB,jaddr,out,i,0,i_regs,is_delayslot,0);
-    cop1_usable=1;
-  }
-}
-
-static void cop1_assemble(int i,struct regstat *i_regs)
-{
-  cop1_unusable(i, i_regs);
-}
-
-static void fconv_assemble_arm(int i,struct regstat *i_regs)
-{
-  cop1_unusable(i, i_regs);
-}
-#define fconv_assemble fconv_assemble_arm
-
-static void fcomp_assemble(int i,struct regstat *i_regs)
-{
-  cop1_unusable(i, i_regs);
-}
-
-static void float_assemble(int i,struct regstat *i_regs)
-{
-  cop1_unusable(i, i_regs);
-}
-
 static void multdiv_assemble_arm(int i,struct regstat *i_regs)
 {
   //  case 0x18: MULT
@@ -4084,90 +2681,6 @@ static void do_miniht_insert(u_int return_address,int rt,int temp) {
   #endif
 }
 
-static void wb_valid(signed char pre[],signed char entry[],u_int dirty_pre,u_int dirty,uint64_t is32_pre,uint64_t u,uint64_t uu)
-{
-  //if(dirty_pre==dirty) return;
-  int hr,reg;
-  for(hr=0;hr<HOST_REGS;hr++) {
-    if(hr!=EXCLUDE_REG) {
-      reg=pre[hr];
-      if(((~u)>>(reg&63))&1) {
-        if(reg>0) {
-          if(((dirty_pre&~dirty)>>hr)&1) {
-            if(reg>0&&reg<34) {
-              emit_storereg(reg,hr);
-              if( ((is32_pre&~uu)>>reg)&1 ) {
-                emit_sarimm(hr,31,HOST_TEMPREG);
-                emit_storereg(reg|64,HOST_TEMPREG);
-              }
-            }
-            else if(reg>=64) {
-              emit_storereg(reg,hr);
-            }
-          }
-        }
-      }
-    }
-  }
-}
-
-
-/* using strd could possibly help but you'd have to allocate registers in pairs
-static void wb_invalidate_arm(signed char pre[],signed char entry[],uint64_t dirty,uint64_t is32,uint64_t u,uint64_t uu)
-{
-  int hr;
-  int wrote=-1;
-  for(hr=HOST_REGS-1;hr>=0;hr--) {
-    if(hr!=EXCLUDE_REG) {
-      if(pre[hr]!=entry[hr]) {
-        if(pre[hr]>=0) {
-          if((dirty>>hr)&1) {
-            if(get_reg(entry,pre[hr])<0) {
-              if(pre[hr]<64) {
-                if(!((u>>pre[hr])&1)) {
-                  if(hr<10&&(~hr&1)&&(pre[hr+1]<0||wrote==hr+1)) {
-                    if( ((is32>>pre[hr])&1) && !((uu>>pre[hr])&1) ) {
-                      emit_sarimm(hr,31,hr+1);
-                      emit_strdreg(pre[hr],hr);
-                    }
-                    else
-                      emit_storereg(pre[hr],hr);
-                  }else{
-                    emit_storereg(pre[hr],hr);
-                    if( ((is32>>pre[hr])&1) && !((uu>>pre[hr])&1) ) {
-                      emit_sarimm(hr,31,hr);
-                      emit_storereg(pre[hr]|64,hr);
-                    }
-                  }
-                }
-              }else{
-                if(!((uu>>(pre[hr]&63))&1) && !((is32>>(pre[hr]&63))&1)) {
-                  emit_storereg(pre[hr],hr);
-                }
-              }
-              wrote=hr;
-            }
-          }
-        }
-      }
-    }
-  }
-  for(hr=0;hr<HOST_REGS;hr++) {
-    if(hr!=EXCLUDE_REG) {
-      if(pre[hr]!=entry[hr]) {
-        if(pre[hr]>=0) {
-          int nr;
-          if((nr=get_reg(entry,pre[hr]))>=0) {
-            emit_mov(hr,nr);
-          }
-        }
-      }
-    }
-  }
-}
-#define wb_invalidate wb_invalidate_arm
-*/
-
 static void mark_clear_cache(void *target)
 {
   u_long offset = (u_char *)target - translation_cache;