X-Git-Url: https://notaz.gp2x.de/cgi-bin/gitweb.cgi?p=pcsx_rearmed.git;a=blobdiff_plain;f=libpcsxcore%2Fnew_dynarec%2Fassem_arm.c;h=d0b1bd7941ee5fd10a7644ffc90f0f321bac1d68;hp=592cc88fa101488aa2a3cb7c5d19a744e92d32eb;hb=be516ebe45e48044b599e9d9f9f2d296c3f3ee62;hpb=9f51b4b9aa4fffa7b9411ca274f5dfb179a6a30a

diff --git a/libpcsxcore/new_dynarec/assem_arm.c b/libpcsxcore/new_dynarec/assem_arm.c
index 592cc88f..d0b1bd79 100644
--- a/libpcsxcore/new_dynarec/assem_arm.c
+++ b/libpcsxcore/new_dynarec/assem_arm.c
@@ -28,8 +28,11 @@
 #include "pcnt.h"
 #include "arm_features.h"
 
-#if !BASE_ADDR_FIXED
-char translation_cache[1 << TARGET_SIZE_2] __attribute__((aligned(4096)));
+#if   defined(BASE_ADDR_FIXED)
+#elif defined(BASE_ADDR_DYNAMIC)
+u_char *translation_cache;
+#else
+u_char translation_cache[1 << TARGET_SIZE_2] __attribute__((aligned(4096)));
 #endif
 
 #ifndef __MACH__
@@ -38,13 +41,20 @@ char translation_cache[1 << TARGET_SIZE_2] __attribute__((aligned(4096)));
 #define CALLER_SAVE_REGS 0x120f
 #endif
 
+#define unused __attribute__((unused))
+
+#ifdef DRC_DBG
+#pragma GCC diagnostic ignored "-Wunused-function"
+#pragma GCC diagnostic ignored "-Wunused-variable"
+#pragma GCC diagnostic ignored "-Wunused-but-set-variable"
+#endif
+
 extern int cycle_count;
 extern int last_count;
 extern int pcaddr;
 extern int pending_exception;
 extern int branch_target;
 extern uint64_t readmem_dword;
-extern void *dynarec_local;
 extern u_int mini_ht[32][2];
 
 void indirect_jump_indexed();
@@ -63,23 +73,24 @@ void jump_vaddr_r9();
 void jump_vaddr_r10();
 void jump_vaddr_r12();
 
-const u_int jump_vaddr_reg[16] = {
-  (int)jump_vaddr_r0,
-  (int)jump_vaddr_r1,
-  (int)jump_vaddr_r2,
-  (int)jump_vaddr_r3,
-  (int)jump_vaddr_r4,
-  (int)jump_vaddr_r5,
-  (int)jump_vaddr_r6,
-  (int)jump_vaddr_r7,
-  (int)jump_vaddr_r8,
-  (int)jump_vaddr_r9,
-  (int)jump_vaddr_r10,
+void * const jump_vaddr_reg[16] = {
+  jump_vaddr_r0,
+  jump_vaddr_r1,
+  jump_vaddr_r2,
+  jump_vaddr_r3,
+  jump_vaddr_r4,
+  jump_vaddr_r5,
+  jump_vaddr_r6,
+  jump_vaddr_r7,
+  jump_vaddr_r8,
+  jump_vaddr_r9,
+  jump_vaddr_r10,
   0,
-  (int)jump_vaddr_r12,
+  jump_vaddr_r12,
   0,
   0,
-  0};
+  0
+};
 
 void invalidate_addr_r0();
 void invalidate_addr_r1();
@@ -112,30 +123,31 @@ const u_int invalidate_addr_reg[16] = {
   0,
   0};
 
-unsigned int needs_clear_cache[1<<(TARGET_SIZE_2-17)];
+static u_int needs_clear_cache[1<<(TARGET_SIZE_2-17)];
 
 /* Linker */
 
-void set_jump_target(int addr,u_int target)
+static void set_jump_target(void *addr, void *target_)
 {
-  u_char *ptr=(u_char *)addr;
+  u_int target = (u_int)target_;
+  u_char *ptr = addr;
   u_int *ptr2=(u_int *)ptr;
   if(ptr[3]==0xe2) {
     assert((target-(u_int)ptr2-8)<1024);
-    assert((addr&3)==0);
+    assert(((uintptr_t)addr&3)==0);
     assert((target&3)==0);
     *ptr2=(*ptr2&0xFFFFF000)|((target-(u_int)ptr2-8)>>2)|0xF00;
-    //printf("target=%x addr=%x insn=%x\n",target,addr,*ptr2);
+    //printf("target=%x addr=%p insn=%x\n",target,addr,*ptr2);
   }
   else if(ptr[3]==0x72) {
     // generated by emit_jno_unlikely
     if((target-(u_int)ptr2-8)<1024) {
-      assert((addr&3)==0);
+      assert(((uintptr_t)addr&3)==0);
       assert((target&3)==0);
       *ptr2=(*ptr2&0xFFFFF000)|((target-(u_int)ptr2-8)>>2)|0xF00;
     }
     else if((target-(u_int)ptr2-8)<4096&&!((target-(u_int)ptr2-8)&15)) {
-      assert((addr&3)==0);
+      assert(((uintptr_t)addr&3)==0);
       assert((target&3)==0);
       *ptr2=(*ptr2&0xFFFFF000)|((target-(u_int)ptr2-8)>>4)|0xE00;
     }
@@ -150,7 +162,8 @@ void set_jump_target(int addr,u_int target)
 // This optionally copies the instruction from the target of the branch into
 // the space before the branch.  Works, but the difference in speed is
 // usually insignificant.
-void set_jump_target_fillslot(int addr,u_int target,int copy)
+#if 0
+static void set_jump_target_fillslot(int addr,u_int target,int copy)
 {
   u_char *ptr=(u_char *)addr;
   u_int *ptr2=(u_int *)ptr;
@@ -179,9 +192,10 @@ void set_jump_target_fillslot(int addr,u_int target,int copy)
     *ptr2=(*ptr2&0xFF000000)|(((target-(u_int)ptr2-8)<<6)>>8);
   }
 }
+#endif
 
 /* Literal pool */
-add_literal(int addr,int val)
+static void add_literal(int addr,int val)
 {
   assert(literalcount<sizeof(literals)/sizeof(literals[0]));
   literals[literalcount][0]=addr;
@@ -189,38 +203,34 @@ add_literal(int addr,int val)
   literalcount++;
 }
 
-void *kill_pointer(void *stub)
+// from a pointer to external jump stub (which was produced by emit_extjump2)
+// find where the jumping insn is
+static void *find_extjump_insn(void *stub)
 {
   int *ptr=(int *)(stub+4);
-  assert((*ptr&0x0ff00000)==0x05900000);
+  assert((*ptr&0x0fff0000)==0x059f0000); // ldr rx, [pc, #ofs]
   u_int offset=*ptr&0xfff;
-  int **l_ptr=(void *)ptr+offset+8;
-  int *i_ptr=*l_ptr;
-  set_jump_target((int)i_ptr,(int)stub);
-  return i_ptr;
+  void **l_ptr=(void *)ptr+offset+8;
+  return *l_ptr;
 }
 
 // find where external branch is liked to using addr of it's stub:
 // get address that insn one after stub loads (dyna_linker arg1),
 // treat it as a pointer to branch insn,
 // return addr where that branch jumps to
-int get_pointer(void *stub)
+static void *get_pointer(void *stub)
 {
   //printf("get_pointer(%x)\n",(int)stub);
-  int *ptr=(int *)(stub+4);
-  assert((*ptr&0x0fff0000)==0x059f0000);
-  u_int offset=*ptr&0xfff;
-  int **l_ptr=(void *)ptr+offset+8;
-  int *i_ptr=*l_ptr;
+  int *i_ptr=find_extjump_insn(stub);
   assert((*i_ptr&0x0f000000)==0x0a000000);
-  return (int)i_ptr+((*i_ptr<<8)>>6)+8;
+  return (u_char *)i_ptr+((*i_ptr<<8)>>6)+8;
 }
 
 // Find the "clean" entry point from a "dirty" entry point
 // by skipping past the call to verify_code
-u_int get_clean_addr(int addr)
+static void *get_clean_addr(void *addr)
 {
-  int *ptr=(int *)addr;
+  signed int *ptr = addr;
   #ifndef HAVE_ARMV7
   ptr+=4;
   #else
@@ -230,23 +240,29 @@ u_int get_clean_addr(int addr)
   assert((*ptr&0xFF000000)==0xeb000000); // bl instruction
   ptr++;
   if((*ptr&0xFF000000)==0xea000000) {
-    return (int)ptr+((*ptr<<8)>>6)+8; // follow jump
+    return (char *)ptr+((*ptr<<8)>>6)+8; // follow jump
   }
-  return (u_int)ptr;
+  return ptr;
 }
 
-int verify_dirty(int addr)
+static int verify_dirty(u_int *ptr)
 {
-  u_int *ptr=(u_int *)addr;
   #ifndef HAVE_ARMV7
+  u_int offset;
   // get from literal pool
   assert((*ptr&0xFFFF0000)==0xe59f0000);
-  u_int offset=*ptr&0xfff;
-  u_int *l_ptr=(void *)ptr+offset+8;
-  u_int source=l_ptr[0];
-  u_int copy=l_ptr[1];
-  u_int len=l_ptr[2];
-  ptr+=4;
+  offset=*ptr&0xfff;
+  u_int source=*(u_int*)((void *)ptr+offset+8);
+  ptr++;
+  assert((*ptr&0xFFFF0000)==0xe59f0000);
+  offset=*ptr&0xfff;
+  u_int copy=*(u_int*)((void *)ptr+offset+8);
+  ptr++;
+  assert((*ptr&0xFFFF0000)==0xe59f0000);
+  offset=*ptr&0xfff;
+  u_int len=*(u_int*)((void *)ptr+offset+8);
+  ptr++;
+  ptr++;
   #else
   // ARMv7 movw/movt
   assert((*ptr&0xFFF00000)==0xe3000000);
@@ -263,12 +279,12 @@ int verify_dirty(int addr)
 
 // This doesn't necessarily find all clean entry points, just
 // guarantees that it's not dirty
-int isclean(int addr)
+static int isclean(void *addr)
 {
   #ifndef HAVE_ARMV7
-  int *ptr=((u_int *)addr)+4;
+  u_int *ptr=((u_int *)addr)+4;
   #else
-  int *ptr=((u_int *)addr)+6;
+  u_int *ptr=((u_int *)addr)+6;
   #endif
   if((*ptr&0xFF000000)!=0xeb000000) ptr++;
   if((*ptr&0xFF000000)!=0xeb000000) return 1; // bl instruction
@@ -279,18 +295,25 @@ int isclean(int addr)
 }
 
 // get source that block at addr was compiled from (host pointers)
-void get_bounds(int addr,u_int *start,u_int *end)
+static void get_bounds(void *addr, u_char **start, u_char **end)
 {
-  u_int *ptr=(u_int *)addr;
+  u_int *ptr = addr;
   #ifndef HAVE_ARMV7
+  u_int offset;
   // get from literal pool
   assert((*ptr&0xFFFF0000)==0xe59f0000);
-  u_int offset=*ptr&0xfff;
-  u_int *l_ptr=(void *)ptr+offset+8;
-  u_int source=l_ptr[0];
-  //u_int copy=l_ptr[1];
-  u_int len=l_ptr[2];
-  ptr+=4;
+  offset=*ptr&0xfff;
+  u_int source=*(u_int*)((void *)ptr+offset+8);
+  ptr++;
+  //assert((*ptr&0xFFFF0000)==0xe59f0000);
+  //offset=*ptr&0xfff;
+  //u_int copy=*(u_int*)((void *)ptr+offset+8);
+  ptr++;
+  assert((*ptr&0xFFFF0000)==0xe59f0000);
+  offset=*ptr&0xfff;
+  u_int len=*(u_int*)((void *)ptr+offset+8);
+  ptr++;
+  ptr++;
   #else
   // ARMv7 movw/movt
   assert((*ptr&0xFFF00000)==0xe3000000);
@@ -301,469 +324,12 @@ void get_bounds(int addr,u_int *start,u_int *end)
   #endif
   if((*ptr&0xFF000000)!=0xeb000000) ptr++;
   assert((*ptr&0xFF000000)==0xeb000000); // bl instruction
-  *start=source;
-  *end=source+len;
+  *start=(u_char *)source;
+  *end=(u_char *)source+len;
 }
 
-/* Register allocation */
-
-// Note: registers are allocated clean (unmodified state)
-// if you intend to modify the register, you must call dirty_reg().
-void alloc_reg(struct regstat *cur,int i,signed char reg)
-{
-  int r,hr;
-  int preferred_reg = (reg&7);
-  if(reg==CCREG) preferred_reg=HOST_CCREG;
-  if(reg==PTEMP||reg==FTEMP) preferred_reg=12;
-
-  // Don't allocate unused registers
-  if((cur->u>>reg)&1) return;
-
-  // see if it's already allocated
-  for(hr=0;hr<HOST_REGS;hr++)
-  {
-    if(cur->regmap[hr]==reg) return;
-  }
-
-  // Keep the same mapping if the register was already allocated in a loop
-  preferred_reg = loop_reg(i,reg,preferred_reg);
-
-  // Try to allocate the preferred register
-  if(cur->regmap[preferred_reg]==-1) {
-    cur->regmap[preferred_reg]=reg;
-    cur->dirty&=~(1<<preferred_reg);
-    cur->isconst&=~(1<<preferred_reg);
-    return;
-  }
-  r=cur->regmap[preferred_reg];
-  if(r<64&&((cur->u>>r)&1)) {
-    cur->regmap[preferred_reg]=reg;
-    cur->dirty&=~(1<<preferred_reg);
-    cur->isconst&=~(1<<preferred_reg);
-    return;
-  }
-  if(r>=64&&((cur->uu>>(r&63))&1)) {
-    cur->regmap[preferred_reg]=reg;
-    cur->dirty&=~(1<<preferred_reg);
-    cur->isconst&=~(1<<preferred_reg);
-    return;
-  }
-
-  // Clear any unneeded registers
-  // We try to keep the mapping consistent, if possible, because it
-  // makes branches easier (especially loops).  So we try to allocate
-  // first (see above) before removing old mappings.  If this is not
-  // possible then go ahead and clear out the registers that are no
-  // longer needed.
-  for(hr=0;hr<HOST_REGS;hr++)
-  {
-    r=cur->regmap[hr];
-    if(r>=0) {
-      if(r<64) {
-        if((cur->u>>r)&1) {cur->regmap[hr]=-1;break;}
-      }
-      else
-      {
-        if((cur->uu>>(r&63))&1) {cur->regmap[hr]=-1;break;}
-      }
-    }
-  }
-  // Try to allocate any available register, but prefer
-  // registers that have not been used recently.
-  if(i>0) {
-    for(hr=0;hr<HOST_REGS;hr++) {
-      if(hr!=EXCLUDE_REG&&cur->regmap[hr]==-1) {
-        if(regs[i-1].regmap[hr]!=rs1[i-1]&&regs[i-1].regmap[hr]!=rs2[i-1]&&regs[i-1].regmap[hr]!=rt1[i-1]&&regs[i-1].regmap[hr]!=rt2[i-1]) {
-          cur->regmap[hr]=reg;
-          cur->dirty&=~(1<<hr);
-          cur->isconst&=~(1<<hr);
-          return;
-        }
-      }
-    }
-  }
-  // Try to allocate any available register
-  for(hr=0;hr<HOST_REGS;hr++) {
-    if(hr!=EXCLUDE_REG&&cur->regmap[hr]==-1) {
-      cur->regmap[hr]=reg;
-      cur->dirty&=~(1<<hr);
-      cur->isconst&=~(1<<hr);
-      return;
-    }
-  }
-
-  // Ok, now we have to evict someone
-  // Pick a register we hopefully won't need soon
-  u_char hsn[MAXREG+1];
-  memset(hsn,10,sizeof(hsn));
-  int j;
-  lsn(hsn,i,&preferred_reg);
-  //printf("eax=%d ecx=%d edx=%d ebx=%d ebp=%d esi=%d edi=%d\n",cur->regmap[0],cur->regmap[1],cur->regmap[2],cur->regmap[3],cur->regmap[5],cur->regmap[6],cur->regmap[7]);
-  //printf("hsn(%x): %d %d %d %d %d %d %d\n",start+i*4,hsn[cur->regmap[0]&63],hsn[cur->regmap[1]&63],hsn[cur->regmap[2]&63],hsn[cur->regmap[3]&63],hsn[cur->regmap[5]&63],hsn[cur->regmap[6]&63],hsn[cur->regmap[7]&63]);
-  if(i>0) {
-    // Don't evict the cycle count at entry points, otherwise the entry
-    // stub will have to write it.
-    if(bt[i]&&hsn[CCREG]>2) hsn[CCREG]=2;
-    if(i>1&&hsn[CCREG]>2&&(itype[i-2]==RJUMP||itype[i-2]==UJUMP||itype[i-2]==CJUMP||itype[i-2]==SJUMP||itype[i-2]==FJUMP)) hsn[CCREG]=2;
-    for(j=10;j>=3;j--)
-    {
-      // Alloc preferred register if available
-      if(hsn[r=cur->regmap[preferred_reg]&63]==j) {
-        for(hr=0;hr<HOST_REGS;hr++) {
-          // Evict both parts of a 64-bit register
-          if((cur->regmap[hr]&63)==r) {
-            cur->regmap[hr]=-1;
-            cur->dirty&=~(1<<hr);
-            cur->isconst&=~(1<<hr);
-          }
-        }
-        cur->regmap[preferred_reg]=reg;
-        return;
-      }
-      for(r=1;r<=MAXREG;r++)
-      {
-        if(hsn[r]==j&&r!=rs1[i-1]&&r!=rs2[i-1]&&r!=rt1[i-1]&&r!=rt2[i-1]) {
-          for(hr=0;hr<HOST_REGS;hr++) {
-            if(hr!=HOST_CCREG||j<hsn[CCREG]) {
-              if(cur->regmap[hr]==r+64) {
-                cur->regmap[hr]=reg;
-                cur->dirty&=~(1<<hr);
-                cur->isconst&=~(1<<hr);
-                return;
-              }
-            }
-          }
-          for(hr=0;hr<HOST_REGS;hr++) {
-            if(hr!=HOST_CCREG||j<hsn[CCREG]) {
-              if(cur->regmap[hr]==r) {
-                cur->regmap[hr]=reg;
-                cur->dirty&=~(1<<hr);
-                cur->isconst&=~(1<<hr);
-                return;
-              }
-            }
-          }
-        }
-      }
-    }
-  }
-  for(j=10;j>=0;j--)
-  {
-    for(r=1;r<=MAXREG;r++)
-    {
-      if(hsn[r]==j) {
-        for(hr=0;hr<HOST_REGS;hr++) {
-          if(cur->regmap[hr]==r+64) {
-            cur->regmap[hr]=reg;
-            cur->dirty&=~(1<<hr);
-            cur->isconst&=~(1<<hr);
-            return;
-          }
-        }
-        for(hr=0;hr<HOST_REGS;hr++) {
-          if(cur->regmap[hr]==r) {
-            cur->regmap[hr]=reg;
-            cur->dirty&=~(1<<hr);
-            cur->isconst&=~(1<<hr);
-            return;
-          }
-        }
-      }
-    }
-  }
-  SysPrintf("This shouldn't happen (alloc_reg)");exit(1);
-}
-
-void alloc_reg64(struct regstat *cur,int i,signed char reg)
-{
-  int preferred_reg = 8+(reg&1);
-  int r,hr;
-
-  // allocate the lower 32 bits
-  alloc_reg(cur,i,reg);
-
-  // Don't allocate unused registers
-  if((cur->uu>>reg)&1) return;
-
-  // see if the upper half is already allocated
-  for(hr=0;hr<HOST_REGS;hr++)
-  {
-    if(cur->regmap[hr]==reg+64) return;
-  }
-
-  // Keep the same mapping if the register was already allocated in a loop
-  preferred_reg = loop_reg(i,reg,preferred_reg);
-
-  // Try to allocate the preferred register
-  if(cur->regmap[preferred_reg]==-1) {
-    cur->regmap[preferred_reg]=reg|64;
-    cur->dirty&=~(1<<preferred_reg);
-    cur->isconst&=~(1<<preferred_reg);
-    return;
-  }
-  r=cur->regmap[preferred_reg];
-  if(r<64&&((cur->u>>r)&1)) {
-    cur->regmap[preferred_reg]=reg|64;
-    cur->dirty&=~(1<<preferred_reg);
-    cur->isconst&=~(1<<preferred_reg);
-    return;
-  }
-  if(r>=64&&((cur->uu>>(r&63))&1)) {
-    cur->regmap[preferred_reg]=reg|64;
-    cur->dirty&=~(1<<preferred_reg);
-    cur->isconst&=~(1<<preferred_reg);
-    return;
-  }
-
-  // Clear any unneeded registers
-  // We try to keep the mapping consistent, if possible, because it
-  // makes branches easier (especially loops).  So we try to allocate
-  // first (see above) before removing old mappings.  If this is not
-  // possible then go ahead and clear out the registers that are no
-  // longer needed.
-  for(hr=HOST_REGS-1;hr>=0;hr--)
-  {
-    r=cur->regmap[hr];
-    if(r>=0) {
-      if(r<64) {
-        if((cur->u>>r)&1) {cur->regmap[hr]=-1;break;}
-      }
-      else
-      {
-        if((cur->uu>>(r&63))&1) {cur->regmap[hr]=-1;break;}
-      }
-    }
-  }
-  // Try to allocate any available register, but prefer
-  // registers that have not been used recently.
-  if(i>0) {
-    for(hr=0;hr<HOST_REGS;hr++) {
-      if(hr!=EXCLUDE_REG&&cur->regmap[hr]==-1) {
-        if(regs[i-1].regmap[hr]!=rs1[i-1]&&regs[i-1].regmap[hr]!=rs2[i-1]&&regs[i-1].regmap[hr]!=rt1[i-1]&&regs[i-1].regmap[hr]!=rt2[i-1]) {
-          cur->regmap[hr]=reg|64;
-          cur->dirty&=~(1<<hr);
-          cur->isconst&=~(1<<hr);
-          return;
-        }
-      }
-    }
-  }
-  // Try to allocate any available register
-  for(hr=0;hr<HOST_REGS;hr++) {
-    if(hr!=EXCLUDE_REG&&cur->regmap[hr]==-1) {
-      cur->regmap[hr]=reg|64;
-      cur->dirty&=~(1<<hr);
-      cur->isconst&=~(1<<hr);
-      return;
-    }
-  }
-
-  // Ok, now we have to evict someone
-  // Pick a register we hopefully won't need soon
-  u_char hsn[MAXREG+1];
-  memset(hsn,10,sizeof(hsn));
-  int j;
-  lsn(hsn,i,&preferred_reg);
-  //printf("eax=%d ecx=%d edx=%d ebx=%d ebp=%d esi=%d edi=%d\n",cur->regmap[0],cur->regmap[1],cur->regmap[2],cur->regmap[3],cur->regmap[5],cur->regmap[6],cur->regmap[7]);
-  //printf("hsn(%x): %d %d %d %d %d %d %d\n",start+i*4,hsn[cur->regmap[0]&63],hsn[cur->regmap[1]&63],hsn[cur->regmap[2]&63],hsn[cur->regmap[3]&63],hsn[cur->regmap[5]&63],hsn[cur->regmap[6]&63],hsn[cur->regmap[7]&63]);
-  if(i>0) {
-    // Don't evict the cycle count at entry points, otherwise the entry
-    // stub will have to write it.
-    if(bt[i]&&hsn[CCREG]>2) hsn[CCREG]=2;
-    if(i>1&&hsn[CCREG]>2&&(itype[i-2]==RJUMP||itype[i-2]==UJUMP||itype[i-2]==CJUMP||itype[i-2]==SJUMP||itype[i-2]==FJUMP)) hsn[CCREG]=2;
-    for(j=10;j>=3;j--)
-    {
-      // Alloc preferred register if available
-      if(hsn[r=cur->regmap[preferred_reg]&63]==j) {
-        for(hr=0;hr<HOST_REGS;hr++) {
-          // Evict both parts of a 64-bit register
-          if((cur->regmap[hr]&63)==r) {
-            cur->regmap[hr]=-1;
-            cur->dirty&=~(1<<hr);
-            cur->isconst&=~(1<<hr);
-          }
-        }
-        cur->regmap[preferred_reg]=reg|64;
-        return;
-      }
-      for(r=1;r<=MAXREG;r++)
-      {
-        if(hsn[r]==j&&r!=rs1[i-1]&&r!=rs2[i-1]&&r!=rt1[i-1]&&r!=rt2[i-1]) {
-          for(hr=0;hr<HOST_REGS;hr++) {
-            if(hr!=HOST_CCREG||j<hsn[CCREG]) {
-              if(cur->regmap[hr]==r+64) {
-                cur->regmap[hr]=reg|64;
-                cur->dirty&=~(1<<hr);
-                cur->isconst&=~(1<<hr);
-                return;
-              }
-            }
-          }
-          for(hr=0;hr<HOST_REGS;hr++) {
-            if(hr!=HOST_CCREG||j<hsn[CCREG]) {
-              if(cur->regmap[hr]==r) {
-                cur->regmap[hr]=reg|64;
-                cur->dirty&=~(1<<hr);
-                cur->isconst&=~(1<<hr);
-                return;
-              }
-            }
-          }
-        }
-      }
-    }
-  }
-  for(j=10;j>=0;j--)
-  {
-    for(r=1;r<=MAXREG;r++)
-    {
-      if(hsn[r]==j) {
-        for(hr=0;hr<HOST_REGS;hr++) {
-          if(cur->regmap[hr]==r+64) {
-            cur->regmap[hr]=reg|64;
-            cur->dirty&=~(1<<hr);
-            cur->isconst&=~(1<<hr);
-            return;
-          }
-        }
-        for(hr=0;hr<HOST_REGS;hr++) {
-          if(cur->regmap[hr]==r) {
-            cur->regmap[hr]=reg|64;
-            cur->dirty&=~(1<<hr);
-            cur->isconst&=~(1<<hr);
-            return;
-          }
-        }
-      }
-    }
-  }
-  SysPrintf("This shouldn't happen");exit(1);
-}
-
-// Allocate a temporary register.  This is done without regard to
-// dirty status or whether the register we request is on the unneeded list
-// Note: This will only allocate one register, even if called multiple times
-void alloc_reg_temp(struct regstat *cur,int i,signed char reg)
-{
-  int r,hr;
-  int preferred_reg = -1;
-
-  // see if it's already allocated
-  for(hr=0;hr<HOST_REGS;hr++)
-  {
-    if(hr!=EXCLUDE_REG&&cur->regmap[hr]==reg) return;
-  }
-
-  // Try to allocate any available register
-  for(hr=HOST_REGS-1;hr>=0;hr--) {
-    if(hr!=EXCLUDE_REG&&cur->regmap[hr]==-1) {
-      cur->regmap[hr]=reg;
-      cur->dirty&=~(1<<hr);
-      cur->isconst&=~(1<<hr);
-      return;
-    }
-  }
-
-  // Find an unneeded register
-  for(hr=HOST_REGS-1;hr>=0;hr--)
-  {
-    r=cur->regmap[hr];
-    if(r>=0) {
-      if(r<64) {
-        if((cur->u>>r)&1) {
-          if(i==0||((unneeded_reg[i-1]>>r)&1)) {
-            cur->regmap[hr]=reg;
-            cur->dirty&=~(1<<hr);
-            cur->isconst&=~(1<<hr);
-            return;
-          }
-        }
-      }
-      else
-      {
-        if((cur->uu>>(r&63))&1) {
-          if(i==0||((unneeded_reg_upper[i-1]>>(r&63))&1)) {
-            cur->regmap[hr]=reg;
-            cur->dirty&=~(1<<hr);
-            cur->isconst&=~(1<<hr);
-            return;
-          }
-        }
-      }
-    }
-  }
-
-  // Ok, now we have to evict someone
-  // Pick a register we hopefully won't need soon
-  // TODO: we might want to follow unconditional jumps here
-  // TODO: get rid of dupe code and make this into a function
-  u_char hsn[MAXREG+1];
-  memset(hsn,10,sizeof(hsn));
-  int j;
-  lsn(hsn,i,&preferred_reg);
-  //printf("hsn: %d %d %d %d %d %d %d\n",hsn[cur->regmap[0]&63],hsn[cur->regmap[1]&63],hsn[cur->regmap[2]&63],hsn[cur->regmap[3]&63],hsn[cur->regmap[5]&63],hsn[cur->regmap[6]&63],hsn[cur->regmap[7]&63]);
-  if(i>0) {
-    // Don't evict the cycle count at entry points, otherwise the entry
-    // stub will have to write it.
-    if(bt[i]&&hsn[CCREG]>2) hsn[CCREG]=2;
-    if(i>1&&hsn[CCREG]>2&&(itype[i-2]==RJUMP||itype[i-2]==UJUMP||itype[i-2]==CJUMP||itype[i-2]==SJUMP||itype[i-2]==FJUMP)) hsn[CCREG]=2;
-    for(j=10;j>=3;j--)
-    {
-      for(r=1;r<=MAXREG;r++)
-      {
-        if(hsn[r]==j&&r!=rs1[i-1]&&r!=rs2[i-1]&&r!=rt1[i-1]&&r!=rt2[i-1]) {
-          for(hr=0;hr<HOST_REGS;hr++) {
-            if(hr!=HOST_CCREG||hsn[CCREG]>2) {
-              if(cur->regmap[hr]==r+64) {
-                cur->regmap[hr]=reg;
-                cur->dirty&=~(1<<hr);
-                cur->isconst&=~(1<<hr);
-                return;
-              }
-            }
-          }
-          for(hr=0;hr<HOST_REGS;hr++) {
-            if(hr!=HOST_CCREG||hsn[CCREG]>2) {
-              if(cur->regmap[hr]==r) {
-                cur->regmap[hr]=reg;
-                cur->dirty&=~(1<<hr);
-                cur->isconst&=~(1<<hr);
-                return;
-              }
-            }
-          }
-        }
-      }
-    }
-  }
-  for(j=10;j>=0;j--)
-  {
-    for(r=1;r<=MAXREG;r++)
-    {
-      if(hsn[r]==j) {
-        for(hr=0;hr<HOST_REGS;hr++) {
-          if(cur->regmap[hr]==r+64) {
-            cur->regmap[hr]=reg;
-            cur->dirty&=~(1<<hr);
-            cur->isconst&=~(1<<hr);
-            return;
-          }
-        }
-        for(hr=0;hr<HOST_REGS;hr++) {
-          if(cur->regmap[hr]==r) {
-            cur->regmap[hr]=reg;
-            cur->dirty&=~(1<<hr);
-            cur->isconst&=~(1<<hr);
-            return;
-          }
-        }
-      }
-    }
-  }
-  SysPrintf("This shouldn't happen");exit(1);
-}
 // Allocate a specific ARM register.
-void alloc_arm_reg(struct regstat *cur,int i,signed char reg,char hr)
+static void alloc_arm_reg(struct regstat *cur,int i,signed char reg,int hr)
 {
   int n;
   int dirty=0;
@@ -784,17 +350,14 @@ void alloc_arm_reg(struct regstat *cur,int i,signed char reg,char hr)
 }
 
 // Alloc cycle count into dedicated register
-alloc_cc(struct regstat *cur,int i)
+static void alloc_cc(struct regstat *cur,int i)
 {
   alloc_arm_reg(cur,i,CCREG,HOST_CCREG);
 }
 
-/* Special alloc */
-
-
 /* Assembler */
 
-char regname[16][4] = {
+static unused char regname[16][4] = {
  "r0",
  "r1",
  "r2",
@@ -812,19 +375,21 @@ char regname[16][4] = {
  "lr",
  "pc"};
 
-void output_w32(u_int word)
+static void output_w32(u_int word)
 {
   *((u_int *)out)=word;
   out+=4;
 }
-u_int rd_rn_rm(u_int rd, u_int rn, u_int rm)
+
+static u_int rd_rn_rm(u_int rd, u_int rn, u_int rm)
 {
   assert(rd<16);
   assert(rn<16);
   assert(rm<16);
   return((rn<<16)|(rd<<12)|rm);
 }
-u_int rd_rn_imm_shift(u_int rd, u_int rn, u_int imm, u_int shift)
+
+static u_int rd_rn_imm_shift(u_int rd, u_int rn, u_int imm, u_int shift)
 {
   assert(rd<16);
   assert(rn<16);
@@ -832,7 +397,8 @@ u_int rd_rn_imm_shift(u_int rd, u_int rn, u_int imm, u_int shift)
   assert((shift&1)==0);
   return((rn<<16)|(rd<<12)|(((32-shift)&30)<<7)|imm);
 }
-u_int genimm(u_int imm,u_int *encoded)
+
+static u_int genimm(u_int imm,u_int *encoded)
 {
   *encoded=0;
   if(imm==0) return 1;
@@ -847,12 +413,15 @@ u_int genimm(u_int imm,u_int *encoded)
   }
   return 0;
 }
-void genimm_checked(u_int imm,u_int *encoded)
+
+static void genimm_checked(u_int imm,u_int *encoded)
 {
   u_int ret=genimm(imm,encoded);
   assert(ret);
+  (void)ret;
 }
-u_int genjmp(u_int addr)
+
+static u_int genjmp(u_int addr)
 {
   int offset=addr-(int)out-8;
   if(offset<-33554432||offset>=33554432) {
@@ -865,96 +434,75 @@ u_int genjmp(u_int addr)
   return ((u_int)offset>>2)&0xffffff;
 }
 
-void emit_mov(int rs,int rt)
+static void emit_mov(int rs,int rt)
 {
   assem_debug("mov %s,%s\n",regname[rt],regname[rs]);
   output_w32(0xe1a00000|rd_rn_rm(rt,0,rs));
 }
 
-void emit_movs(int rs,int rt)
+static void emit_movs(int rs,int rt)
 {
   assem_debug("movs %s,%s\n",regname[rt],regname[rs]);
   output_w32(0xe1b00000|rd_rn_rm(rt,0,rs));
 }
 
-void emit_add(int rs1,int rs2,int rt)
+static void emit_add(int rs1,int rs2,int rt)
 {
   assem_debug("add %s,%s,%s\n",regname[rt],regname[rs1],regname[rs2]);
   output_w32(0xe0800000|rd_rn_rm(rt,rs1,rs2));
 }
 
-void emit_adds(int rs1,int rs2,int rt)
+static void emit_adds(int rs1,int rs2,int rt)
 {
   assem_debug("adds %s,%s,%s\n",regname[rt],regname[rs1],regname[rs2]);
   output_w32(0xe0900000|rd_rn_rm(rt,rs1,rs2));
 }
 
-void emit_adcs(int rs1,int rs2,int rt)
+static void emit_adcs(int rs1,int rs2,int rt)
 {
   assem_debug("adcs %s,%s,%s\n",regname[rt],regname[rs1],regname[rs2]);
   output_w32(0xe0b00000|rd_rn_rm(rt,rs1,rs2));
 }
 
-void emit_sbc(int rs1,int rs2,int rt)
-{
-  assem_debug("sbc %s,%s,%s\n",regname[rt],regname[rs1],regname[rs2]);
-  output_w32(0xe0c00000|rd_rn_rm(rt,rs1,rs2));
-}
-
-void emit_sbcs(int rs1,int rs2,int rt)
-{
-  assem_debug("sbcs %s,%s,%s\n",regname[rt],regname[rs1],regname[rs2]);
-  output_w32(0xe0d00000|rd_rn_rm(rt,rs1,rs2));
-}
-
-void emit_neg(int rs, int rt)
+static void emit_neg(int rs, int rt)
 {
   assem_debug("rsb %s,%s,#0\n",regname[rt],regname[rs]);
   output_w32(0xe2600000|rd_rn_rm(rt,rs,0));
 }
 
-void emit_negs(int rs, int rt)
-{
-  assem_debug("rsbs %s,%s,#0\n",regname[rt],regname[rs]);
-  output_w32(0xe2700000|rd_rn_rm(rt,rs,0));
-}
-
-void emit_sub(int rs1,int rs2,int rt)
+static void emit_sub(int rs1,int rs2,int rt)
 {
   assem_debug("sub %s,%s,%s\n",regname[rt],regname[rs1],regname[rs2]);
   output_w32(0xe0400000|rd_rn_rm(rt,rs1,rs2));
 }
 
-void emit_subs(int rs1,int rs2,int rt)
-{
-  assem_debug("subs %s,%s,%s\n",regname[rt],regname[rs1],regname[rs2]);
-  output_w32(0xe0500000|rd_rn_rm(rt,rs1,rs2));
-}
-
-void emit_zeroreg(int rt)
+static void emit_zeroreg(int rt)
 {
   assem_debug("mov %s,#0\n",regname[rt]);
   output_w32(0xe3a00000|rd_rn_rm(rt,0,0));
 }
 
-void emit_loadlp(u_int imm,u_int rt)
+static void emit_loadlp(u_int imm,u_int rt)
 {
   add_literal((int)out,imm);
   assem_debug("ldr %s,pc+? [=%x]\n",regname[rt],imm);
   output_w32(0xe5900000|rd_rn_rm(rt,15,0));
 }
-void emit_movw(u_int imm,u_int rt)
+
+static void emit_movw(u_int imm,u_int rt)
 {
   assert(imm<65536);
   assem_debug("movw %s,#%d (0x%x)\n",regname[rt],imm,imm);
   output_w32(0xe3000000|rd_rn_rm(rt,0,0)|(imm&0xfff)|((imm<<4)&0xf0000));
 }
-void emit_movt(u_int imm,u_int rt)
+
+static void emit_movt(u_int imm,u_int rt)
 {
   assem_debug("movt %s,#%d (0x%x)\n",regname[rt],imm&0xffff0000,imm&0xffff0000);
   output_w32(0xe3400000|rd_rn_rm(rt,0,0)|((imm>>16)&0xfff)|((imm>>12)&0xf0000));
 }
-void emit_movimm(u_int imm,u_int rt)
+
+static void emit_movimm(u_int imm,u_int rt)
 {
   u_int armval;
   if(genimm(imm,&armval)) {
@@ -981,13 +529,14 @@ void emit_movimm(u_int imm,u_int rt)
     #endif
   }
 }
-void emit_pcreladdr(u_int rt)
+
+static void emit_pcreladdr(u_int rt)
 {
   assem_debug("add %s,pc,#?\n",regname[rt]);
   output_w32(0xe2800000|rd_rn_rm(rt,15,0));
 }
 
-void emit_loadreg(int r, int hr)
+static void emit_loadreg(int r, int hr)
 {
   if(r&64) {
     SysPrintf("64bit load in 32bit mode!\n");
@@ -1002,7 +551,6 @@ void emit_loadreg(int r, int hr)
     if((r&63)==LOREG) addr=(int)&lo+((r&64)>>4);
     if(r==CCREG) addr=(int)&cycle_count;
     if(r==CSREG) addr=(int)&Status;
-    if(r==FSREG) addr=(int)&FCR31;
     if(r==INVCP) addr=(int)&invc_ptr;
     u_int offset = addr-(u_int)&dynarec_local;
     assert(offset<4096);
@@ -1010,7 +558,8 @@ void emit_loadreg(int r, int hr)
     output_w32(0xe5900000|rd_rn_rm(hr,FP,0)|offset);
   }
 }
-void emit_storereg(int r, int hr)
+
+static void emit_storereg(int r, int hr)
 {
   if(r&64) {
     SysPrintf("64bit store in 32bit mode!\n");
@@ -1021,20 +570,19 @@ void emit_storereg(int r, int hr)
   if((r&63)==HIREG) addr=(int)&hi+((r&64)>>4);
   if((r&63)==LOREG) addr=(int)&lo+((r&64)>>4);
   if(r==CCREG) addr=(int)&cycle_count;
-  if(r==FSREG) addr=(int)&FCR31;
   u_int offset = addr-(u_int)&dynarec_local;
   assert(offset<4096);
   assem_debug("str %s,fp+%d\n",regname[hr],offset);
   output_w32(0xe5800000|rd_rn_rm(hr,FP,0)|offset);
 }
 
-void emit_test(int rs, int rt)
+static void emit_test(int rs, int rt)
 {
   assem_debug("tst %s,%s\n",regname[rs],regname[rt]);
   output_w32(0xe1100000|rd_rn_rm(0,rs,rt));
 }
 
-void emit_testimm(int rs,int imm)
+static void emit_testimm(int rs,int imm)
 {
   u_int armval;
   assem_debug("tst %s,#%d\n",regname[rs],imm);
@@ -1042,7 +590,7 @@ void emit_testimm(int rs,int imm)
   output_w32(0xe3100000|rd_rn_rm(0,rs,0)|armval);
 }
 
-void emit_testeqimm(int rs,int imm)
+static void emit_testeqimm(int rs,int imm)
 {
   u_int armval;
   assem_debug("tsteq %s,$%d\n",regname[rs],imm);
@@ -1050,36 +598,31 @@ void emit_testeqimm(int rs,int imm)
   output_w32(0x03100000|rd_rn_rm(0,rs,0)|armval);
 }
 
-void emit_not(int rs,int rt)
+static void emit_not(int rs,int rt)
 {
   assem_debug("mvn %s,%s\n",regname[rt],regname[rs]);
   output_w32(0xe1e00000|rd_rn_rm(rt,0,rs));
 }
 
-void emit_mvnmi(int rs,int rt)
+static void emit_mvnmi(int rs,int rt)
 {
   assem_debug("mvnmi %s,%s\n",regname[rt],regname[rs]);
   output_w32(0x41e00000|rd_rn_rm(rt,0,rs));
 }
 
-void emit_and(u_int rs1,u_int rs2,u_int rt)
+static void emit_and(u_int rs1,u_int rs2,u_int rt)
 {
   assem_debug("and %s,%s,%s\n",regname[rt],regname[rs1],regname[rs2]);
   output_w32(0xe0000000|rd_rn_rm(rt,rs1,rs2));
 }
 
-void emit_or(u_int rs1,u_int rs2,u_int rt)
+static void emit_or(u_int rs1,u_int rs2,u_int rt)
 {
   assem_debug("orr %s,%s,%s\n",regname[rt],regname[rs1],regname[rs2]);
   output_w32(0xe1800000|rd_rn_rm(rt,rs1,rs2));
 }
-void emit_or_and_set_flags(int rs1,int rs2,int rt)
-{
-  assem_debug("orrs %s,%s,%s\n",regname[rt],regname[rs1],regname[rs2]);
-  output_w32(0xe1900000|rd_rn_rm(rt,rs1,rs2));
-}
 
-void emit_orrshl_imm(u_int rs,u_int imm,u_int rt)
+static void emit_orrshl_imm(u_int rs,u_int imm,u_int rt)
 {
   assert(rs<16);
   assert(rt<16);
@@ -1088,7 +631,7 @@ void emit_orrshl_imm(u_int rs,u_int imm,u_int rt)
   output_w32(0xe1800000|rd_rn_rm(rt,rt,rs)|(imm<<7));
 }
 
-void emit_orrshr_imm(u_int rs,u_int imm,u_int rt)
+static void emit_orrshr_imm(u_int rs,u_int imm,u_int rt)
 {
   assert(rs<16);
   assert(rt<16);
@@ -1097,13 +640,13 @@ void emit_orrshr_imm(u_int rs,u_int imm,u_int rt)
   output_w32(0xe1800020|rd_rn_rm(rt,rt,rs)|(imm<<7));
 }
 
-void emit_xor(u_int rs1,u_int rs2,u_int rt)
+static void emit_xor(u_int rs1,u_int rs2,u_int rt)
 {
   assem_debug("eor %s,%s,%s\n",regname[rt],regname[rs1],regname[rs2]);
   output_w32(0xe0200000|rd_rn_rm(rt,rs1,rs2));
 }
 
-void emit_addimm(u_int rs,int imm,u_int rt)
+static void emit_addimm(u_int rs,int imm,u_int rt)
 {
   assert(rs<16);
   assert(rt<16);
@@ -1144,7 +687,7 @@ void emit_addimm(u_int rs,int imm,u_int rt)
   else if(rs!=rt) emit_mov(rs,rt);
 }
 
-void emit_addimm_and_set_flags(int imm,int rt)
+static void emit_addimm_and_set_flags(int imm,int rt)
 {
   assert(imm>-65536&&imm<65536);
   u_int armval;
@@ -1166,19 +709,20 @@ void emit_addimm_and_set_flags(int imm,int rt)
     output_w32(0xe2900000|rd_rn_imm_shift(rt,rt,imm&0xff,0));
   }
 }
-void emit_addimm_no_flags(u_int imm,u_int rt)
+
+static void emit_addimm_no_flags(u_int imm,u_int rt)
 {
   emit_addimm(rt,imm,rt);
 }
 
-void emit_addnop(u_int r)
+static void emit_addnop(u_int r)
 {
   assert(r<16);
   assem_debug("add %s,%s,#0 (nop)\n",regname[r],regname[r]);
   output_w32(0xe2800000|rd_rn_rm(r,r,0));
 }
 
-void emit_adcimm(u_int rs,int imm,u_int rt)
+static void emit_adcimm(u_int rs,int imm,u_int rt)
 {
   u_int armval;
   genimm_checked(imm,&armval);
@@ -1186,16 +730,7 @@ void emit_adcimm(u_int rs,int imm,u_int rt)
   output_w32(0xe2a00000|rd_rn_rm(rt,rs,0)|armval);
 }
 
-void emit_rscimm(int rs,int imm,u_int rt)
-{
-  assert(0);
-  u_int armval;
-  genimm_checked(imm,&armval);
-  assem_debug("rsc %s,%s,#%d\n",regname[rt],regname[rs],imm);
-  output_w32(0xe2e00000|rd_rn_rm(rt,rs,0)|armval);
-}
-
-void emit_addimm64_32(int rsh,int rsl,int imm,int rth,int rtl)
+static void emit_addimm64_32(int rsh,int rsl,int imm,int rth,int rtl)
 {
   // TODO: if(genimm(imm,&armval)) ...
   // else
@@ -1204,7 +739,7 @@ void emit_addimm64_32(int rsh,int rsl,int imm,int rth,int rtl)
   emit_adcimm(rsh,0,rth);
 }
 
-void emit_andimm(int rs,int imm,int rt)
+static void emit_andimm(int rs,int imm,int rt)
 {
   u_int armval;
   if(imm==0) {
@@ -1240,7 +775,7 @@ void emit_andimm(int rs,int imm,int rt)
   }
 }
 
-void emit_orimm(int rs,int imm,int rt)
+static void emit_orimm(int rs,int imm,int rt)
 {
   u_int armval;
   if(imm==0) {
@@ -1257,7 +792,7 @@ void emit_orimm(int rs,int imm,int rt)
   }
 }
 
-void emit_xorimm(int rs,int imm,int rt)
+static void emit_xorimm(int rs,int imm,int rt)
 {
   u_int armval;
   if(imm==0) {
@@ -1274,7 +809,7 @@ void emit_xorimm(int rs,int imm,int rt)
   }
 }
 
-void emit_shlimm(int rs,u_int imm,int rt)
+static void emit_shlimm(int rs,u_int imm,int rt)
 {
   assert(imm>0);
   assert(imm<32);
@@ -1283,7 +818,7 @@ void emit_shlimm(int rs,u_int imm,int rt)
   output_w32(0xe1a00000|rd_rn_rm(rt,0,rs)|(imm<<7));
 }
 
-void emit_lsls_imm(int rs,int imm,int rt)
+static void emit_lsls_imm(int rs,int imm,int rt)
 {
   assert(imm>0);
   assert(imm<32);
@@ -1291,7 +826,7 @@ void emit_lsls_imm(int rs,int imm,int rt)
   output_w32(0xe1b00000|rd_rn_rm(rt,0,rs)|(imm<<7));
 }
 
-void emit_lslpls_imm(int rs,int imm,int rt)
+static unused void emit_lslpls_imm(int rs,int imm,int rt)
 {
   assert(imm>0);
   assert(imm<32);
@@ -1299,7 +834,7 @@ void emit_lslpls_imm(int rs,int imm,int rt)
   output_w32(0x51b00000|rd_rn_rm(rt,0,rs)|(imm<<7));
 }
 
-void emit_shrimm(int rs,u_int imm,int rt)
+static void emit_shrimm(int rs,u_int imm,int rt)
 {
   assert(imm>0);
   assert(imm<32);
@@ -1307,7 +842,7 @@ void emit_shrimm(int rs,u_int imm,int rt)
   output_w32(0xe1a00000|rd_rn_rm(rt,0,rs)|0x20|(imm<<7));
 }
 
-void emit_sarimm(int rs,u_int imm,int rt)
+static void emit_sarimm(int rs,u_int imm,int rt)
 {
   assert(imm>0);
   assert(imm<32);
@@ -1315,7 +850,7 @@ void emit_sarimm(int rs,u_int imm,int rt)
   output_w32(0xe1a00000|rd_rn_rm(rt,0,rs)|0x40|(imm<<7));
 }
 
-void emit_rorimm(int rs,u_int imm,int rt)
+static void emit_rorimm(int rs,u_int imm,int rt)
 {
   assert(imm>0);
   assert(imm<32);
@@ -1323,31 +858,7 @@ void emit_rorimm(int rs,u_int imm,int rt)
   output_w32(0xe1a00000|rd_rn_rm(rt,0,rs)|0x60|(imm<<7));
 }
 
-void emit_shldimm(int rs,int rs2,u_int imm,int rt)
-{
-  assem_debug("shld %%%s,%%%s,%d\n",regname[rt],regname[rs2],imm);
-  assert(imm>0);
-  assert(imm<32);
-  //if(imm==1) ...
-  assem_debug("lsl %s,%s,#%d\n",regname[rt],regname[rs],imm);
-  output_w32(0xe1a00000|rd_rn_rm(rt,0,rs)|(imm<<7));
-  assem_debug("orr %s,%s,%s,lsr #%d\n",regname[rt],regname[rt],regname[rs2],32-imm);
-  output_w32(0xe1800020|rd_rn_rm(rt,rt,rs2)|((32-imm)<<7));
-}
-
-void emit_shrdimm(int rs,int rs2,u_int imm,int rt)
-{
-  assem_debug("shrd %%%s,%%%s,%d\n",regname[rt],regname[rs2],imm);
-  assert(imm>0);
-  assert(imm<32);
-  //if(imm==1) ...
-  assem_debug("lsr %s,%s,#%d\n",regname[rt],regname[rs],imm);
-  output_w32(0xe1a00020|rd_rn_rm(rt,0,rs)|(imm<<7));
-  assem_debug("orr %s,%s,%s,lsl #%d\n",regname[rt],regname[rt],regname[rs2],32-imm);
-  output_w32(0xe1800000|rd_rn_rm(rt,rt,rs2)|((32-imm)<<7));
-}
-
-void emit_signextend16(int rs,int rt)
+static void emit_signextend16(int rs,int rt)
 {
   #ifndef HAVE_ARMV6
   emit_shlimm(rs,16,rt);
@@ -1358,7 +869,7 @@ void emit_signextend16(int rs,int rt)
   #endif
 }
 
-void emit_signextend8(int rs,int rt)
+static void emit_signextend8(int rs,int rt)
 {
   #ifndef HAVE_ARMV6
   emit_shlimm(rs,24,rt);
@@ -1369,7 +880,7 @@ void emit_signextend8(int rs,int rt)
   #endif
 }
 
-void emit_shl(u_int rs,u_int shift,u_int rt)
+static void emit_shl(u_int rs,u_int shift,u_int rt)
 {
   assert(rs<16);
   assert(rt<16);
@@ -1378,7 +889,8 @@ void emit_shl(u_int rs,u_int shift,u_int rt)
   assem_debug("lsl %s,%s,%s\n",regname[rt],regname[rs],regname[shift]);
   output_w32(0xe1a00000|rd_rn_rm(rt,0,rs)|0x10|(shift<<8));
 }
-void emit_shr(u_int rs,u_int shift,u_int rt)
+
+static void emit_shr(u_int rs,u_int shift,u_int rt)
 {
   assert(rs<16);
   assert(rt<16);
@@ -1386,7 +898,8 @@ void emit_shr(u_int rs,u_int shift,u_int rt)
   assem_debug("lsr %s,%s,%s\n",regname[rt],regname[rs],regname[shift]);
   output_w32(0xe1a00000|rd_rn_rm(rt,0,rs)|0x30|(shift<<8));
 }
-void emit_sar(u_int rs,u_int shift,u_int rt)
+
+static void emit_sar(u_int rs,u_int shift,u_int rt)
 {
   assert(rs<16);
   assert(rt<16);
@@ -1395,7 +908,7 @@ void emit_sar(u_int rs,u_int shift,u_int rt)
   output_w32(0xe1a00000|rd_rn_rm(rt,0,rs)|0x50|(shift<<8));
 }
 
-void emit_orrshl(u_int rs,u_int shift,u_int rt)
+static void emit_orrshl(u_int rs,u_int shift,u_int rt)
 {
   assert(rs<16);
   assert(rt<16);
@@ -1403,7 +916,8 @@ void emit_orrshl(u_int rs,u_int shift,u_int rt)
   assem_debug("orr %s,%s,%s,lsl %s\n",regname[rt],regname[rt],regname[rs],regname[shift]);
   output_w32(0xe1800000|rd_rn_rm(rt,rt,rs)|0x10|(shift<<8));
 }
-void emit_orrshr(u_int rs,u_int shift,u_int rt)
+
+static void emit_orrshr(u_int rs,u_int shift,u_int rt)
 {
   assert(rs<16);
   assert(rt<16);
@@ -1412,7 +926,7 @@ void emit_orrshr(u_int rs,u_int shift,u_int rt)
   output_w32(0xe1800000|rd_rn_rm(rt,rt,rs)|0x30|(shift<<8));
 }
 
-void emit_cmpimm(int rs,int imm)
+static void emit_cmpimm(int rs,int imm)
 {
   u_int armval;
   if(genimm(imm,&armval)) {
@@ -1434,136 +948,87 @@ void emit_cmpimm(int rs,int imm)
   }
 }
 
-void emit_cmovne_imm(int imm,int rt)
+static void emit_cmovne_imm(int imm,int rt)
 {
   assem_debug("movne %s,#%d\n",regname[rt],imm);
   u_int armval;
   genimm_checked(imm,&armval);
   output_w32(0x13a00000|rd_rn_rm(rt,0,0)|armval);
 }
-void emit_cmovl_imm(int imm,int rt)
+
+static void emit_cmovl_imm(int imm,int rt)
 {
   assem_debug("movlt %s,#%d\n",regname[rt],imm);
   u_int armval;
   genimm_checked(imm,&armval);
   output_w32(0xb3a00000|rd_rn_rm(rt,0,0)|armval);
 }
-void emit_cmovb_imm(int imm,int rt)
+
+static void emit_cmovb_imm(int imm,int rt)
 {
   assem_debug("movcc %s,#%d\n",regname[rt],imm);
   u_int armval;
   genimm_checked(imm,&armval);
   output_w32(0x33a00000|rd_rn_rm(rt,0,0)|armval);
 }
-void emit_cmovs_imm(int imm,int rt)
-{
-  assem_debug("movmi %s,#%d\n",regname[rt],imm);
-  u_int armval;
-  genimm_checked(imm,&armval);
-  output_w32(0x43a00000|rd_rn_rm(rt,0,0)|armval);
-}
-void emit_cmove_reg(int rs,int rt)
-{
-  assem_debug("moveq %s,%s\n",regname[rt],regname[rs]);
-  output_w32(0x01a00000|rd_rn_rm(rt,0,rs));
-}
-void emit_cmovne_reg(int rs,int rt)
+
+static void emit_cmovne_reg(int rs,int rt)
 {
   assem_debug("movne %s,%s\n",regname[rt],regname[rs]);
   output_w32(0x11a00000|rd_rn_rm(rt,0,rs));
 }
-void emit_cmovl_reg(int rs,int rt)
+
+static void emit_cmovl_reg(int rs,int rt)
 {
   assem_debug("movlt %s,%s\n",regname[rt],regname[rs]);
   output_w32(0xb1a00000|rd_rn_rm(rt,0,rs));
 }
-void emit_cmovs_reg(int rs,int rt)
+
+static void emit_cmovs_reg(int rs,int rt)
 {
   assem_debug("movmi %s,%s\n",regname[rt],regname[rs]);
   output_w32(0x41a00000|rd_rn_rm(rt,0,rs));
 }
 
-void emit_slti32(int rs,int imm,int rt)
+static void emit_slti32(int rs,int imm,int rt)
 {
   if(rs!=rt) emit_zeroreg(rt);
   emit_cmpimm(rs,imm);
   if(rs==rt) emit_movimm(0,rt);
   emit_cmovl_imm(1,rt);
 }
-void emit_sltiu32(int rs,int imm,int rt)
+
+static void emit_sltiu32(int rs,int imm,int rt)
 {
   if(rs!=rt) emit_zeroreg(rt);
   emit_cmpimm(rs,imm);
   if(rs==rt) emit_movimm(0,rt);
   emit_cmovb_imm(1,rt);
 }
-void emit_slti64_32(int rsh,int rsl,int imm,int rt)
-{
-  assert(rsh!=rt);
-  emit_slti32(rsl,imm,rt);
-  if(imm>=0)
-  {
-    emit_test(rsh,rsh);
-    emit_cmovne_imm(0,rt);
-    emit_cmovs_imm(1,rt);
-  }
-  else
-  {
-    emit_cmpimm(rsh,-1);
-    emit_cmovne_imm(0,rt);
-    emit_cmovl_imm(1,rt);
-  }
-}
-void emit_sltiu64_32(int rsh,int rsl,int imm,int rt)
-{
-  assert(rsh!=rt);
-  emit_sltiu32(rsl,imm,rt);
-  if(imm>=0)
-  {
-    emit_test(rsh,rsh);
-    emit_cmovne_imm(0,rt);
-  }
-  else
-  {
-    emit_cmpimm(rsh,-1);
-    emit_cmovne_imm(1,rt);
-  }
-}
 
-void emit_cmp(int rs,int rt)
+static void emit_cmp(int rs,int rt)
 {
   assem_debug("cmp %s,%s\n",regname[rs],regname[rt]);
   output_w32(0xe1500000|rd_rn_rm(0,rs,rt));
 }
-void emit_set_gz32(int rs, int rt)
+
+static void emit_set_gz32(int rs, int rt)
 {
   //assem_debug("set_gz32\n");
   emit_cmpimm(rs,1);
   emit_movimm(1,rt);
   emit_cmovl_imm(0,rt);
 }
-void emit_set_nz32(int rs, int rt)
+
+static void emit_set_nz32(int rs, int rt)
 {
   //assem_debug("set_nz32\n");
   if(rs!=rt) emit_movs(rs,rt);
   else emit_test(rs,rs);
   emit_cmovne_imm(1,rt);
 }
-void emit_set_gz64_32(int rsh, int rsl, int rt)
-{
-  //assem_debug("set_gz64\n");
-  emit_set_gz32(rsl,rt);
-  emit_test(rsh,rsh);
-  emit_cmovne_imm(1,rt);
-  emit_cmovs_imm(0,rt);
-}
-void emit_set_nz64_32(int rsh, int rsl, int rt)
-{
-  //assem_debug("set_nz64\n");
-  emit_or_and_set_flags(rsh,rsl,rt);
-  emit_cmovne_imm(1,rt);
-}
-void emit_set_if_less32(int rs1, int rs2, int rt)
+
+static void emit_set_if_less32(int rs1, int rs2, int rt)
 {
   //assem_debug("set if less (%%%s,%%%s),%%%s\n",regname[rs1],regname[rs2],regname[rt]);
   if(rs1!=rt&&rs2!=rt) emit_zeroreg(rt);
@@ -1571,7 +1036,8 @@ void emit_set_if_less32(int rs1, int rs2, int rt)
   if(rs1==rt||rs2==rt) emit_movimm(0,rt);
   emit_cmovl_imm(1,rt);
 }
-void emit_set_if_carry32(int rs1, int rs2, int rt)
+
+static void emit_set_if_carry32(int rs1, int rs2, int rt)
 {
   //assem_debug("set if carry (%%%s,%%%s),%%%s\n",regname[rs1],regname[rs2],regname[rt]);
   if(rs1!=rt&&rs2!=rt) emit_zeroreg(rt);
@@ -1579,107 +1045,107 @@ void emit_set_if_carry32(int rs1, int rs2, int rt)
   if(rs1==rt||rs2==rt) emit_movimm(0,rt);
   emit_cmovb_imm(1,rt);
 }
-void emit_set_if_less64_32(int u1, int l1, int u2, int l2, int rt)
-{
-  //assem_debug("set if less64 (%%%s,%%%s,%%%s,%%%s),%%%s\n",regname[u1],regname[l1],regname[u2],regname[l2],regname[rt]);
-  assert(u1!=rt);
-  assert(u2!=rt);
-  emit_cmp(l1,l2);
-  emit_movimm(0,rt);
-  emit_sbcs(u1,u2,HOST_TEMPREG);
-  emit_cmovl_imm(1,rt);
-}
-void emit_set_if_carry64_32(int u1, int l1, int u2, int l2, int rt)
-{
-  //assem_debug("set if carry64 (%%%s,%%%s,%%%s,%%%s),%%%s\n",regname[u1],regname[l1],regname[u2],regname[l2],regname[rt]);
-  assert(u1!=rt);
-  assert(u2!=rt);
-  emit_cmp(l1,l2);
-  emit_movimm(0,rt);
-  emit_sbcs(u1,u2,HOST_TEMPREG);
-  emit_cmovb_imm(1,rt);
-}
 
-void emit_call(int a)
+static void emit_call(const void *a_)
 {
-  assem_debug("bl %x (%x+%x)\n",a,(int)out,a-(int)out-8);
+  int a = (int)a_;
+  assem_debug("bl %x (%x+%x)%s\n",a,(int)out,a-(int)out-8,func_name(a));
   u_int offset=genjmp(a);
   output_w32(0xeb000000|offset);
 }
-void emit_jmp(int a)
+
+static void emit_jmp(const void *a_)
 {
-  assem_debug("b %x (%x+%x)\n",a,(int)out,a-(int)out-8);
+  int a = (int)a_;
+  assem_debug("b %x (%x+%x)%s\n",a,(int)out,a-(int)out-8,func_name(a));
   u_int offset=genjmp(a);
   output_w32(0xea000000|offset);
 }
-void emit_jne(int a)
+
+static void emit_jne(const void *a_)
 {
+  int a = (int)a_;
   assem_debug("bne %x\n",a);
   u_int offset=genjmp(a);
   output_w32(0x1a000000|offset);
 }
-void emit_jeq(int a)
+
+static void emit_jeq(int a)
 {
   assem_debug("beq %x\n",a);
   u_int offset=genjmp(a);
   output_w32(0x0a000000|offset);
 }
-void emit_js(int a)
+
+static void emit_js(int a)
 {
   assem_debug("bmi %x\n",a);
   u_int offset=genjmp(a);
   output_w32(0x4a000000|offset);
 }
-void emit_jns(int a)
+
+static void emit_jns(int a)
 {
   assem_debug("bpl %x\n",a);
   u_int offset=genjmp(a);
   output_w32(0x5a000000|offset);
 }
-void emit_jl(int a)
+
+static void emit_jl(int a)
 {
   assem_debug("blt %x\n",a);
   u_int offset=genjmp(a);
   output_w32(0xba000000|offset);
 }
-void emit_jge(int a)
+
+static void emit_jge(int a)
 {
   assem_debug("bge %x\n",a);
   u_int offset=genjmp(a);
   output_w32(0xaa000000|offset);
 }
-void emit_jno(int a)
+
+static void emit_jno(int a)
 {
   assem_debug("bvc %x\n",a);
   u_int offset=genjmp(a);
   output_w32(0x7a000000|offset);
 }
-void emit_jc(int a)
+
+static void emit_jc(int a)
 {
   assem_debug("bcs %x\n",a);
   u_int offset=genjmp(a);
   output_w32(0x2a000000|offset);
 }
-void emit_jcc(int a)
+
+static void emit_jcc(void *a_)
 {
+  int a = (int)a_;
   assem_debug("bcc %x\n",a);
   u_int offset=genjmp(a);
   output_w32(0x3a000000|offset);
 }
 
-void emit_callreg(u_int r)
+static void emit_callreg(u_int r)
 {
   assert(r<15);
   assem_debug("blx %s\n",regname[r]);
   output_w32(0xe12fff30|r);
 }
-void emit_jmpreg(u_int r)
+
+static void emit_jmpreg(u_int r)
 {
   assem_debug("mov pc,%s\n",regname[r]);
   output_w32(0xe1a00000|rd_rn_rm(15,0,r));
 }
 
-void emit_readword_indexed(int offset, int rs, int rt)
+static void emit_ret(void)
+{
+  emit_jmpreg(14);
+}
+
+static void emit_readword_indexed(int offset, int rs, int rt)
 {
   assert(offset>-4096&&offset<4096);
   assem_debug("ldr %s,%s+%d\n",regname[rt],regname[rs],offset);
@@ -1689,57 +1155,44 @@ void emit_readword_indexed(int offset, int rs, int rt)
     output_w32(0xe5100000|rd_rn_rm(rt,rs,0)|(-offset));
   }
 }
-void emit_readword_dualindexedx4(int rs1, int rs2, int rt)
+
+static void emit_readword_dualindexedx4(int rs1, int rs2, int rt)
 {
   assem_debug("ldr %s,%s,%s lsl #2\n",regname[rt],regname[rs1],regname[rs2]);
   output_w32(0xe7900000|rd_rn_rm(rt,rs1,rs2)|0x100);
 }
-void emit_ldrcc_dualindexed(int rs1, int rs2, int rt)
+
+static void emit_ldrcc_dualindexed(int rs1, int rs2, int rt)
 {
   assem_debug("ldrcc %s,%s,%s\n",regname[rt],regname[rs1],regname[rs2]);
   output_w32(0x37900000|rd_rn_rm(rt,rs1,rs2));
 }
-void emit_ldrccb_dualindexed(int rs1, int rs2, int rt)
+
+static void emit_ldrccb_dualindexed(int rs1, int rs2, int rt)
 {
   assem_debug("ldrccb %s,%s,%s\n",regname[rt],regname[rs1],regname[rs2]);
   output_w32(0x37d00000|rd_rn_rm(rt,rs1,rs2));
 }
-void emit_ldrccsb_dualindexed(int rs1, int rs2, int rt)
+
+static void emit_ldrccsb_dualindexed(int rs1, int rs2, int rt)
 {
   assem_debug("ldrccsb %s,%s,%s\n",regname[rt],regname[rs1],regname[rs2]);
   output_w32(0x319000d0|rd_rn_rm(rt,rs1,rs2));
 }
-void emit_ldrcch_dualindexed(int rs1, int rs2, int rt)
+
+static void emit_ldrcch_dualindexed(int rs1, int rs2, int rt)
 {
   assem_debug("ldrcch %s,%s,%s\n",regname[rt],regname[rs1],regname[rs2]);
   output_w32(0x319000b0|rd_rn_rm(rt,rs1,rs2));
 }
-void emit_ldrccsh_dualindexed(int rs1, int rs2, int rt)
+
+static void emit_ldrccsh_dualindexed(int rs1, int rs2, int rt)
 {
   assem_debug("ldrccsh %s,%s,%s\n",regname[rt],regname[rs1],regname[rs2]);
   output_w32(0x319000f0|rd_rn_rm(rt,rs1,rs2));
 }
-void emit_readword_indexed_tlb(int addr, int rs, int map, int rt)
-{
-  if(map<0) emit_readword_indexed(addr, rs, rt);
-  else {
-    assert(addr==0);
-    emit_readword_dualindexedx4(rs, map, rt);
-  }
-}
-void emit_readdword_indexed_tlb(int addr, int rs, int map, int rh, int rl)
-{
-  if(map<0) {
-    if(rh>=0) emit_readword_indexed(addr, rs, rh);
-    emit_readword_indexed(addr+4, rs, rl);
-  }else{
-    assert(rh!=rs);
-    if(rh>=0) emit_readword_indexed_tlb(addr, rs, map, rh);
-    emit_addimm(map,1,map);
-    emit_readword_indexed_tlb(addr, rs, map, rl);
-  }
-}
-void emit_movsbl_indexed(int offset, int rs, int rt)
+
+static void emit_movsbl_indexed(int offset, int rs, int rt)
 {
   assert(offset>-256&&offset<256);
   assem_debug("ldrsb %s,%s+%d\n",regname[rt],regname[rs],offset);
@@ -1749,23 +1202,8 @@ void emit_movsbl_indexed(int offset, int rs, int rt)
     output_w32(0xe15000d0|rd_rn_rm(rt,rs,0)|(((-offset)<<4)&0xf00)|((-offset)&0xf));
   }
 }
-void emit_movsbl_indexed_tlb(int addr, int rs, int map, int rt)
-{
-  if(map<0) emit_movsbl_indexed(addr, rs, rt);
-  else {
-    if(addr==0) {
-      emit_shlimm(map,2,map);
-      assem_debug("ldrsb %s,%s+%s\n",regname[rt],regname[rs],regname[map]);
-      output_w32(0xe19000d0|rd_rn_rm(rt,rs,map));
-    }else{
-      assert(addr>-256&&addr<256);
-      assem_debug("add %s,%s,%s,lsl #2\n",regname[rt],regname[rs],regname[map]);
-      output_w32(0xe0800000|rd_rn_rm(rt,rs,map)|(2<<7));
-      emit_movsbl_indexed(addr, rt, rt);
-    }
-  }
-}
-void emit_movswl_indexed(int offset, int rs, int rt)
+
+static void emit_movswl_indexed(int offset, int rs, int rt)
 {
   assert(offset>-256&&offset<256);
   assem_debug("ldrsh %s,%s+%d\n",regname[rt],regname[rs],offset);
@@ -1775,7 +1213,8 @@ void emit_movswl_indexed(int offset, int rs, int rt)
     output_w32(0xe15000f0|rd_rn_rm(rt,rs,0)|(((-offset)<<4)&0xf00)|((-offset)&0xf));
   }
 }
-void emit_movzbl_indexed(int offset, int rs, int rt)
+
+static void emit_movzbl_indexed(int offset, int rs, int rt)
 {
   assert(offset>-4096&&offset<4096);
   assem_debug("ldrb %s,%s+%d\n",regname[rt],regname[rs],offset);
@@ -1785,24 +1224,8 @@ void emit_movzbl_indexed(int offset, int rs, int rt)
     output_w32(0xe5500000|rd_rn_rm(rt,rs,0)|(-offset));
   }
 }
-void emit_movzbl_dualindexedx4(int rs1, int rs2, int rt)
-{
-  assem_debug("ldrb %s,%s,%s lsl #2\n",regname[rt],regname[rs1],regname[rs2]);
-  output_w32(0xe7d00000|rd_rn_rm(rt,rs1,rs2)|0x100);
-}
-void emit_movzbl_indexed_tlb(int addr, int rs, int map, int rt)
-{
-  if(map<0) emit_movzbl_indexed(addr, rs, rt);
-  else {
-    if(addr==0) {
-      emit_movzbl_dualindexedx4(rs, map, rt);
-    }else{
-      emit_addimm(rs,addr,rt);
-      emit_movzbl_dualindexedx4(rt, map, rt);
-    }
-  }
-}
-void emit_movzwl_indexed(int offset, int rs, int rt)
+
+static void emit_movzwl_indexed(int offset, int rs, int rt)
 {
   assert(offset>-256&&offset<256);
   assem_debug("ldrh %s,%s+%d\n",regname[rt],regname[rs],offset);
@@ -1812,6 +1235,7 @@ void emit_movzwl_indexed(int offset, int rs, int rt)
     output_w32(0xe15000b0|rd_rn_rm(rt,rs,0)|(((-offset)<<4)&0xf00)|((-offset)&0xf));
   }
 }
+
 static void emit_ldrd(int offset, int rs, int rt)
 {
   assert(offset>-256&&offset<256);
@@ -1822,43 +1246,16 @@ static void emit_ldrd(int offset, int rs, int rt)
     output_w32(0xe14000d0|rd_rn_rm(rt,rs,0)|(((-offset)<<4)&0xf00)|((-offset)&0xf));
   }
 }
-void emit_readword(int addr, int rt)
+
+static void emit_readword(void *addr, int rt)
 {
-  u_int offset = addr-(u_int)&dynarec_local;
+  uintptr_t offset = (u_char *)addr - (u_char *)&dynarec_local;
   assert(offset<4096);
   assem_debug("ldr %s,fp+%d\n",regname[rt],offset);
   output_w32(0xe5900000|rd_rn_rm(rt,FP,0)|offset);
 }
-void emit_movsbl(int addr, int rt)
-{
-  u_int offset = addr-(u_int)&dynarec_local;
-  assert(offset<256);
-  assem_debug("ldrsb %s,fp+%d\n",regname[rt],offset);
-  output_w32(0xe1d000d0|rd_rn_rm(rt,FP,0)|((offset<<4)&0xf00)|(offset&0xf));
-}
-void emit_movswl(int addr, int rt)
-{
-  u_int offset = addr-(u_int)&dynarec_local;
-  assert(offset<256);
-  assem_debug("ldrsh %s,fp+%d\n",regname[rt],offset);
-  output_w32(0xe1d000f0|rd_rn_rm(rt,FP,0)|((offset<<4)&0xf00)|(offset&0xf));
-}
-void emit_movzbl(int addr, int rt)
-{
-  u_int offset = addr-(u_int)&dynarec_local;
-  assert(offset<4096);
-  assem_debug("ldrb %s,fp+%d\n",regname[rt],offset);
-  output_w32(0xe5d00000|rd_rn_rm(rt,FP,0)|offset);
-}
-void emit_movzwl(int addr, int rt)
-{
-  u_int offset = addr-(u_int)&dynarec_local;
-  assert(offset<256);
-  assem_debug("ldrh %s,fp+%d\n",regname[rt],offset);
-  output_w32(0xe1d000b0|rd_rn_rm(rt,FP,0)|((offset<<4)&0xf00)|(offset&0xf));
-}
 
-void emit_writeword_indexed(int rt, int offset, int rs)
+static void emit_writeword_indexed(int rt, int offset, int rs)
 {
   assert(offset>-4096&&offset<4096);
   assem_debug("str %s,%s+%d\n",regname[rt],regname[rs],offset);
@@ -1868,36 +1265,8 @@ void emit_writeword_indexed(int rt, int offset, int rs)
     output_w32(0xe5000000|rd_rn_rm(rt,rs,0)|(-offset));
   }
 }
-void emit_writeword_dualindexedx4(int rt, int rs1, int rs2)
-{
-  assem_debug("str %s,%s,%s lsl #2\n",regname[rt],regname[rs1],regname[rs2]);
-  output_w32(0xe7800000|rd_rn_rm(rt,rs1,rs2)|0x100);
-}
-void emit_writeword_indexed_tlb(int rt, int addr, int rs, int map, int temp)
-{
-  if(map<0) emit_writeword_indexed(rt, addr, rs);
-  else {
-    assert(addr==0);
-    emit_writeword_dualindexedx4(rt, rs, map);
-  }
-}
-void emit_writedword_indexed_tlb(int rh, int rl, int addr, int rs, int map, int temp)
-{
-  if(map<0) {
-    if(rh>=0) emit_writeword_indexed(rh, addr, rs);
-    emit_writeword_indexed(rl, addr+4, rs);
-  }else{
-    assert(rh>=0);
-    if(temp!=rs) emit_addimm(map,1,temp);
-    emit_writeword_indexed_tlb(rh, addr, rs, map, temp);
-    if(temp!=rs) emit_writeword_indexed_tlb(rl, addr, rs, temp, temp);
-    else {
-      emit_addimm(rs,4,rs);
-      emit_writeword_indexed_tlb(rl, addr, rs, map, temp);
-    }
-  }
-}
-void emit_writehword_indexed(int rt, int offset, int rs)
+
+static void emit_writehword_indexed(int rt, int offset, int rs)
 {
   assert(offset>-256&&offset<256);
   assem_debug("strh %s,%s+%d\n",regname[rt],regname[rs],offset);
@@ -1907,7 +1276,8 @@ void emit_writehword_indexed(int rt, int offset, int rs)
     output_w32(0xe14000b0|rd_rn_rm(rt,rs,0)|(((-offset)<<4)&0xf00)|((-offset)&0xf));
   }
 }
-void emit_writebyte_indexed(int rt, int offset, int rs)
+
+static void emit_writebyte_indexed(int rt, int offset, int rs)
 {
   assert(offset>-4096&&offset<4096);
   assem_debug("strb %s,%s+%d\n",regname[rt],regname[rs],offset);
@@ -1917,61 +1287,34 @@ void emit_writebyte_indexed(int rt, int offset, int rs)
     output_w32(0xe5400000|rd_rn_rm(rt,rs,0)|(-offset));
   }
 }
-void emit_writebyte_dualindexedx4(int rt, int rs1, int rs2)
-{
-  assem_debug("strb %s,%s,%s lsl #2\n",regname[rt],regname[rs1],regname[rs2]);
-  output_w32(0xe7c00000|rd_rn_rm(rt,rs1,rs2)|0x100);
-}
-void emit_writebyte_indexed_tlb(int rt, int addr, int rs, int map, int temp)
-{
-  if(map<0) emit_writebyte_indexed(rt, addr, rs);
-  else {
-    if(addr==0) {
-      emit_writebyte_dualindexedx4(rt, rs, map);
-    }else{
-      emit_addimm(rs,addr,temp);
-      emit_writebyte_dualindexedx4(rt, temp, map);
-    }
-  }
-}
-void emit_strcc_dualindexed(int rs1, int rs2, int rt)
+
+static void emit_strcc_dualindexed(int rs1, int rs2, int rt)
 {
   assem_debug("strcc %s,%s,%s\n",regname[rt],regname[rs1],regname[rs2]);
   output_w32(0x37800000|rd_rn_rm(rt,rs1,rs2));
 }
-void emit_strccb_dualindexed(int rs1, int rs2, int rt)
+
+static void emit_strccb_dualindexed(int rs1, int rs2, int rt)
 {
   assem_debug("strccb %s,%s,%s\n",regname[rt],regname[rs1],regname[rs2]);
   output_w32(0x37c00000|rd_rn_rm(rt,rs1,rs2));
 }
-void emit_strcch_dualindexed(int rs1, int rs2, int rt)
+
+static void emit_strcch_dualindexed(int rs1, int rs2, int rt)
 {
   assem_debug("strcch %s,%s,%s\n",regname[rt],regname[rs1],regname[rs2]);
   output_w32(0x318000b0|rd_rn_rm(rt,rs1,rs2));
 }
-void emit_writeword(int rt, int addr)
+
+static void emit_writeword(int rt, void *addr)
 {
-  u_int offset = addr-(u_int)&dynarec_local;
+  uintptr_t offset = (u_char *)addr - (u_char *)&dynarec_local;
   assert(offset<4096);
   assem_debug("str %s,fp+%d\n",regname[rt],offset);
   output_w32(0xe5800000|rd_rn_rm(rt,FP,0)|offset);
 }
-void emit_writehword(int rt, int addr)
-{
-  u_int offset = addr-(u_int)&dynarec_local;
-  assert(offset<256);
-  assem_debug("strh %s,fp+%d\n",regname[rt],offset);
-  output_w32(0xe1c000b0|rd_rn_rm(rt,FP,0)|((offset<<4)&0xf00)|(offset&0xf));
-}
-void emit_writebyte(int rt, int addr)
-{
-  u_int offset = addr-(u_int)&dynarec_local;
-  assert(offset<4096);
-  assem_debug("strb %s,fp+%d\n",regname[rt],offset);
-  output_w32(0xe5c00000|rd_rn_rm(rt,FP,0)|offset);
-}
 
-void emit_umull(u_int rs1, u_int rs2, u_int hi, u_int lo)
+static void emit_umull(u_int rs1, u_int rs2, u_int hi, u_int lo)
 {
   assem_debug("umull %s, %s, %s, %s\n",regname[lo],regname[hi],regname[rs1],regname[rs2]);
   assert(rs1<16);
@@ -1980,7 +1323,8 @@ void emit_umull(u_int rs1, u_int rs2, u_int hi, u_int lo)
   assert(lo<16);
   output_w32(0xe0800090|(hi<<16)|(lo<<12)|(rs2<<8)|rs1);
 }
-void emit_smull(u_int rs1, u_int rs2, u_int hi, u_int lo)
+
+static void emit_smull(u_int rs1, u_int rs2, u_int hi, u_int lo)
 {
   assem_debug("smull %s, %s, %s, %s\n",regname[lo],regname[hi],regname[rs1],regname[rs2]);
   assert(rs1<16);
@@ -1990,19 +1334,19 @@ void emit_smull(u_int rs1, u_int rs2, u_int hi, u_int lo)
   output_w32(0xe0c00090|(hi<<16)|(lo<<12)|(rs2<<8)|rs1);
 }
 
-void emit_clz(int rs,int rt)
+static void emit_clz(int rs,int rt)
 {
   assem_debug("clz %s,%s\n",regname[rt],regname[rs]);
   output_w32(0xe16f0f10|rd_rn_rm(rt,0,rs));
 }
 
-void emit_subcs(int rs1,int rs2,int rt)
+static void emit_subcs(int rs1,int rs2,int rt)
 {
   assem_debug("subcs %s,%s,%s\n",regname[rt],regname[rs1],regname[rs2]);
   output_w32(0x20400000|rd_rn_rm(rt,rs1,rs2));
 }
 
-void emit_shrcc_imm(int rs,u_int imm,int rt)
+static void emit_shrcc_imm(int rs,u_int imm,int rt)
 {
   assert(imm>0);
   assert(imm<32);
@@ -2010,7 +1354,7 @@ void emit_shrcc_imm(int rs,u_int imm,int rt)
   output_w32(0x31a00000|rd_rn_rm(rt,0,rs)|0x20|(imm<<7));
 }
 
-void emit_shrne_imm(int rs,u_int imm,int rt)
+static void emit_shrne_imm(int rs,u_int imm,int rt)
 {
   assert(imm>0);
   assert(imm<32);
@@ -2018,73 +1362,37 @@ void emit_shrne_imm(int rs,u_int imm,int rt)
   output_w32(0x11a00000|rd_rn_rm(rt,0,rs)|0x20|(imm<<7));
 }
 
-void emit_negmi(int rs, int rt)
+static void emit_negmi(int rs, int rt)
 {
   assem_debug("rsbmi %s,%s,#0\n",regname[rt],regname[rs]);
   output_w32(0x42600000|rd_rn_rm(rt,rs,0));
 }
 
-void emit_negsmi(int rs, int rt)
+static void emit_negsmi(int rs, int rt)
 {
   assem_debug("rsbsmi %s,%s,#0\n",regname[rt],regname[rs]);
   output_w32(0x42700000|rd_rn_rm(rt,rs,0));
 }
 
-void emit_orreq(u_int rs1,u_int rs2,u_int rt)
-{
-  assem_debug("orreq %s,%s,%s\n",regname[rt],regname[rs1],regname[rs2]);
-  output_w32(0x01800000|rd_rn_rm(rt,rs1,rs2));
-}
-
-void emit_orrne(u_int rs1,u_int rs2,u_int rt)
-{
-  assem_debug("orrne %s,%s,%s\n",regname[rt],regname[rs1],regname[rs2]);
-  output_w32(0x11800000|rd_rn_rm(rt,rs1,rs2));
-}
-
-void emit_bic_lsl(u_int rs1,u_int rs2,u_int shift,u_int rt)
+static void emit_bic_lsl(u_int rs1,u_int rs2,u_int shift,u_int rt)
 {
   assem_debug("bic %s,%s,%s lsl %s\n",regname[rt],regname[rs1],regname[rs2],regname[shift]);
   output_w32(0xe1C00000|rd_rn_rm(rt,rs1,rs2)|0x10|(shift<<8));
 }
 
-void emit_biceq_lsl(u_int rs1,u_int rs2,u_int shift,u_int rt)
-{
-  assem_debug("biceq %s,%s,%s lsl %s\n",regname[rt],regname[rs1],regname[rs2],regname[shift]);
-  output_w32(0x01C00000|rd_rn_rm(rt,rs1,rs2)|0x10|(shift<<8));
-}
-
-void emit_bicne_lsl(u_int rs1,u_int rs2,u_int shift,u_int rt)
-{
-  assem_debug("bicne %s,%s,%s lsl %s\n",regname[rt],regname[rs1],regname[rs2],regname[shift]);
-  output_w32(0x11C00000|rd_rn_rm(rt,rs1,rs2)|0x10|(shift<<8));
-}
-
-void emit_bic_lsr(u_int rs1,u_int rs2,u_int shift,u_int rt)
+static void emit_bic_lsr(u_int rs1,u_int rs2,u_int shift,u_int rt)
 {
   assem_debug("bic %s,%s,%s lsr %s\n",regname[rt],regname[rs1],regname[rs2],regname[shift]);
   output_w32(0xe1C00000|rd_rn_rm(rt,rs1,rs2)|0x30|(shift<<8));
 }
 
-void emit_biceq_lsr(u_int rs1,u_int rs2,u_int shift,u_int rt)
-{
-  assem_debug("biceq %s,%s,%s lsr %s\n",regname[rt],regname[rs1],regname[rs2],regname[shift]);
-  output_w32(0x01C00000|rd_rn_rm(rt,rs1,rs2)|0x30|(shift<<8));
-}
-
-void emit_bicne_lsr(u_int rs1,u_int rs2,u_int shift,u_int rt)
-{
-  assem_debug("bicne %s,%s,%s lsr %s\n",regname[rt],regname[rs1],regname[rs2],regname[shift]);
-  output_w32(0x11C00000|rd_rn_rm(rt,rs1,rs2)|0x30|(shift<<8));
-}
-
-void emit_teq(int rs, int rt)
+static void emit_teq(int rs, int rt)
 {
   assem_debug("teq %s,%s\n",regname[rs],regname[rt]);
   output_w32(0xe1300000|rd_rn_rm(0,rs,rt));
 }
 
-void emit_rsbimm(int rs, int imm, int rt)
+static void emit_rsbimm(int rs, int imm, int rt)
 {
   u_int armval;
   genimm_checked(imm,&armval);
@@ -2093,7 +1401,7 @@ void emit_rsbimm(int rs, int imm, int rt)
 }
 
 // Load 2 immediates optimizing for small code size
-void emit_mov2imm_compact(int imm1,u_int rt1,int imm2,u_int rt2)
+static void emit_mov2imm_compact(int imm1,u_int rt1,int imm2,u_int rt2)
 {
   emit_movimm(imm1,rt1);
   u_int armval;
@@ -2109,7 +1417,7 @@ void emit_mov2imm_compact(int imm1,u_int rt1,int imm2,u_int rt2)
 
 // Conditionally select one of two immediates, optimizing for small code size
 // This will only be called if HAVE_CMOV_IMM is defined
-void emit_cmov2imm_e_ne_compact(int imm1,int imm2,u_int rt)
+static void emit_cmov2imm_e_ne_compact(int imm1,int imm2,u_int rt)
 {
   u_int armval;
   if(genimm(imm2-imm1,&armval)) {
@@ -2143,7 +1451,7 @@ void emit_cmov2imm_e_ne_compact(int imm1,int imm2,u_int rt)
 }
 
 // special case for checking invalid_code
-void emit_cmpmem_indexedsr12_reg(int base,int r,int imm)
+static void emit_cmpmem_indexedsr12_reg(int base,int r,int imm)
 {
   assert(imm<128&&imm>=0);
   assert(r>=0&&r<16);
@@ -2152,7 +1460,7 @@ void emit_cmpmem_indexedsr12_reg(int base,int r,int imm)
   emit_cmpimm(HOST_TEMPREG,imm);
 }
 
-void emit_callne(int a)
+static void emit_callne(int a)
 {
   assem_debug("blne %x\n",a);
   u_int offset=genjmp(a);
@@ -2160,61 +1468,21 @@ void emit_callne(int a)
 }
 
 // Used to preload hash table entries
-void emit_prefetchreg(int r)
+static unused void emit_prefetchreg(int r)
 {
   assem_debug("pld %s\n",regname[r]);
   output_w32(0xf5d0f000|rd_rn_rm(0,r,0));
 }
 
 // Special case for mini_ht
-void emit_ldreq_indexed(int rs, u_int offset, int rt)
+static void emit_ldreq_indexed(int rs, u_int offset, int rt)
 {
   assert(offset<4096);
   assem_debug("ldreq %s,[%s, #%d]\n",regname[rt],regname[rs],offset);
   output_w32(0x05900000|rd_rn_rm(rt,rs,0)|offset);
 }
 
-void emit_bicne_imm(int rs,int imm,int rt)
-{
-  u_int armval;
-  genimm_checked(imm,&armval);
-  assem_debug("bicne %s,%s,#%d\n",regname[rt],regname[rs],imm);
-  output_w32(0x13c00000|rd_rn_rm(rt,rs,0)|armval);
-}
-
-void emit_biccs_imm(int rs,int imm,int rt)
-{
-  u_int armval;
-  genimm_checked(imm,&armval);
-  assem_debug("biccs %s,%s,#%d\n",regname[rt],regname[rs],imm);
-  output_w32(0x23c00000|rd_rn_rm(rt,rs,0)|armval);
-}
-
-void emit_bicvc_imm(int rs,int imm,int rt)
-{
-  u_int armval;
-  genimm_checked(imm,&armval);
-  assem_debug("bicvc %s,%s,#%d\n",regname[rt],regname[rs],imm);
-  output_w32(0x73c00000|rd_rn_rm(rt,rs,0)|armval);
-}
-
-void emit_bichi_imm(int rs,int imm,int rt)
-{
-  u_int armval;
-  genimm_checked(imm,&armval);
-  assem_debug("bichi %s,%s,#%d\n",regname[rt],regname[rs],imm);
-  output_w32(0x83c00000|rd_rn_rm(rt,rs,0)|armval);
-}
-
-void emit_orrvs_imm(int rs,int imm,int rt)
-{
-  u_int armval;
-  genimm_checked(imm,&armval);
-  assem_debug("orrvs %s,%s,#%d\n",regname[rt],regname[rs],imm);
-  output_w32(0x63800000|rd_rn_rm(rt,rs,0)|armval);
-}
-
-void emit_orrne_imm(int rs,int imm,int rt)
+static void emit_orrne_imm(int rs,int imm,int rt)
 {
   u_int armval;
   genimm_checked(imm,&armval);
@@ -2222,7 +1490,7 @@ void emit_orrne_imm(int rs,int imm,int rt)
   output_w32(0x13800000|rd_rn_rm(rt,rs,0)|armval);
 }
 
-void emit_andne_imm(int rs,int imm,int rt)
+static void emit_andne_imm(int rs,int imm,int rt)
 {
   u_int armval;
   genimm_checked(imm,&armval);
@@ -2230,7 +1498,7 @@ void emit_andne_imm(int rs,int imm,int rt)
   output_w32(0x12000000|rd_rn_rm(rt,rs,0)|armval);
 }
 
-void emit_addpl_imm(int rs,int imm,int rt)
+static unused void emit_addpl_imm(int rs,int imm,int rt)
 {
   u_int armval;
   genimm_checked(imm,&armval);
@@ -2238,7 +1506,7 @@ void emit_addpl_imm(int rs,int imm,int rt)
   output_w32(0x52800000|rd_rn_rm(rt,rs,0)|armval);
 }
 
-void emit_jno_unlikely(int a)
+static void emit_jno_unlikely(int a)
 {
   //emit_jno(a);
   assem_debug("addvc pc,pc,#? (%x)\n",/*a-(int)out-8,*/a);
@@ -2256,6 +1524,7 @@ static void save_regs_all(u_int reglist)
   assem_debug("}\n");
   output_w32(0xe88b0000|reglist);
 }
+
 static void restore_regs_all(u_int reglist)
 {
   int i;
@@ -2267,12 +1536,14 @@ static void restore_regs_all(u_int reglist)
   assem_debug("}\n");
   output_w32(0xe89b0000|reglist);
 }
+
 // Save registers before function call
 static void save_regs(u_int reglist)
 {
   reglist&=CALLER_SAVE_REGS; // only save the caller-save registers, r0-r3, r12
   save_regs_all(reglist);
 }
+
 // Restore registers after function call
 static void restore_regs(u_int reglist)
 {
@@ -2282,7 +1553,7 @@ static void restore_regs(u_int reglist)
 
 /* Stubs/epilogue */
 
-void literal_pool(int n)
+static void literal_pool(int n)
 {
   if(!literalcount) return;
   if(n) {
@@ -2314,46 +1585,49 @@ void literal_pool(int n)
   literalcount=0;
 }
 
-void literal_pool_jumpover(int n)
+static void literal_pool_jumpover(int n)
 {
   if(!literalcount) return;
   if(n) {
     if((int)out-literals[0][0]<4096-n) return;
   }
-  int jaddr=(int)out;
+  void *jaddr = out;
   emit_jmp(0);
   literal_pool(0);
-  set_jump_target(jaddr,(int)out);
+  set_jump_target(jaddr, out);
 }
 
-emit_extjump2(u_int addr, int target, int linker)
+static void emit_extjump2(u_char *addr, int target, void *linker)
 {
   u_char *ptr=(u_char *)addr;
   assert((ptr[3]&0x0e)==0xa);
+  (void)ptr;
+
   emit_loadlp(target,0);
-  emit_loadlp(addr,1);
-  assert(addr>=BASE_ADDR&&addr<(BASE_ADDR+(1<<TARGET_SIZE_2)));
+  emit_loadlp((u_int)addr,1);
+  assert(addr>=translation_cache&&addr<(translation_cache+(1<<TARGET_SIZE_2)));
   //assert((target>=0x80000000&&target<0x80800000)||(target>0xA4000000&&target<0xA4001000));
 //DEBUG >
 #ifdef DEBUG_CYCLE_COUNT
-  emit_readword((int)&last_count,ECX);
+  emit_readword(&last_count,ECX);
   emit_add(HOST_CCREG,ECX,HOST_CCREG);
-  emit_readword((int)&next_interupt,ECX);
-  emit_writeword(HOST_CCREG,(int)&Count);
+  emit_readword(&next_interupt,ECX);
+  emit_writeword(HOST_CCREG,&Count);
   emit_sub(HOST_CCREG,ECX,HOST_CCREG);
-  emit_writeword(ECX,(int)&last_count);
+  emit_writeword(ECX,&last_count);
 #endif
 //DEBUG <
   emit_jmp(linker);
 }
 
-emit_extjump(int addr, int target)
+static void emit_extjump(void *addr, int target)
 {
-  emit_extjump2(addr, target, (int)dyna_linker);
+  emit_extjump2(addr, target, dyna_linker);
 }
-emit_extjump_ds(int addr, int target)
+
+static void emit_extjump_ds(void *addr, int target)
 {
-  emit_extjump2(addr, target, (int)dyna_linker_ds);
+  emit_extjump2(addr, target, dyna_linker_ds);
 }
 
 // put rt_val into rt, potentially making use of rs with value rs_val
@@ -2417,7 +1691,7 @@ static void pass_args(int a0, int a1)
   }
 }
 
-static void mov_loadtype_adj(int type,int rs,int rt)
+static void mov_loadtype_adj(enum stub_type type,int rs,int rt)
 {
   switch(type) {
     case LOADB_STUB:  emit_signextend8(rs,rt); break;
@@ -2432,29 +1706,26 @@ static void mov_loadtype_adj(int type,int rs,int rt)
 #include "pcsxmem.h"
 #include "pcsxmem_inline.c"
 
-do_readstub(int n)
+static void do_readstub(int n)
 {
-  assem_debug("do_readstub %x\n",start+stubs[n][3]*4);
+  assem_debug("do_readstub %x\n",start+stubs[n].a*4);
   literal_pool(256);
-  set_jump_target(stubs[n][1],(int)out);
-  int type=stubs[n][0];
-  int i=stubs[n][3];
-  int rs=stubs[n][4];
-  struct regstat *i_regs=(struct regstat *)stubs[n][5];
-  u_int reglist=stubs[n][7];
+  set_jump_target(stubs[n].addr, out);
+  enum stub_type type=stubs[n].type;
+  int i=stubs[n].a;
+  int rs=stubs[n].b;
+  struct regstat *i_regs=(struct regstat *)stubs[n].c;
+  u_int reglist=stubs[n].e;
   signed char *i_regmap=i_regs->regmap;
-  int addr=get_reg(i_regmap,AGEN1+(i&1));
-  int rth,rt;
-  int ds;
+  int rt;
   if(itype[i]==C1LS||itype[i]==C2LS||itype[i]==LOADLR) {
-    rth=get_reg(i_regmap,FTEMP|64);
     rt=get_reg(i_regmap,FTEMP);
   }else{
-    rth=get_reg(i_regmap,rt1[i]|64);
     rt=get_reg(i_regmap,rt1[i]);
   }
   assert(rs>=0);
-  int r,temp=-1,temp2=HOST_TEMPREG,regs_saved=0,restore_jump=0;
+  int r,temp=-1,temp2=HOST_TEMPREG,regs_saved=0;
+  void *restore_jump = NULL;
   reglist|=(1<<rs);
   for(r=0;r<=12;r++) {
     if(((1<<r)&0x13ff)&&((1<<r)&reglist)==0) {
@@ -2470,7 +1741,7 @@ do_readstub(int n)
   }
   if((regs_saved||(reglist&2)==0)&&temp!=1&&rs!=1)
     temp2=1;
-  emit_readword((int)&mem_rtab,temp);
+  emit_readword(&mem_rtab,temp);
   emit_shrimm(rs,12,temp2);
   emit_readword_dualindexedx4(temp,temp2,temp2);
   emit_lsls_imm(temp2,1,temp2);
@@ -2481,49 +1752,50 @@ do_readstub(int n)
       case LOADH_STUB:  emit_ldrccsh_dualindexed(temp2,rs,rt); break;
       case LOADHU_STUB: emit_ldrcch_dualindexed(temp2,rs,rt); break;
       case LOADW_STUB:  emit_ldrcc_dualindexed(temp2,rs,rt); break;
+      default: assert(0);
     }
   }
   if(regs_saved) {
-    restore_jump=(int)out;
+    restore_jump=out;
     emit_jcc(0); // jump to reg restore
   }
   else
-    emit_jcc(stubs[n][2]); // return address
+    emit_jcc(stubs[n].retaddr); // return address
 
   if(!regs_saved)
     save_regs(reglist);
-  int handler=0;
+  void *handler=NULL;
   if(type==LOADB_STUB||type==LOADBU_STUB)
-    handler=(int)jump_handler_read8;
+    handler=jump_handler_read8;
   if(type==LOADH_STUB||type==LOADHU_STUB)
-    handler=(int)jump_handler_read16;
+    handler=jump_handler_read16;
   if(type==LOADW_STUB)
-    handler=(int)jump_handler_read32;
-  assert(handler!=0);
+    handler=jump_handler_read32;
+  assert(handler);
   pass_args(rs,temp2);
   int cc=get_reg(i_regmap,CCREG);
   if(cc<0)
     emit_loadreg(CCREG,2);
-  emit_addimm(cc<0?2:cc,CLOCK_ADJUST((int)stubs[n][6]+1),2);
+  emit_addimm(cc<0?2:cc,CLOCK_ADJUST((int)stubs[n].d+1),2);
   emit_call(handler);
   if(itype[i]==C1LS||itype[i]==C2LS||(rt>=0&&rt1[i]!=0)) {
     mov_loadtype_adj(type,0,rt);
   }
   if(restore_jump)
-    set_jump_target(restore_jump,(int)out);
+    set_jump_target(restore_jump, out);
   restore_regs(reglist);
-  emit_jmp(stubs[n][2]); // return address
+  emit_jmp(stubs[n].retaddr); // return address
 }
 
 // return memhandler, or get directly accessable address and return 0
-u_int get_direct_memhandler(void *table,u_int addr,int type,u_int *addr_host)
+static void *get_direct_memhandler(void *table,u_int addr,enum stub_type type,u_int *addr_host)
 {
   u_int l1,l2=0;
   l1=((u_int *)table)[addr>>12];
   if((l1&(1<<31))==0) {
     u_int v=l1<<1;
     *addr_host=v+addr;
-    return 0;
+    return NULL;
   }
   else {
     l1<<=1;
@@ -2536,25 +1808,25 @@ u_int get_direct_memhandler(void *table,u_int addr,int type,u_int *addr_host)
     if((l2&(1<<31))==0) {
       u_int v=l2<<1;
       *addr_host=v+(addr&0xfff);
-      return 0;
+      return NULL;
     }
-    return l2<<1;
+    return (void *)(l2<<1);
   }
 }
 
-inline_readstub(int type, int i, u_int addr, signed char regmap[], int target, int adj, u_int reglist)
+static void inline_readstub(enum stub_type type, int i, u_int addr, signed char regmap[], int target, int adj, u_int reglist)
 {
   int rs=get_reg(regmap,target);
-  int rth=get_reg(regmap,target|64);
   int rt=get_reg(regmap,target);
   if(rs<0) rs=get_reg(regmap,-1);
   assert(rs>=0);
-  u_int handler,host_addr=0,is_dynamic,far_call=0;
+  u_int host_addr=0,is_dynamic,far_call=0;
+  void *handler;
   int cc=get_reg(regmap,CCREG);
   if(pcsx_direct_read(type,addr,CLOCK_ADJUST(adj+1),cc,target?rs:-1,rt))
     return;
-  handler=get_direct_memhandler(mem_rtab,addr,type,&host_addr);
-  if (handler==0) {
+  handler = get_direct_memhandler(mem_rtab, addr, type, &host_addr);
+  if (handler == NULL) {
     if(rt<0||rt1[i]==0)
       return;
     if(addr!=host_addr)
@@ -2572,11 +1844,11 @@ inline_readstub(int type, int i, u_int addr, signed char regmap[], int target, i
   is_dynamic=pcsxmem_is_handler_dynamic(addr);
   if(is_dynamic) {
     if(type==LOADB_STUB||type==LOADBU_STUB)
-      handler=(int)jump_handler_read8;
+      handler=jump_handler_read8;
     if(type==LOADH_STUB||type==LOADHU_STUB)
-      handler=(int)jump_handler_read16;
+      handler=jump_handler_read16;
     if(type==LOADW_STUB)
-      handler=(int)jump_handler_read32;
+      handler=jump_handler_read32;
   }
 
   // call a memhandler
@@ -2587,10 +1859,10 @@ inline_readstub(int type, int i, u_int addr, signed char regmap[], int target, i
     emit_movimm(addr,0);
   else if(rs!=0)
     emit_mov(rs,0);
-  int offset=(int)handler-(int)out-8;
+  int offset=(u_char *)handler-out-8;
   if(offset<-33554432||offset>=33554432) {
     // unreachable memhandler, a plugin func perhaps
-    emit_movimm(handler,12);
+    emit_movimm((u_int)handler,12);
     far_call=1;
   }
   if(cc<0)
@@ -2600,10 +1872,10 @@ inline_readstub(int type, int i, u_int addr, signed char regmap[], int target, i
     emit_addimm(cc<0?2:cc,CLOCK_ADJUST(adj+1),2);
   }
   else {
-    emit_readword((int)&last_count,3);
+    emit_readword(&last_count,3);
     emit_addimm(cc<0?2:cc,CLOCK_ADJUST(adj+1),2);
     emit_add(2,3,2);
-    emit_writeword(2,(int)&Count);
+    emit_writeword(2,&Count);
   }
 
   if(far_call)
@@ -2624,30 +1896,27 @@ inline_readstub(int type, int i, u_int addr, signed char regmap[], int target, i
   restore_regs(reglist);
 }
 
-do_writestub(int n)
+static void do_writestub(int n)
 {
-  assem_debug("do_writestub %x\n",start+stubs[n][3]*4);
+  assem_debug("do_writestub %x\n",start+stubs[n].a*4);
   literal_pool(256);
-  set_jump_target(stubs[n][1],(int)out);
-  int type=stubs[n][0];
-  int i=stubs[n][3];
-  int rs=stubs[n][4];
-  struct regstat *i_regs=(struct regstat *)stubs[n][5];
-  u_int reglist=stubs[n][7];
+  set_jump_target(stubs[n].addr, out);
+  enum stub_type type=stubs[n].type;
+  int i=stubs[n].a;
+  int rs=stubs[n].b;
+  struct regstat *i_regs=(struct regstat *)stubs[n].c;
+  u_int reglist=stubs[n].e;
   signed char *i_regmap=i_regs->regmap;
-  int addr=get_reg(i_regmap,AGEN1+(i&1));
-  int rth,rt,r;
-  int ds;
+  int rt,r;
   if(itype[i]==C1LS||itype[i]==C2LS) {
-    rth=get_reg(i_regmap,FTEMP|64);
     rt=get_reg(i_regmap,r=FTEMP);
   }else{
-    rth=get_reg(i_regmap,rs2[i]|64);
     rt=get_reg(i_regmap,r=rs2[i]);
   }
   assert(rs>=0);
   assert(rt>=0);
-  int rtmp,temp=-1,temp2=HOST_TEMPREG,regs_saved=0,restore_jump=0,ra;
+  int rtmp,temp=-1,temp2=HOST_TEMPREG,regs_saved=0;
+  void *restore_jump = NULL;
   int reglist2=reglist|(1<<rs)|(1<<rt);
   for(rtmp=0;rtmp<=12;rtmp++) {
     if(((1<<rtmp)&0x13ff)&&((1<<rtmp)&reglist2)==0) {
@@ -2663,7 +1932,7 @@ do_writestub(int n)
   }
   if((regs_saved||(reglist2&8)==0)&&temp!=3&&rs!=3&&rt!=3)
     temp2=3;
-  emit_readword((int)&mem_wtab,temp);
+  emit_readword(&mem_wtab,temp);
   emit_shrimm(rs,12,temp2);
   emit_readword_dualindexedx4(temp,temp2,temp2);
   emit_lsls_imm(temp2,1,temp2);
@@ -2674,50 +1943,49 @@ do_writestub(int n)
     default:          assert(0);
   }
   if(regs_saved) {
-    restore_jump=(int)out;
+    restore_jump=out;
     emit_jcc(0); // jump to reg restore
   }
   else
-    emit_jcc(stubs[n][2]); // return address (invcode check)
+    emit_jcc(stubs[n].retaddr); // return address (invcode check)
 
   if(!regs_saved)
     save_regs(reglist);
-  int handler=0;
+  void *handler=NULL;
   switch(type) {
-    case STOREB_STUB: handler=(int)jump_handler_write8; break;
-    case STOREH_STUB: handler=(int)jump_handler_write16; break;
-    case STOREW_STUB: handler=(int)jump_handler_write32; break;
+    case STOREB_STUB: handler=jump_handler_write8; break;
+    case STOREH_STUB: handler=jump_handler_write16; break;
+    case STOREW_STUB: handler=jump_handler_write32; break;
+    default: assert(0);
   }
-  assert(handler!=0);
+  assert(handler);
   pass_args(rs,rt);
   if(temp2!=3)
     emit_mov(temp2,3);
   int cc=get_reg(i_regmap,CCREG);
   if(cc<0)
     emit_loadreg(CCREG,2);
-  emit_addimm(cc<0?2:cc,CLOCK_ADJUST((int)stubs[n][6]+1),2);
+  emit_addimm(cc<0?2:cc,CLOCK_ADJUST((int)stubs[n].d+1),2);
   // returns new cycle_count
   emit_call(handler);
-  emit_addimm(0,-CLOCK_ADJUST((int)stubs[n][6]+1),cc<0?2:cc);
+  emit_addimm(0,-CLOCK_ADJUST((int)stubs[n].d+1),cc<0?2:cc);
   if(cc<0)
     emit_storereg(CCREG,2);
   if(restore_jump)
-    set_jump_target(restore_jump,(int)out);
+    set_jump_target(restore_jump, out);
   restore_regs(reglist);
-  ra=stubs[n][2];
-  emit_jmp(ra);
+  emit_jmp(stubs[n].retaddr);
 }
 
-inline_writestub(int type, int i, u_int addr, signed char regmap[], int target, int adj, u_int reglist)
+static void inline_writestub(enum stub_type type, int i, u_int addr, signed char regmap[], int target, int adj, u_int reglist)
 {
   int rs=get_reg(regmap,-1);
-  int rth=get_reg(regmap,target|64);
   int rt=get_reg(regmap,target);
   assert(rs>=0);
   assert(rt>=0);
-  u_int handler,host_addr=0;
-  handler=get_direct_memhandler(mem_wtab,addr,type,&host_addr);
-  if (handler==0) {
+  u_int host_addr=0;
+  void *handler = get_direct_memhandler(mem_wtab, addr, type, &host_addr);
+  if (handler == NULL) {
     if(addr!=host_addr)
       emit_movimm_from(addr,rs,host_addr,rs);
     switch(type) {
@@ -2736,29 +2004,28 @@ inline_writestub(int type, int i, u_int addr, signed char regmap[], int target,
   if(cc<0)
     emit_loadreg(CCREG,2);
   emit_addimm(cc<0?2:cc,CLOCK_ADJUST(adj+1),2);
-  emit_movimm(handler,3);
+  emit_movimm((u_int)handler,3);
   // returns new cycle_count
-  emit_call((int)jump_handler_write_h);
+  emit_call(jump_handler_write_h);
   emit_addimm(0,-CLOCK_ADJUST(adj+1),cc<0?2:cc);
   if(cc<0)
     emit_storereg(CCREG,2);
   restore_regs(reglist);
 }
 
-do_unalignedwritestub(int n)
+static void do_unalignedwritestub(int n)
 {
-  assem_debug("do_unalignedwritestub %x\n",start+stubs[n][3]*4);
+  assem_debug("do_unalignedwritestub %x\n",start+stubs[n].a*4);
   literal_pool(256);
-  set_jump_target(stubs[n][1],(int)out);
+  set_jump_target(stubs[n].addr, out);
 
-  int i=stubs[n][3];
-  struct regstat *i_regs=(struct regstat *)stubs[n][4];
-  int addr=stubs[n][5];
-  u_int reglist=stubs[n][7];
+  int i=stubs[n].a;
+  struct regstat *i_regs=(struct regstat *)stubs[n].c;
+  int addr=stubs[n].b;
+  u_int reglist=stubs[n].e;
   signed char *i_regmap=i_regs->regmap;
   int temp2=get_reg(i_regmap,FTEMP);
   int rt;
-  int ds, real_rs;
   rt=get_reg(i_regmap,rs2[i]);
   assert(rt>=0);
   assert(addr>=0);
@@ -2773,16 +2040,16 @@ do_unalignedwritestub(int n)
   int cc=get_reg(i_regmap,CCREG);
   if(cc<0)
     emit_loadreg(CCREG,2);
-  emit_addimm(cc<0?2:cc,CLOCK_ADJUST((int)stubs[n][6]+1),2);
-  emit_call((int)(opcode[i]==0x2a?jump_handle_swl:jump_handle_swr));
-  emit_addimm(0,-CLOCK_ADJUST((int)stubs[n][6]+1),cc<0?2:cc);
+  emit_addimm(cc<0?2:cc,CLOCK_ADJUST((int)stubs[n].d+1),2);
+  emit_call((opcode[i]==0x2a?jump_handle_swl:jump_handle_swr));
+  emit_addimm(0,-CLOCK_ADJUST((int)stubs[n].d+1),cc<0?2:cc);
   if(cc<0)
     emit_storereg(CCREG,2);
   restore_regs(reglist);
-  emit_jmp(stubs[n][2]); // return address
+  emit_jmp(stubs[n].retaddr); // return address
 #else
   emit_andimm(addr,0xfffffffc,temp2);
-  emit_writeword(temp2,(int)&address);
+  emit_writeword(temp2,&address);
 
   save_regs(reglist);
   emit_shrimm(addr,16,1);
@@ -2791,11 +2058,11 @@ do_unalignedwritestub(int n)
     emit_loadreg(CCREG,2);
   }
   emit_movimm((u_int)readmem,0);
-  emit_addimm(cc<0?2:cc,2*stubs[n][6]+2,2);
+  emit_addimm(cc<0?2:cc,2*stubs[n].d+2,2);
   emit_call((int)&indirect_jump_indexed);
   restore_regs(reglist);
 
-  emit_readword((int)&readmem_dword,temp2);
+  emit_readword(&readmem_dword,temp2);
   int temp=addr; //hmh
   emit_shlimm(addr,3,temp);
   emit_andimm(temp,24,temp);
@@ -2813,45 +2080,40 @@ do_unalignedwritestub(int n)
     emit_bic_lsl(temp2,HOST_TEMPREG,temp,temp2);
     emit_orrshl(rt,temp,temp2);
   }
-  emit_readword((int)&address,addr);
-  emit_writeword(temp2,(int)&word);
+  emit_readword(&address,addr);
+  emit_writeword(temp2,&word);
   //save_regs(reglist); // don't need to, no state changes
   emit_shrimm(addr,16,1);
   emit_movimm((u_int)writemem,0);
   //emit_call((int)&indirect_jump_indexed);
   emit_mov(15,14);
   emit_readword_dualindexedx4(0,1,15);
-  emit_readword((int)&Count,HOST_TEMPREG);
-  emit_readword((int)&next_interupt,2);
-  emit_addimm(HOST_TEMPREG,-2*stubs[n][6]-2,HOST_TEMPREG);
-  emit_writeword(2,(int)&last_count);
+  emit_readword(&Count,HOST_TEMPREG);
+  emit_readword(&next_interupt,2);
+  emit_addimm(HOST_TEMPREG,-2*stubs[n].d-2,HOST_TEMPREG);
+  emit_writeword(2,&last_count);
   emit_sub(HOST_TEMPREG,2,cc<0?HOST_TEMPREG:cc);
   if(cc<0) {
     emit_storereg(CCREG,HOST_TEMPREG);
   }
   restore_regs(reglist);
-  emit_jmp(stubs[n][2]); // return address
+  emit_jmp(stubs[n].retaddr); // return address
 #endif
 }
 
-void printregs(int edi,int esi,int ebp,int esp,int b,int d,int c,int a)
-{
-  printf("regs: %x %x %x %x %x %x %x (%x)\n",a,b,c,d,ebp,esi,edi,(&edi)[-1]);
-}
-
-do_invstub(int n)
+static void do_invstub(int n)
 {
   literal_pool(20);
-  u_int reglist=stubs[n][3];
-  set_jump_target(stubs[n][1],(int)out);
+  u_int reglist=stubs[n].a;
+  set_jump_target(stubs[n].addr, out);
   save_regs(reglist);
-  if(stubs[n][4]!=0) emit_mov(stubs[n][4],0);
-  emit_call((int)&invalidate_addr);
+  if(stubs[n].b!=0) emit_mov(stubs[n].b,0);
+  emit_call(&invalidate_addr);
   restore_regs(reglist);
-  emit_jmp(stubs[n][2]); // return address
+  emit_jmp(stubs[n].retaddr); // return address
 }
 
-int do_dirty_stub(int i)
+void *do_dirty_stub(int i)
 {
   assem_debug("do_dirty_stub %x\n",start+i*4);
   u_int addr=(u_int)source;
@@ -2868,15 +2130,16 @@ int do_dirty_stub(int i)
   emit_movw(slen*4,3);
   #endif
   emit_movimm(start+i*4,0);
-  emit_call((int)start<(int)0xC0000000?(int)&verify_code:(int)&verify_code_vm);
-  int entry=(int)out;
+  emit_call((int)start<(int)0xC0000000?&verify_code:&verify_code_vm);
+  void *entry = out;
   load_regs_entry(i);
-  if(entry==(int)out) entry=instr_addr[i];
+  if (entry == out)
+    entry = instr_addr[i];
   emit_jmp(instr_addr[i]);
   return entry;
 }
 
-void do_dirty_stub_ds()
+static void do_dirty_stub_ds()
 {
   // Careful about the code output here, verify_dirty needs to parse it.
   #ifndef HAVE_ARMV7
@@ -2891,33 +2154,12 @@ void do_dirty_stub_ds()
   emit_movw(slen*4,3);
   #endif
   emit_movimm(start+1,0);
-  emit_call((int)&verify_code_ds);
-}
-
-do_cop1stub(int n)
-{
-  literal_pool(256);
-  assem_debug("do_cop1stub %x\n",start+stubs[n][3]*4);
-  set_jump_target(stubs[n][1],(int)out);
-  int i=stubs[n][3];
-//  int rs=stubs[n][4];
-  struct regstat *i_regs=(struct regstat *)stubs[n][5];
-  int ds=stubs[n][6];
-  if(!ds) {
-    load_all_consts(regs[i].regmap_entry,regs[i].was32,regs[i].wasdirty,i);
-    //if(i_regs!=&regs[i]) printf("oops: regs[i]=%x i_regs=%x",(int)&regs[i],(int)i_regs);
-  }
-  //else {printf("fp exception in delay slot\n");}
-  wb_dirtys(i_regs->regmap_entry,i_regs->was32,i_regs->wasdirty);
-  if(regs[i].regmap_entry[HOST_CCREG]!=CCREG) emit_loadreg(CCREG,HOST_CCREG);
-  emit_movimm(start+(i-ds)*4,EAX); // Get PC
-  emit_addimm(HOST_CCREG,CLOCK_ADJUST(ccadj[i]),HOST_CCREG); // CHECK: is this right?  There should probably be an extra cycle...
-  emit_jmp(ds?(int)fp_exception_ds:(int)fp_exception);
+  emit_call(&verify_code_ds);
 }
 
 /* Special assem */
 
-void shift_assemble_arm(int i,struct regstat *i_regs)
+static void shift_assemble_arm(int i,struct regstat *i_regs)
 {
   if(rt1[i]) {
     if(opcode2[i]<=0x07) // SLLV/SRLV/SRAV
@@ -3026,198 +2268,16 @@ void shift_assemble_arm(int i,struct regstat *i_regs)
     }
   }
 }
-
-static void speculate_mov(int rs,int rt)
-{
-  if(rt!=0) {
-    smrv_strong_next|=1<<rt;
-    smrv[rt]=smrv[rs];
-  }
-}
-
-static void speculate_mov_weak(int rs,int rt)
-{
-  if(rt!=0) {
-    smrv_weak_next|=1<<rt;
-    smrv[rt]=smrv[rs];
-  }
-}
-
-static void speculate_register_values(int i)
-{
-  if(i==0) {
-    memcpy(smrv,psxRegs.GPR.r,sizeof(smrv));
-    // gp,sp are likely to stay the same throughout the block
-    smrv_strong_next=(1<<28)|(1<<29)|(1<<30);
-    smrv_weak_next=~smrv_strong_next;
-    //printf(" llr %08x\n", smrv[4]);
-  }
-  smrv_strong=smrv_strong_next;
-  smrv_weak=smrv_weak_next;
-  switch(itype[i]) {
-    case ALU:
-      if     ((smrv_strong>>rs1[i])&1) speculate_mov(rs1[i],rt1[i]);
-      else if((smrv_strong>>rs2[i])&1) speculate_mov(rs2[i],rt1[i]);
-      else if((smrv_weak>>rs1[i])&1) speculate_mov_weak(rs1[i],rt1[i]);
-      else if((smrv_weak>>rs2[i])&1) speculate_mov_weak(rs2[i],rt1[i]);
-      else {
-        smrv_strong_next&=~(1<<rt1[i]);
-        smrv_weak_next&=~(1<<rt1[i]);
-      }
-      break;
-    case SHIFTIMM:
-      smrv_strong_next&=~(1<<rt1[i]);
-      smrv_weak_next&=~(1<<rt1[i]);
-      // fallthrough
-    case IMM16:
-      if(rt1[i]&&is_const(&regs[i],rt1[i])) {
-        int value,hr=get_reg(regs[i].regmap,rt1[i]);
-        if(hr>=0) {
-          if(get_final_value(hr,i,&value))
-               smrv[rt1[i]]=value;
-          else smrv[rt1[i]]=constmap[i][hr];
-          smrv_strong_next|=1<<rt1[i];
-        }
-      }
-      else {
-        if     ((smrv_strong>>rs1[i])&1) speculate_mov(rs1[i],rt1[i]);
-        else if((smrv_weak>>rs1[i])&1) speculate_mov_weak(rs1[i],rt1[i]);
-      }
-      break;
-    case LOAD:
-      if(start<0x2000&&(rt1[i]==26||(smrv[rt1[i]]>>24)==0xa0)) {
-        // special case for BIOS
-        smrv[rt1[i]]=0xa0000000;
-        smrv_strong_next|=1<<rt1[i];
-        break;
-      }
-      // fallthrough
-    case SHIFT:
-    case LOADLR:
-    case MOV:
-      smrv_strong_next&=~(1<<rt1[i]);
-      smrv_weak_next&=~(1<<rt1[i]);
-      break;
-    case COP0:
-    case COP2:
-      if(opcode2[i]==0||opcode2[i]==2) { // MFC/CFC
-        smrv_strong_next&=~(1<<rt1[i]);
-        smrv_weak_next&=~(1<<rt1[i]);
-      }
-      break;
-    case C2LS:
-      if (opcode[i]==0x32) { // LWC2
-        smrv_strong_next&=~(1<<rt1[i]);
-        smrv_weak_next&=~(1<<rt1[i]);
-      }
-      break;
-  }
-#if 0
-  int r=4;
-  printf("x %08x %08x %d %d c %08x %08x\n",smrv[r],start+i*4,
-    ((smrv_strong>>r)&1),(smrv_weak>>r)&1,regs[i].isconst,regs[i].wasconst);
-#endif
-}
-
-enum {
-  MTYPE_8000 = 0,
-  MTYPE_8020,
-  MTYPE_0000,
-  MTYPE_A000,
-  MTYPE_1F80,
-};
-
-static int get_ptr_mem_type(u_int a)
-{
-  if(a < 0x00200000) {
-    if(a<0x1000&&((start>>20)==0xbfc||(start>>24)==0xa0))
-      // return wrong, must use memhandler for BIOS self-test to pass
-      // 007 does similar stuff from a00 mirror, weird stuff
-      return MTYPE_8000;
-    return MTYPE_0000;
-  }
-  if(0x1f800000 <= a && a < 0x1f801000)
-    return MTYPE_1F80;
-  if(0x80200000 <= a && a < 0x80800000)
-    return MTYPE_8020;
-  if(0xa0000000 <= a && a < 0xa0200000)
-    return MTYPE_A000;
-  return MTYPE_8000;
-}
-
-static int emit_fastpath_cmp_jump(int i,int addr,int *addr_reg_override)
-{
-  int jaddr,type=0;
-  int mr=rs1[i];
-  if(((smrv_strong|smrv_weak)>>mr)&1) {
-    type=get_ptr_mem_type(smrv[mr]);
-    //printf("set %08x @%08x r%d %d\n", smrv[mr], start+i*4, mr, type);
-  }
-  else {
-    // use the mirror we are running on
-    type=get_ptr_mem_type(start);
-    //printf("set nospec   @%08x r%d %d\n", start+i*4, mr, type);
-  }
-
-  if(type==MTYPE_8020) { // RAM 80200000+ mirror
-    emit_andimm(addr,~0x00e00000,HOST_TEMPREG);
-    addr=*addr_reg_override=HOST_TEMPREG;
-    type=0;
-  }
-  else if(type==MTYPE_0000) { // RAM 0 mirror
-    emit_orimm(addr,0x80000000,HOST_TEMPREG);
-    addr=*addr_reg_override=HOST_TEMPREG;
-    type=0;
-  }
-  else if(type==MTYPE_A000) { // RAM A mirror
-    emit_andimm(addr,~0x20000000,HOST_TEMPREG);
-    addr=*addr_reg_override=HOST_TEMPREG;
-    type=0;
-  }
-  else if(type==MTYPE_1F80) { // scratchpad
-    if (psxH == (void *)0x1f800000) {
-      emit_addimm(addr,-0x1f800000,HOST_TEMPREG);
-      emit_cmpimm(HOST_TEMPREG,0x1000);
-      jaddr=(int)out;
-      emit_jc(0);
-    }
-    else {
-      // do usual RAM check, jump will go to the right handler
-      type=0;
-    }
-  }
-
-  if(type==0)
-  {
-    emit_cmpimm(addr,RAM_SIZE);
-    jaddr=(int)out;
-    #ifdef CORTEX_A8_BRANCH_PREDICTION_HACK
-    // Hint to branch predictor that the branch is unlikely to be taken
-    if(rs1[i]>=28)
-      emit_jno_unlikely(0);
-    else
-    #endif
-      emit_jno(0);
-    if(ram_offset!=0) {
-      emit_addimm(addr,ram_offset,HOST_TEMPREG);
-      addr=*addr_reg_override=HOST_TEMPREG;
-    }
-  }
-
-  return jaddr;
-}
-
 #define shift_assemble shift_assemble_arm
 
-void loadlr_assemble_arm(int i,struct regstat *i_regs)
+static void loadlr_assemble_arm(int i,struct regstat *i_regs)
 {
-  int s,th,tl,temp,temp2,addr,map=-1;
+  int s,tl,temp,temp2,addr;
   int offset;
-  int jaddr=0;
+  void *jaddr=0;
   int memtarget=0,c=0;
   int fastload_reg_override=0;
   u_int hr,reglist=0;
-  th=get_reg(i_regs->regmap,rt1[i]|64);
   tl=get_reg(i_regs->regmap,rt1[i]);
   s=get_reg(i_regs->regmap,rs1[i]);
   temp=get_reg(i_regs->regmap,-1);
@@ -3238,10 +2298,6 @@ void loadlr_assemble_arm(int i,struct regstat *i_regs)
     }
   }
   if(!c) {
-    #ifdef RAM_OFFSET
-    map=get_reg(i_regs->regmap,ROREG);
-    if(map<0) emit_loadreg(ROREG,map=HOST_TEMPREG);
-    #endif
     emit_shlimm(addr,3,temp);
     if (opcode[i]==0x22||opcode[i]==0x26) {
       emit_andimm(addr,0xFFFFFFFC,temp2); // LWL/LWR
@@ -3265,9 +2321,8 @@ void loadlr_assemble_arm(int i,struct regstat *i_regs)
     if(!c||memtarget) {
       int a=temp2;
       if(fastload_reg_override) a=fastload_reg_override;
-      //emit_readword_indexed((int)rdram-0x80000000,temp2,temp2);
-      emit_readword_indexed_tlb(0,a,map,temp2);
-      if(jaddr) add_stub(LOADW_STUB,jaddr,(int)out,i,temp2,(int)i_regs,ccadj[i],reglist);
+      emit_readword_indexed(0,a,temp2);
+      if(jaddr) add_stub_r(LOADW_STUB,jaddr,out,i,temp2,i_regs,ccadj[i],reglist);
     }
     else
       inline_readstub(LOADW_STUB,i,(constmap[i][s]+offset)&0xFFFFFFFC,i_regs->regmap,FTEMP,ccadj[i],reglist);
@@ -3293,289 +2348,11 @@ void loadlr_assemble_arm(int i,struct regstat *i_regs)
     //emit_storereg(rt1[i],tl); // DEBUG
   }
   if (opcode[i]==0x1A||opcode[i]==0x1B) { // LDL/LDR
-    // FIXME: little endian, fastload_reg_override
-    int temp2h=get_reg(i_regs->regmap,FTEMP|64);
-    if(!c||memtarget) {
-      //if(th>=0) emit_readword_indexed((int)rdram-0x80000000,temp2,temp2h);
-      //emit_readword_indexed((int)rdram-0x7FFFFFFC,temp2,temp2);
-      emit_readdword_indexed_tlb(0,temp2,map,temp2h,temp2);
-      if(jaddr) add_stub(LOADD_STUB,jaddr,(int)out,i,temp2,(int)i_regs,ccadj[i],reglist);
-    }
-    else
-      inline_readstub(LOADD_STUB,i,(constmap[i][s]+offset)&0xFFFFFFF8,i_regs->regmap,FTEMP,ccadj[i],reglist);
-    if(rt1[i]) {
-      assert(th>=0);
-      assert(tl>=0);
-      emit_testimm(temp,32);
-      emit_andimm(temp,24,temp);
-      if (opcode[i]==0x1A) { // LDL
-        emit_rsbimm(temp,32,HOST_TEMPREG);
-        emit_shl(temp2h,temp,temp2h);
-        emit_orrshr(temp2,HOST_TEMPREG,temp2h);
-        emit_movimm(-1,HOST_TEMPREG);
-        emit_shl(temp2,temp,temp2);
-        emit_cmove_reg(temp2h,th);
-        emit_biceq_lsl(tl,HOST_TEMPREG,temp,tl);
-        emit_bicne_lsl(th,HOST_TEMPREG,temp,th);
-        emit_orreq(temp2,tl,tl);
-        emit_orrne(temp2,th,th);
-      }
-      if (opcode[i]==0x1B) { // LDR
-        emit_xorimm(temp,24,temp);
-        emit_rsbimm(temp,32,HOST_TEMPREG);
-        emit_shr(temp2,temp,temp2);
-        emit_orrshl(temp2h,HOST_TEMPREG,temp2);
-        emit_movimm(-1,HOST_TEMPREG);
-        emit_shr(temp2h,temp,temp2h);
-        emit_cmovne_reg(temp2,tl);
-        emit_bicne_lsr(th,HOST_TEMPREG,temp,th);
-        emit_biceq_lsr(tl,HOST_TEMPREG,temp,tl);
-        emit_orrne(temp2h,th,th);
-        emit_orreq(temp2h,tl,tl);
-      }
-    }
+    assert(0);
   }
 }
 #define loadlr_assemble loadlr_assemble_arm
 
-void cop0_assemble(int i,struct regstat *i_regs)
-{
-  if(opcode2[i]==0) // MFC0
-  {
-    signed char t=get_reg(i_regs->regmap,rt1[i]);
-    char copr=(source[i]>>11)&0x1f;
-    //assert(t>=0); // Why does this happen?  OOT is weird
-    if(t>=0&&rt1[i]!=0) {
-      emit_readword((int)&reg_cop0+copr*4,t);
-    }
-  }
-  else if(opcode2[i]==4) // MTC0
-  {
-    signed char s=get_reg(i_regs->regmap,rs1[i]);
-    char copr=(source[i]>>11)&0x1f;
-    assert(s>=0);
-    wb_register(rs1[i],i_regs->regmap,i_regs->dirty,i_regs->is32);
-    if(copr==9||copr==11||copr==12||copr==13) {
-      emit_readword((int)&last_count,HOST_TEMPREG);
-      emit_loadreg(CCREG,HOST_CCREG); // TODO: do proper reg alloc
-      emit_add(HOST_CCREG,HOST_TEMPREG,HOST_CCREG);
-      emit_addimm(HOST_CCREG,CLOCK_ADJUST(ccadj[i]),HOST_CCREG);
-      emit_writeword(HOST_CCREG,(int)&Count);
-    }
-    // What a mess.  The status register (12) can enable interrupts,
-    // so needs a special case to handle a pending interrupt.
-    // The interrupt must be taken immediately, because a subsequent
-    // instruction might disable interrupts again.
-    if(copr==12||copr==13) {
-      if (is_delayslot) {
-        // burn cycles to cause cc_interrupt, which will
-        // reschedule next_interupt. Relies on CCREG from above.
-        assem_debug("MTC0 DS %d\n", copr);
-        emit_writeword(HOST_CCREG,(int)&last_count);
-        emit_movimm(0,HOST_CCREG);
-        emit_storereg(CCREG,HOST_CCREG);
-        emit_loadreg(rs1[i],1);
-        emit_movimm(copr,0);
-        emit_call((int)pcsx_mtc0_ds);
-        emit_loadreg(rs1[i],s);
-        return;
-      }
-      emit_movimm(start+i*4+4,HOST_TEMPREG);
-      emit_writeword(HOST_TEMPREG,(int)&pcaddr);
-      emit_movimm(0,HOST_TEMPREG);
-      emit_writeword(HOST_TEMPREG,(int)&pending_exception);
-    }
-    //else if(copr==12&&is_delayslot) emit_call((int)MTC0_R12);
-    //else
-    if(s==HOST_CCREG)
-      emit_loadreg(rs1[i],1);
-    else if(s!=1)
-      emit_mov(s,1);
-    emit_movimm(copr,0);
-    emit_call((int)pcsx_mtc0);
-    if(copr==9||copr==11||copr==12||copr==13) {
-      emit_readword((int)&Count,HOST_CCREG);
-      emit_readword((int)&next_interupt,HOST_TEMPREG);
-      emit_addimm(HOST_CCREG,-CLOCK_ADJUST(ccadj[i]),HOST_CCREG);
-      emit_sub(HOST_CCREG,HOST_TEMPREG,HOST_CCREG);
-      emit_writeword(HOST_TEMPREG,(int)&last_count);
-      emit_storereg(CCREG,HOST_CCREG);
-    }
-    if(copr==12||copr==13) {
-      assert(!is_delayslot);
-      emit_readword((int)&pending_exception,14);
-      emit_test(14,14);
-      emit_jne((int)&do_interrupt);
-    }
-    emit_loadreg(rs1[i],s);
-    if(get_reg(i_regs->regmap,rs1[i]|64)>=0)
-      emit_loadreg(rs1[i]|64,get_reg(i_regs->regmap,rs1[i]|64));
-    cop1_usable=0;
-  }
-  else
-  {
-    assert(opcode2[i]==0x10);
-    if((source[i]&0x3f)==0x10) // RFE
-    {
-      emit_readword((int)&Status,0);
-      emit_andimm(0,0x3c,1);
-      emit_andimm(0,~0xf,0);
-      emit_orrshr_imm(1,2,0);
-      emit_writeword(0,(int)&Status);
-    }
-  }
-}
-
-static void cop2_get_dreg(u_int copr,signed char tl,signed char temp)
-{
-  switch (copr) {
-    case 1:
-    case 3:
-    case 5:
-    case 8:
-    case 9:
-    case 10:
-    case 11:
-      emit_readword((int)&reg_cop2d[copr],tl);
-      emit_signextend16(tl,tl);
-      emit_writeword(tl,(int)&reg_cop2d[copr]); // hmh
-      break;
-    case 7:
-    case 16:
-    case 17:
-    case 18:
-    case 19:
-      emit_readword((int)&reg_cop2d[copr],tl);
-      emit_andimm(tl,0xffff,tl);
-      emit_writeword(tl,(int)&reg_cop2d[copr]);
-      break;
-    case 15:
-      emit_readword((int)&reg_cop2d[14],tl); // SXY2
-      emit_writeword(tl,(int)&reg_cop2d[copr]);
-      break;
-    case 28:
-    case 29:
-      emit_readword((int)&reg_cop2d[9],temp);
-      emit_testimm(temp,0x8000); // do we need this?
-      emit_andimm(temp,0xf80,temp);
-      emit_andne_imm(temp,0,temp);
-      emit_shrimm(temp,7,tl);
-      emit_readword((int)&reg_cop2d[10],temp);
-      emit_testimm(temp,0x8000);
-      emit_andimm(temp,0xf80,temp);
-      emit_andne_imm(temp,0,temp);
-      emit_orrshr_imm(temp,2,tl);
-      emit_readword((int)&reg_cop2d[11],temp);
-      emit_testimm(temp,0x8000);
-      emit_andimm(temp,0xf80,temp);
-      emit_andne_imm(temp,0,temp);
-      emit_orrshl_imm(temp,3,tl);
-      emit_writeword(tl,(int)&reg_cop2d[copr]);
-      break;
-    default:
-      emit_readword((int)&reg_cop2d[copr],tl);
-      break;
-  }
-}
-
-static void cop2_put_dreg(u_int copr,signed char sl,signed char temp)
-{
-  switch (copr) {
-    case 15:
-      emit_readword((int)&reg_cop2d[13],temp);  // SXY1
-      emit_writeword(sl,(int)&reg_cop2d[copr]);
-      emit_writeword(temp,(int)&reg_cop2d[12]); // SXY0
-      emit_readword((int)&reg_cop2d[14],temp);  // SXY2
-      emit_writeword(sl,(int)&reg_cop2d[14]);
-      emit_writeword(temp,(int)&reg_cop2d[13]); // SXY1
-      break;
-    case 28:
-      emit_andimm(sl,0x001f,temp);
-      emit_shlimm(temp,7,temp);
-      emit_writeword(temp,(int)&reg_cop2d[9]);
-      emit_andimm(sl,0x03e0,temp);
-      emit_shlimm(temp,2,temp);
-      emit_writeword(temp,(int)&reg_cop2d[10]);
-      emit_andimm(sl,0x7c00,temp);
-      emit_shrimm(temp,3,temp);
-      emit_writeword(temp,(int)&reg_cop2d[11]);
-      emit_writeword(sl,(int)&reg_cop2d[28]);
-      break;
-    case 30:
-      emit_movs(sl,temp);
-      emit_mvnmi(temp,temp);
-#ifdef HAVE_ARMV5
-      emit_clz(temp,temp);
-#else
-      emit_movs(temp,HOST_TEMPREG);
-      emit_movimm(0,temp);
-      emit_jeq((int)out+4*4);
-      emit_addpl_imm(temp,1,temp);
-      emit_lslpls_imm(HOST_TEMPREG,1,HOST_TEMPREG);
-      emit_jns((int)out-2*4);
-#endif
-      emit_writeword(sl,(int)&reg_cop2d[30]);
-      emit_writeword(temp,(int)&reg_cop2d[31]);
-      break;
-    case 31:
-      break;
-    default:
-      emit_writeword(sl,(int)&reg_cop2d[copr]);
-      break;
-  }
-}
-
-void cop2_assemble(int i,struct regstat *i_regs)
-{
-  u_int copr=(source[i]>>11)&0x1f;
-  signed char temp=get_reg(i_regs->regmap,-1);
-  if (opcode2[i]==0) { // MFC2
-    signed char tl=get_reg(i_regs->regmap,rt1[i]);
-    if(tl>=0&&rt1[i]!=0)
-      cop2_get_dreg(copr,tl,temp);
-  }
-  else if (opcode2[i]==4) { // MTC2
-    signed char sl=get_reg(i_regs->regmap,rs1[i]);
-    cop2_put_dreg(copr,sl,temp);
-  }
-  else if (opcode2[i]==2) // CFC2
-  {
-    signed char tl=get_reg(i_regs->regmap,rt1[i]);
-    if(tl>=0&&rt1[i]!=0)
-      emit_readword((int)&reg_cop2c[copr],tl);
-  }
-  else if (opcode2[i]==6) // CTC2
-  {
-    signed char sl=get_reg(i_regs->regmap,rs1[i]);
-    switch(copr) {
-      case 4:
-      case 12:
-      case 20:
-      case 26:
-      case 27:
-      case 29:
-      case 30:
-        emit_signextend16(sl,temp);
-        break;
-      case 31:
-        //value = value & 0x7ffff000;
-        //if (value & 0x7f87e000) value |= 0x80000000;
-        emit_shrimm(sl,12,temp);
-        emit_shlimm(temp,12,temp);
-        emit_testimm(temp,0x7f000000);
-        emit_testeqimm(temp,0x00870000);
-        emit_testeqimm(temp,0x0000e000);
-        emit_orrne_imm(temp,0x80000000,temp);
-        break;
-      default:
-        temp=sl;
-        break;
-    }
-    emit_writeword(temp,(int)&reg_cop2c[copr]);
-    assert(sl>=0);
-  }
-}
-
 static void c2op_prologue(u_int op,u_int reglist)
 {
   save_regs_all(reglist);
@@ -3598,24 +2375,23 @@ static void c2op_epilogue(u_int op,u_int reglist)
 static void c2op_call_MACtoIR(int lm,int need_flags)
 {
   if(need_flags)
-    emit_call((int)(lm?gteMACtoIR_lm1:gteMACtoIR_lm0));
+    emit_call(lm?gteMACtoIR_lm1:gteMACtoIR_lm0);
   else
-    emit_call((int)(lm?gteMACtoIR_lm1_nf:gteMACtoIR_lm0_nf));
+    emit_call(lm?gteMACtoIR_lm1_nf:gteMACtoIR_lm0_nf);
 }
 
 static void c2op_call_rgb_func(void *func,int lm,int need_ir,int need_flags)
 {
-  emit_call((int)func);
+  emit_call(func);
   // func is C code and trashes r0
   emit_addimm(FP,(int)&psxRegs.CP2D.r[0]-(int)&dynarec_local,0);
   if(need_flags||need_ir)
     c2op_call_MACtoIR(lm,need_flags);
-  emit_call((int)(need_flags?gteMACtoRGB:gteMACtoRGB_nf));
+  emit_call(need_flags?gteMACtoRGB:gteMACtoRGB_nf);
 }
 
 static void c2op_assemble(int i,struct regstat *i_regs)
 {
-  signed char temp=get_reg(i_regs->regmap,-1);
   u_int c2op=source[i]&0x3f;
   u_int hr,reglist_full=0,reglist;
   int need_flags,need_ir;
@@ -3654,17 +2430,17 @@ static void c2op_assemble(int i,struct regstat *i_regs)
         if(mx<3)
           emit_addimm(0,32*4+mx*8*4,6);
         else
-          emit_readword((int)&zeromem_ptr,6);
+          emit_readword(&zeromem_ptr,6);
         if(cv<3)
           emit_addimm(0,32*4+(cv*8+5)*4,7);
         else
-          emit_readword((int)&zeromem_ptr,7);
+          emit_readword(&zeromem_ptr,7);
 #ifdef __ARM_NEON__
         emit_movimm(source[i],1); // opcode
-        emit_call((int)gteMVMVA_part_neon);
+        emit_call(gteMVMVA_part_neon);
         if(need_flags) {
           emit_movimm(lm,1);
-          emit_call((int)gteMACtoIR_flags_neon);
+          emit_call(gteMACtoIR_flags_neon);
         }
 #else
         if(cv==3&&shift)
@@ -3679,14 +2455,14 @@ static void c2op_assemble(int i,struct regstat *i_regs)
 #else /* if not HAVE_ARMV5 */
         c2op_prologue(c2op,reglist);
         emit_movimm(source[i],1); // opcode
-        emit_writeword(1,(int)&psxRegs.code);
+        emit_writeword(1,&psxRegs.code);
         emit_call((int)(need_flags?gte_handlers[c2op]:gte_handlers_nf[c2op]));
 #endif
         break;
       }
       case GTE_OP:
         c2op_prologue(c2op,reglist);
-        emit_call((int)(shift?gteOP_part_shift:gteOP_part_noshift));
+        emit_call(shift?gteOP_part_shift:gteOP_part_noshift);
         if(need_flags||need_ir) {
           emit_addimm(FP,(int)&psxRegs.CP2D.r[0]-(int)&dynarec_local,0);
           c2op_call_MACtoIR(lm,need_flags);
@@ -3702,7 +2478,7 @@ static void c2op_assemble(int i,struct regstat *i_regs)
         break;
       case GTE_SQR:
         c2op_prologue(c2op,reglist);
-        emit_call((int)(shift?gteSQR_part_shift:gteSQR_part_noshift));
+        emit_call(shift?gteSQR_part_shift:gteSQR_part_noshift);
         if(need_flags||need_ir) {
           emit_addimm(FP,(int)&psxRegs.CP2D.r[0]-(int)&dynarec_local,0);
           c2op_call_MACtoIR(lm,need_flags);
@@ -3725,48 +2501,16 @@ static void c2op_assemble(int i,struct regstat *i_regs)
         c2op_prologue(c2op,reglist);
 #ifdef DRC_DBG
         emit_movimm(source[i],1); // opcode
-        emit_writeword(1,(int)&psxRegs.code);
+        emit_writeword(1,&psxRegs.code);
 #endif
-        emit_call((int)(need_flags?gte_handlers[c2op]:gte_handlers_nf[c2op]));
+        emit_call(need_flags?gte_handlers[c2op]:gte_handlers_nf[c2op]);
         break;
     }
     c2op_epilogue(c2op,reglist);
   }
 }
 
-void cop1_unusable(int i,struct regstat *i_regs)
-{
-  // XXX: should just just do the exception instead
-  if(!cop1_usable) {
-    int jaddr=(int)out;
-    emit_jmp(0);
-    add_stub(FP_STUB,jaddr,(int)out,i,0,(int)i_regs,is_delayslot,0);
-    cop1_usable=1;
-  }
-}
-
-void cop1_assemble(int i,struct regstat *i_regs)
-{
-  cop1_unusable(i, i_regs);
-}
-
-void fconv_assemble_arm(int i,struct regstat *i_regs)
-{
-  cop1_unusable(i, i_regs);
-}
-#define fconv_assemble fconv_assemble_arm
-
-void fcomp_assemble(int i,struct regstat *i_regs)
-{
-  cop1_unusable(i, i_regs);
-}
-
-void float_assemble(int i,struct regstat *i_regs)
-{
-  cop1_unusable(i, i_regs);
-}
-
-void multdiv_assemble_arm(int i,struct regstat *i_regs)
+static void multdiv_assemble_arm(int i,struct regstat *i_regs)
 {
   //  case 0x18: MULT
   //  case 0x19: MULTU
@@ -3836,7 +2580,7 @@ void multdiv_assemble_arm(int i,struct regstat *i_regs)
         emit_subcs(remainder,HOST_TEMPREG,remainder);
         emit_adcs(quotient,quotient,quotient);
         emit_shrimm(HOST_TEMPREG,1,HOST_TEMPREG);
-        emit_jcc((int)out-16); // -4
+        emit_jcc(out-16); // -4
         emit_teq(d1,d2);
         emit_negmi(quotient,quotient);
         emit_test(d1,d1);
@@ -3872,7 +2616,7 @@ void multdiv_assemble_arm(int i,struct regstat *i_regs)
         emit_subcs(remainder,d2,remainder);
         emit_adcs(quotient,quotient,quotient);
         emit_shrcc_imm(d2,1,d2);
-        emit_jcc((int)out-16); // -4
+        emit_jcc(out-16); // -4
       }
     }
     else // 64-bit
@@ -3891,25 +2635,25 @@ void multdiv_assemble_arm(int i,struct regstat *i_regs)
 }
 #define multdiv_assemble multdiv_assemble_arm
 
-void do_preload_rhash(int r) {
+static void do_preload_rhash(int r) {
   // Don't need this for ARM.  On x86, this puts the value 0xf8 into the
   // register.  On ARM the hash can be done with a single instruction (below)
 }
 
-void do_preload_rhtbl(int ht) {
+static void do_preload_rhtbl(int ht) {
   emit_addimm(FP,(int)&mini_ht-(int)&dynarec_local,ht);
 }
 
-void do_rhash(int rs,int rh) {
+static void do_rhash(int rs,int rh) {
   emit_andimm(rs,0xf8,rh);
 }
 
-void do_miniht_load(int ht,int rh) {
+static void do_miniht_load(int ht,int rh) {
   assem_debug("ldr %s,[%s,%s]!\n",regname[rh],regname[ht],regname[rh]);
   output_w32(0xe7b00000|rd_rn_rm(rh,ht,rh));
 }
 
-void do_miniht_jump(int rs,int rh,int ht) {
+static void do_miniht_jump(int rs,int rh,int ht) {
   emit_cmp(rh,rs);
   emit_ldreq_indexed(ht,4,15);
   #ifdef CORTEX_A8_BRANCH_PREDICTION_HACK
@@ -3920,121 +2664,48 @@ void do_miniht_jump(int rs,int rh,int ht) {
   #endif
 }
 
-void do_miniht_insert(u_int return_address,int rt,int temp) {
+static void do_miniht_insert(u_int return_address,int rt,int temp) {
   #ifndef HAVE_ARMV7
   emit_movimm(return_address,rt); // PC into link register
-  add_to_linker((int)out,return_address,1);
+  add_to_linker(out,return_address,1);
   emit_pcreladdr(temp);
-  emit_writeword(rt,(int)&mini_ht[(return_address&0xFF)>>3][0]);
-  emit_writeword(temp,(int)&mini_ht[(return_address&0xFF)>>3][1]);
+  emit_writeword(rt,&mini_ht[(return_address&0xFF)>>3][0]);
+  emit_writeword(temp,&mini_ht[(return_address&0xFF)>>3][1]);
   #else
   emit_movw(return_address&0x0000FFFF,rt);
-  add_to_linker((int)out,return_address,1);
+  add_to_linker(out,return_address,1);
   emit_pcreladdr(temp);
-  emit_writeword(temp,(int)&mini_ht[(return_address&0xFF)>>3][1]);
+  emit_writeword(temp,&mini_ht[(return_address&0xFF)>>3][1]);
   emit_movt(return_address&0xFFFF0000,rt);
-  emit_writeword(rt,(int)&mini_ht[(return_address&0xFF)>>3][0]);
+  emit_writeword(rt,&mini_ht[(return_address&0xFF)>>3][0]);
   #endif
 }
 
-void wb_valid(signed char pre[],signed char entry[],u_int dirty_pre,u_int dirty,uint64_t is32_pre,uint64_t u,uint64_t uu)
+static void mark_clear_cache(void *target)
 {
-  //if(dirty_pre==dirty) return;
-  int hr,reg,new_hr;
-  for(hr=0;hr<HOST_REGS;hr++) {
-    if(hr!=EXCLUDE_REG) {
-      reg=pre[hr];
-      if(((~u)>>(reg&63))&1) {
-        if(reg>0) {
-          if(((dirty_pre&~dirty)>>hr)&1) {
-            if(reg>0&&reg<34) {
-              emit_storereg(reg,hr);
-              if( ((is32_pre&~uu)>>reg)&1 ) {
-                emit_sarimm(hr,31,HOST_TEMPREG);
-                emit_storereg(reg|64,HOST_TEMPREG);
-              }
-            }
-            else if(reg>=64) {
-              emit_storereg(reg,hr);
-            }
-          }
-        }
-      }
-    }
-  }
-}
-
-
-/* using strd could possibly help but you'd have to allocate registers in pairs
-void wb_invalidate_arm(signed char pre[],signed char entry[],uint64_t dirty,uint64_t is32,uint64_t u,uint64_t uu)
-{
-  int hr;
-  int wrote=-1;
-  for(hr=HOST_REGS-1;hr>=0;hr--) {
-    if(hr!=EXCLUDE_REG) {
-      if(pre[hr]!=entry[hr]) {
-        if(pre[hr]>=0) {
-          if((dirty>>hr)&1) {
-            if(get_reg(entry,pre[hr])<0) {
-              if(pre[hr]<64) {
-                if(!((u>>pre[hr])&1)) {
-                  if(hr<10&&(~hr&1)&&(pre[hr+1]<0||wrote==hr+1)) {
-                    if( ((is32>>pre[hr])&1) && !((uu>>pre[hr])&1) ) {
-                      emit_sarimm(hr,31,hr+1);
-                      emit_strdreg(pre[hr],hr);
-                    }
-                    else
-                      emit_storereg(pre[hr],hr);
-                  }else{
-                    emit_storereg(pre[hr],hr);
-                    if( ((is32>>pre[hr])&1) && !((uu>>pre[hr])&1) ) {
-                      emit_sarimm(hr,31,hr);
-                      emit_storereg(pre[hr]|64,hr);
-                    }
-                  }
-                }
-              }else{
-                if(!((uu>>(pre[hr]&63))&1) && !((is32>>(pre[hr]&63))&1)) {
-                  emit_storereg(pre[hr],hr);
-                }
-              }
-              wrote=hr;
-            }
-          }
-        }
-      }
-    }
-  }
-  for(hr=0;hr<HOST_REGS;hr++) {
-    if(hr!=EXCLUDE_REG) {
-      if(pre[hr]!=entry[hr]) {
-        if(pre[hr]>=0) {
-          int nr;
-          if((nr=get_reg(entry,pre[hr]))>=0) {
-            emit_mov(hr,nr);
-          }
-        }
-      }
-    }
+  u_long offset = (u_char *)target - translation_cache;
+  u_int mask = 1u << ((offset >> 12) & 31);
+  if (!(needs_clear_cache[offset >> 17] & mask)) {
+    char *start = (char *)((u_long)target & ~4095ul);
+    start_tcache_write(start, start + 4096);
+    needs_clear_cache[offset >> 17] |= mask;
   }
 }
-#define wb_invalidate wb_invalidate_arm
-*/
 
 // Clearing the cache is rather slow on ARM Linux, so mark the areas
 // that need to be cleared, and then only clear these areas once.
-void do_clear_cache()
+static void do_clear_cache()
 {
   int i,j;
   for (i=0;i<(1<<(TARGET_SIZE_2-17));i++)
   {
     u_int bitmap=needs_clear_cache[i];
     if(bitmap) {
-      u_int start,end;
+      u_char *start, *end;
       for(j=0;j<32;j++)
       {
         if(bitmap&(1<<j)) {
-          start=(u_int)BASE_ADDR+i*131072+j*4096;
+          start=translation_cache+i*131072+j*4096;
           end=start+4095;
           j++;
           while(j<32) {
@@ -4042,7 +2713,7 @@ void do_clear_cache()
               end+=4096;
               j++;
             }else{
-              __clear_cache((void *)start,(void *)end);
+              end_tcache_write(start, end);
               break;
             }
           }