X-Git-Url: https://notaz.gp2x.de/cgi-bin/gitweb.cgi?p=pcsx_rearmed.git;a=blobdiff_plain;f=libpcsxcore%2Fnew_dynarec%2Fassem_arm64.c;h=0b49221137710b369ca693706acb71af5aaddd26;hp=63c6866b3dacd93a6726273fc4130a3754ba809b;hb=2330734fa3064bf3a159c3c56f9a2e005598360e;hpb=39b71d9abccb93457f17df887e50507a91390a78 diff --git a/libpcsxcore/new_dynarec/assem_arm64.c b/libpcsxcore/new_dynarec/assem_arm64.c index 63c6866b..0b492211 100644 --- a/libpcsxcore/new_dynarec/assem_arm64.c +++ b/libpcsxcore/new_dynarec/assem_arm64.c @@ -23,8 +23,6 @@ #include "pcnt.h" #include "arm_features.h" -#define CALLER_SAVE_REGS 0x0007ffff - #define unused __attribute__((unused)) void do_memhandler_pre(); @@ -462,6 +460,7 @@ static void emit_loadreg(u_int r, u_int hr) case CCREG: addr = &cycle_count; break; case CSREG: addr = &Status; break; case INVCP: addr = &invc_ptr; is64 = 1; break; + case ROREG: addr = &ram_offset; is64 = 1; break; default: assert(r < 34); break; } if (is64) @@ -623,11 +622,6 @@ static void emit_addimm_and_set_flags(int imm, u_int rt) emit_addimm_s(1, 0, rt, imm, rt); } -static void emit_addimm_no_flags(u_int imm,u_int rt) -{ - emit_addimm(rt,imm,rt); -} - static void emit_logicop_imm(u_int op, u_int rs, u_int imm, u_int rt) { const char *names[] = { "and", "orr", "eor", "ands" }; @@ -1337,7 +1331,27 @@ static int is_similar_value(u_int v1, u_int v2) || is_rotated_mask(v1 ^ v2); } -// trashes r2 +static void emit_movimm_from64(u_int rs_val, u_int rs, uintptr_t rt_val, u_int rt) +{ + if (rt_val < 0x100000000ull) { + emit_movimm_from(rs_val, rs, rt_val, rt); + return; + } + // just move the whole thing. At least on Linux all addresses + // seem to be 48bit, so 3 insns - not great not terrible + assem_debug("movz %s,#%#lx\n", regname64[rt], rt_val & 0xffff); + output_w32(0xd2800000 | imm16_rd(rt_val & 0xffff, rt)); + assem_debug("movk %s,#%#lx,lsl #16\n", regname64[rt], (rt_val >> 16) & 0xffff); + output_w32(0xf2a00000 | imm16_rd((rt_val >> 16) & 0xffff, rt)); + assem_debug("movk %s,#%#lx,lsl #32\n", regname64[rt], (rt_val >> 32) & 0xffff); + output_w32(0xf2c00000 | imm16_rd((rt_val >> 32) & 0xffff, rt)); + if (rt_val >> 48) { + assem_debug("movk %s,#%#lx,lsl #48\n", regname64[rt], (rt_val >> 48) & 0xffff); + output_w32(0xf2e00000 | imm16_rd((rt_val >> 48) & 0xffff, rt)); + } +} + +// trashes x2 static void pass_args64(u_int a0, u_int a1) { if(a0==1&&a1==0) { @@ -1445,7 +1459,7 @@ static void do_readstub(int n) int cc=get_reg(i_regmap,CCREG); if(cc<0) emit_loadreg(CCREG,2); - emit_addimm(cc<0?2:cc,CLOCK_ADJUST((int)stubs[n].d),2); + emit_addimm(cc<0?2:cc,(int)stubs[n].d,2); emit_far_call(handler); // (no cycle reload after read) if(dops[i].itype==C1LS||dops[i].itype==C2LS||(rt>=0&&dops[i].rt1!=0)) { @@ -1468,17 +1482,14 @@ static void inline_readstub(enum stub_type type, int i, u_int addr, uintptr_t host_addr = 0; void *handler; int cc=get_reg(regmap,CCREG); - //if(pcsx_direct_read(type,addr,CLOCK_ADJUST(adj),cc,target?rs:-1,rt)) + //if(pcsx_direct_read(type,addr,adj,cc,target?rs:-1,rt)) // return; handler = get_direct_memhandler(mem_rtab, addr, type, &host_addr); if (handler == NULL) { if(rt<0||dops[i].rt1==0) return; - if (addr != host_addr) { - if (host_addr >= 0x100000000ull) - abort(); // ROREG not implemented - emit_movimm_from(addr, rs, host_addr, rs); - } + if (addr != host_addr) + emit_movimm_from64(addr, rs, host_addr, rs); switch(type) { case LOADB_STUB: emit_movsbl_indexed(0,rs,rt); break; case LOADBU_STUB: emit_movzbl_indexed(0,rs,rt); break; @@ -1489,8 +1500,8 @@ static void inline_readstub(enum stub_type type, int i, u_int addr, } return; } - is_dynamic=pcsxmem_is_handler_dynamic(addr); - if(is_dynamic) { + is_dynamic = pcsxmem_is_handler_dynamic(addr); + if (is_dynamic) { if(type==LOADB_STUB||type==LOADBU_STUB) handler=jump_handler_read8; if(type==LOADH_STUB||type==LOADHU_STUB) @@ -1509,7 +1520,7 @@ static void inline_readstub(enum stub_type type, int i, u_int addr, emit_mov(rs,0); if(cc<0) emit_loadreg(CCREG,2); - emit_addimm(cc<0?2:cc,CLOCK_ADJUST(adj),2); + emit_addimm(cc<0?2:cc,adj,2); if(is_dynamic) { uintptr_t l1 = ((uintptr_t *)mem_rtab)[addr>>12] << 1; emit_adrp((void *)l1, 1); @@ -1586,7 +1597,6 @@ static void do_writestub(int n) emit_jmp(stubs[n].retaddr); // return address (invcode check) set_jump_target(handler_jump, out); - // TODO FIXME: regalloc should prefer callee-saved regs if(!regs_saved) save_regs(reglist); void *handler=NULL; @@ -1605,10 +1615,10 @@ static void do_writestub(int n) int cc=get_reg(i_regmap,CCREG); if(cc<0) emit_loadreg(CCREG,2); - emit_addimm(cc<0?2:cc,CLOCK_ADJUST((int)stubs[n].d),2); + emit_addimm(cc<0?2:cc,(int)stubs[n].d,2); // returns new cycle_count emit_far_call(handler); - emit_addimm(0,-CLOCK_ADJUST((int)stubs[n].d),cc<0?2:cc); + emit_addimm(0,-(int)stubs[n].d,cc<0?2:cc); if(cc<0) emit_storereg(CCREG,2); if(restore_jump) @@ -1627,11 +1637,8 @@ static void inline_writestub(enum stub_type type, int i, u_int addr, uintptr_t host_addr = 0; void *handler = get_direct_memhandler(mem_wtab, addr, type, &host_addr); if (handler == NULL) { - if (addr != host_addr) { - if (host_addr >= 0x100000000ull) - abort(); // ROREG not implemented - emit_movimm_from(addr, rs, host_addr, rs); - } + if (addr != host_addr) + emit_movimm_from64(addr, rs, host_addr, rs); switch (type) { case STOREB_STUB: emit_writebyte_indexed(rt, 0, rs); break; case STOREH_STUB: emit_writehword_indexed(rt, 0, rs); break; @@ -1649,12 +1656,12 @@ static void inline_writestub(enum stub_type type, int i, u_int addr, cc = cc_use = get_reg(regmap, CCREG); if (cc < 0) emit_loadreg(CCREG, (cc_use = 2)); - emit_addimm(cc_use, CLOCK_ADJUST(adj), 2); + emit_addimm(cc_use, adj, 2); emit_far_call(do_memhandler_pre); emit_far_call(handler); emit_far_call(do_memhandler_post); - emit_addimm(0, -CLOCK_ADJUST(adj), cc_use); + emit_addimm(0, -adj, cc_use); if (cc < 0) emit_storereg(CCREG, cc_use); restore_regs(reglist); @@ -1882,7 +1889,7 @@ static void c2op_mfc2_29_assemble(signed char tl, signed char temp) host_tempreg_release(); } -static void multdiv_assemble_arm64(int i,struct regstat *i_regs) +static void multdiv_assemble_arm64(int i, const struct regstat *i_regs) { // case 0x18: MULT // case 0x19: MULTU