X-Git-Url: https://notaz.gp2x.de/cgi-bin/gitweb.cgi?p=pcsx_rearmed.git;a=blobdiff_plain;f=libpcsxcore%2Fnew_dynarec%2Femu_if.c;h=588bc631832f975c41564287bfd63b0f2049c9fc;hp=485a7c843382936f20972233b768abe8ae90fe6e;hb=448bbcae9cc8f72f2e1d893c6ae8e071ca2b7aa9;hpb=054175e91a93116649ea1802790cb842516a85dc

diff --git a/libpcsxcore/new_dynarec/emu_if.c b/libpcsxcore/new_dynarec/emu_if.c
index 485a7c84..588bc631 100644
--- a/libpcsxcore/new_dynarec/emu_if.c
+++ b/libpcsxcore/new_dynarec/emu_if.c
@@ -30,28 +30,19 @@ u32 event_cycles[PSXINT_COUNT];
 static void schedule_timeslice(void)
 {
 	u32 i, c = psxRegs.cycle;
+	u32 irqs = psxRegs.interrupt;
 	s32 min, dif;
 
-	min = psxNextsCounter + psxNextCounter - c;
-	for (i = 0; i < ARRAY_SIZE(event_cycles); i++) {
+	min = PSXCLK;
+	for (i = 0; irqs != 0; i++, irqs >>= 1) {
+		if (!(irqs & 1))
+			continue;
 		dif = event_cycles[i] - c;
 		//evprintf("  ev %d\n", dif);
 		if (0 < dif && dif < min)
 			min = dif;
 	}
 	next_interupt = c + min;
-
-#if 0
-	static u32 cnt, last_cycle;
-	static u64 sum;
-	if (last_cycle) {
-		cnt++;
-		sum += psxRegs.cycle - last_cycle;
-		if ((cnt & 0xff) == 0)
-			printf("%u\n", (u32)(sum / cnt));
-	}
-	last_cycle = psxRegs.cycle;
-#endif
 }
 
 typedef void (irq_func)();
@@ -68,6 +59,7 @@ static irq_func * const irq_funcs[] = {
 	[PSXINT_CDRDMA] = cdrDmaInterrupt,
 	[PSXINT_CDRLID] = cdrLidSeekInterrupt,
 	[PSXINT_CDRPLAY] = cdrPlayInterrupt,
+	[PSXINT_RCNT] = psxRcntUpdate,
 };
 
 /* local dupe of psxBranchTest, using event_cycles */
@@ -77,9 +69,6 @@ static void irq_test(void)
 	u32 cycle = psxRegs.cycle;
 	u32 irq, irq_bits;
 
-	if ((psxRegs.cycle - psxNextsCounter) >= psxNextCounter)
-		psxRcntUpdate();
-
 	// irq_funcs() may queue more irqs
 	psxRegs.interrupt = 0;
 
@@ -121,6 +110,8 @@ void pcsx_mtc0(u32 reg, u32 val)
 	evprintf("MTC0 %d #%x @%08x %u\n", reg, val, psxRegs.pc, psxRegs.cycle);
 	MTC0(reg, val);
 	gen_interupt();
+	if (Cause & Status & 0x0300) // possible sw irq
+		pending_exception = 1;
 }
 
 void pcsx_mtc0_ds(u32 reg, u32 val)
@@ -131,15 +122,26 @@ void pcsx_mtc0_ds(u32 reg, u32 val)
 
 void new_dyna_save(void)
 {
+	psxRegs.interrupt &= ~(1 << PSXINT_RCNT); // old savestate compat
+
 	// psxRegs.intCycle is always maintained, no need to convert
 }
 
+void new_dyna_after_save(void)
+{
+	psxRegs.interrupt |= 1 << PSXINT_RCNT;
+}
+
 void new_dyna_restore(void)
 {
 	int i;
 	for (i = 0; i < PSXINT_COUNT; i++)
 		event_cycles[i] = psxRegs.intCycle[i].sCycle + psxRegs.intCycle[i].cycle;
 
+	event_cycles[PSXINT_RCNT] = psxNextsCounter + psxNextCounter;
+	psxRegs.interrupt |=  1 << PSXINT_RCNT;
+	psxRegs.interrupt &= (1 << PSXINT_COUNT) - 1;
+
 	new_dyna_pcsx_mem_load_state();
 }
 
@@ -208,13 +210,13 @@ const uint64_t gte_reg_reads[64] = {
 	[GTE_OP]    = GCBITS3(0,2,4)       | GDBITS3(9,10,11),
 	[GTE_DPCS]  = GCBITS3(21,22,23)    | GDBITS4(6,8,21,22),
 	[GTE_INTPL] = GCBITS3(21,22,23)    | GDBITS7(6,8,9,10,11,21,22),
-	[GTE_MVMVA] = 0x00ffffff00000000ll | GDBITS6(0,1,2,3,4,5), // XXX: maybe decode further?
-	[GTE_NCDS]  = 0x00ffff0000000000ll | GDBITS5(0,1,6,21,22),
-	[GTE_CDP]   = 0x00fff00000000000ll | GDBITS7(6,8,9,10,11,21,22),
+	[GTE_MVMVA] = 0x00ffffff00000000ll | GDBITS9(0,1,2,3,4,5,9,10,11), // XXX: maybe decode further?
+	[GTE_NCDS]  = 0x00ffff0000000000ll | GDBITS6(0,1,6,8,21,22),
+	[GTE_CDP]   = 0x00ffe00000000000ll | GDBITS7(6,8,9,10,11,21,22),
 	[GTE_NCDT]  = 0x00ffff0000000000ll | GDBITS8(0,1,2,3,4,5,6,8),
-	[GTE_NCCS]  = 0x00ffff0000000000ll | GDBITS6(0,1,6,8,21,22),
+	[GTE_NCCS]  = 0x001fff0000000000ll | GDBITS5(0,1,6,21,22),
 	[GTE_CC]    = 0x001fe00000000000ll | GDBITS6(6,9,10,11,21,22),
-	[GTE_NCS]   = 0x001fff0000000000ll | GDBITS4(0,1,21,22),
+	[GTE_NCS]   = 0x001fff0000000000ll | GDBITS5(0,1,6,21,22),
 	[GTE_NCT]   = 0x001fff0000000000ll | GDBITS7(0,1,2,3,4,5,6),
 	[GTE_SQR]   =                        GDBITS3(9,10,11),
 	[GTE_DCPL]  = GCBITS3(21,22,23)    | GDBITS7(6,8,9,10,11,21,22),
@@ -266,7 +268,7 @@ static int ari64_init()
 		if (psxCP2[i] != psxNULL)
 			gte_handlers[i] = psxCP2[i];
 
-#if !defined(DRC_DBG) && !defined(PCNT)
+#if !defined(DRC_DBG)
 #ifdef __arm__
 	gte_handlers[0x06] = gteNCLIP_arm;
 	gte_handlers_nf[0x01] = gteRTPS_nf_arm;
@@ -356,7 +358,7 @@ extern void intExecuteBlockT();
 R3000Acpu psxRec = {
 	ari64_init,
 	ari64_reset,
-#if defined(__arm__)
+#ifndef DRC_DISABLE
 	ari64_execute,
 	ari64_execute_until,
 #else
@@ -373,16 +375,17 @@ void do_insn_trace() {}
 void do_insn_cmp() {}
 #endif
 
-#if defined(__x86_64__) || defined(__i386__)
+#ifdef DRC_DISABLE
 unsigned int address;
 int pending_exception, stop;
 unsigned int next_interupt;
 int new_dynarec_did_compile;
 int cycle_multiplier;
+int new_dynarec_hacks;
 void *psxH_ptr;
 void *zeromem_ptr;
 u8 zero_mem[0x1000];
-void new_dynarec_init() {}
+void new_dynarec_init() { (void)ari64_execute; }
 void new_dyna_start() {}
 void new_dynarec_cleanup() {}
 void new_dynarec_clear_full() {}
@@ -428,16 +431,18 @@ void do_insn_trace(void)
 	static psxRegisters oldregs;
 	static u32 old_io_addr = (u32)-1;
 	static u32 old_io_data = 0xbad0c0de;
+	static u32 event_cycles_o[PSXINT_COUNT];
 	u32 *allregs_p = (void *)&psxRegs;
 	u32 *allregs_o = (void *)&oldregs;
 	u32 io_data;
 	int i;
 	u8 byte;
 
-//last_io_addr = 0x5e2c8;
+	//last_io_addr = 0x5e2c8;
 	if (f == NULL)
 		f = fopen("tracelog", "wb");
 
+	// log reg changes
 	oldregs.code = psxRegs.code; // don't care
 	for (i = 0; i < offsetof(psxRegisters, intCycle) / 4; i++) {
 		if (allregs_p[i] != allregs_o[i]) {
@@ -446,6 +451,17 @@ void do_insn_trace(void)
 			allregs_o[i] = allregs_p[i];
 		}
 	}
+	// log event changes
+	for (i = 0; i < PSXINT_COUNT; i++) {
+		if (event_cycles[i] != event_cycles_o[i]) {
+			byte = 0xfc;
+			fwrite(&byte, 1, 1, f);
+			fwrite(&i, 1, 1, f);
+			fwrite(&event_cycles[i], 1, 4, f);
+			event_cycles_o[i] = event_cycles[i];
+		}
+	}
+	// log last io
 	if (old_io_addr != last_io_addr) {
 		byte = 0xfd;
 		fwrite(&byte, 1, 1, f);
@@ -524,7 +540,8 @@ void do_insn_cmp(void)
 	u32 *allregs_p = (void *)&psxRegs;
 	u32 *allregs_e = (void *)&rregs;
 	static u32 ppc, failcount;
-	int i, ret, bad = 0;
+	int i, ret, bad = 0, which_event = -1;
+	u32 ev_cycles = 0;
 	u8 code;
 
 	if (f == NULL)
@@ -537,18 +554,20 @@ void do_insn_cmp(void)
 			break;
 		if (code == 0xff)
 			break;
-		if (code == 0xfd) {
-			if ((ret = fread(&mem_addr, 1, 4, f)) <= 0)
-				break;
+		switch (code) {
+		case 0xfc:
+			which_event = 0;
+			fread(&which_event, 1, 1, f);
+			fread(&ev_cycles, 1, 4, f);
 			continue;
-		}
-		if (code == 0xfe) {
-			if ((ret = fread(&mem_val, 1, 4, f)) <= 0)
-				break;
+		case 0xfd:
+			fread(&mem_addr, 1, 4, f);
+			continue;
+		case 0xfe:
+			fread(&mem_val, 1, 4, f);
 			continue;
 		}
-		if ((ret = fread(&allregs_e[code], 1, 4, f)) <= 0)
-			break;
+		fread(&allregs_e[code], 1, 4, f);
 	}
 
 	if (ret <= 0) {
@@ -560,7 +579,7 @@ void do_insn_cmp(void)
 	psxRegs.cycle = rregs.cycle;
 	psxRegs.CP0.r[9] = rregs.CP0.r[9]; // Count
 
-//if (psxRegs.cycle == 166172) breakme();
+	//if (psxRegs.cycle == 166172) breakme();
 
 	if (memcmp(&psxRegs, &rregs, offsetof(psxRegisters, intCycle)) == 0 &&
 			mem_val == memcheck_read(mem_addr)
@@ -581,6 +600,11 @@ void do_insn_cmp(void)
 		goto end;
 	}
 
+	if (which_event >= 0 && event_cycles[which_event] != ev_cycles) {
+		printf("bad ev_cycles #%d: %08x %08x\n", which_event, event_cycles[which_event], ev_cycles);
+		goto end;
+	}
+
 	if (psxRegs.pc == rregs.pc && bad < 6 && failcount < 32) {
 		static int last_mcycle;
 		if (last_mcycle != psxRegs.cycle >> 20) {