X-Git-Url: https://notaz.gp2x.de/cgi-bin/gitweb.cgi?p=pcsx_rearmed.git;a=blobdiff_plain;f=libpcsxcore%2Fnew_dynarec%2Femu_if.c;h=62b9176b370c88af1c64ae2019d51241fa503d25;hp=b7a248907547e0ebf546b0e28ce497d44ea87ddf;hb=be516ebe45e48044b599e9d9f9f2d296c3f3ee62;hpb=03f55e6b49eb81d099f33b67ee6b5fa4620a54bc

diff --git a/libpcsxcore/new_dynarec/emu_if.c b/libpcsxcore/new_dynarec/emu_if.c
index b7a24890..62b9176b 100644
--- a/libpcsxcore/new_dynarec/emu_if.c
+++ b/libpcsxcore/new_dynarec/emu_if.c
@@ -25,7 +25,6 @@
 #define evprintf(...)
 
 char invalid_code[0x100000];
-static u32 scratch_buf[8*8*2] __attribute__((aligned(64)));
 u32 event_cycles[PSXINT_COUNT];
 
 static void schedule_timeslice(void)
@@ -191,6 +190,8 @@ void new_dyna_freeze(void *f, int mode)
 	//printf("drc: %d block info entries %s\n", size/8, mode ? "saved" : "loaded");
 }
 
+#ifndef DRC_DISABLE
+
 /* GTE stuff */
 void *gte_handlers[64];
 
@@ -303,9 +304,10 @@ const uint64_t gte_reg_writes[64] = {
 
 static int ari64_init()
 {
+	static u32 scratch_buf[8*8*2] __attribute__((aligned(64)));
 	extern void (*psxCP2[64])();
 	extern void psxNULL();
-	extern u_char *out;
+	extern unsigned char *out;
 	size_t i;
 
 	new_dynarec_init();
@@ -360,7 +362,7 @@ static void ari64_execute_until()
 	evprintf("ari64_execute %08x, %u->%u (%d)\n", psxRegs.pc,
 		psxRegs.cycle, next_interupt, next_interupt - psxRegs.cycle);
 
-	new_dyna_start();
+	new_dyna_start(dynarec_local);
 
 	evprintf("ari64_execute end %08x, %u->%u (%d)\n", psxRegs.pc,
 		psxRegs.cycle, next_interupt, next_interupt - psxRegs.cycle);
@@ -378,7 +380,7 @@ static void ari64_clear(u32 addr, u32 size)
 {
 	u32 start, end, main_ram;
 
-	size *= 4; /* PCSX uses DMA units */
+	size *= 4; /* PCSX uses DMA units (words) */
 
 	evprintf("ari64_clear %08x %04x\n", addr, size);
 
@@ -393,42 +395,44 @@ static void ari64_clear(u32 addr, u32 size)
 			invalidate_block(start);
 }
 
+#ifdef ICACHE_EMULATION
+static void ari64_notify(int note, void *data) {
+	/*
+	Should be fixed when ARM dynarec has proper icache emulation.
+	switch (note)
+	{
+		case R3000ACPU_NOTIFY_CACHE_UNISOLATED:
+			break;
+		case R3000ACPU_NOTIFY_CACHE_ISOLATED:
+		Sent from psxDma3().
+		case R3000ACPU_NOTIFY_DMA3_EXE_LOAD:
+		default:
+			break;
+	}
+	*/
+}
+#endif
+
 static void ari64_shutdown()
 {
 	new_dynarec_cleanup();
 	new_dyna_pcsx_mem_shutdown();
 }
 
-extern void intExecute();
-extern void intExecuteT();
-extern void intExecuteBlock();
-extern void intExecuteBlockT();
-#ifndef DRC_DBG
-#define intExecuteT intExecute
-#define intExecuteBlockT intExecuteBlock
-#endif
-
 R3000Acpu psxRec = {
 	ari64_init,
 	ari64_reset,
-#ifndef DRC_DISABLE
 	ari64_execute,
 	ari64_execute_until,
-#else
-	intExecuteT,
-	intExecuteBlockT,
-#endif
 	ari64_clear,
+#ifdef ICACHE_EMULATION
+	ari64_notify,
+#endif
 	ari64_shutdown
 };
 
-// TODO: rm
-#ifndef DRC_DBG
-void do_insn_trace() {}
-void do_insn_cmp() {}
-#endif
+#else // if DRC_DISABLE
 
-#ifdef DRC_DISABLE
 unsigned int address;
 int pending_exception, stop;
 unsigned int next_interupt;
@@ -438,11 +442,11 @@ int new_dynarec_hacks;
 void *psxH_ptr;
 void *zeromem_ptr;
 u8 zero_mem[0x1000];
-u_char *out;
+unsigned char *out;
 void *mem_rtab;
 void *scratch_buf_ptr;
-void new_dynarec_init() { (void)ari64_execute; }
-void new_dyna_start() {}
+void new_dynarec_init() {}
+void new_dyna_start(void *context) {}
 void new_dynarec_cleanup() {}
 void new_dynarec_clear_full() {}
 void invalidate_all_pages() {}
@@ -485,6 +489,7 @@ static u32 memcheck_read(u32 a)
 	return *(u32 *)(psxM + (a & 0x1ffffc));
 }
 
+#if 0
 void do_insn_trace(void)
 {
 	static psxRegisters oldregs;
@@ -546,6 +551,7 @@ void do_insn_trace(void)
 	}
 #endif
 }
+#endif
 
 static const char *regnames[offsetof(psxRegisters, intCycle) / 4] = {
 	"r0",  "r1",  "r2",  "r3",  "r4",  "r5",  "r6",  "r7",