X-Git-Url: https://notaz.gp2x.de/cgi-bin/gitweb.cgi?p=pcsx_rearmed.git;a=blobdiff_plain;f=libpcsxcore%2Fnew_dynarec%2Femu_if.c;h=69576896f91bfe7397b2bb6e2a2b01dd21916a41;hp=fbd4f9647f62c9b83eda07a54956d2457054d314;hb=b1be1eeee94d3547c20719acfa6b0082404897f1;hpb=59774ed0120d20c731ee20da88ba6356d184dc8a

diff --git a/libpcsxcore/new_dynarec/emu_if.c b/libpcsxcore/new_dynarec/emu_if.c
index fbd4f964..69576896 100644
--- a/libpcsxcore/new_dynarec/emu_if.c
+++ b/libpcsxcore/new_dynarec/emu_if.c
@@ -116,17 +116,17 @@ void gen_interupt()
 // from interpreter
 extern void MTC0(int reg, u32 val);
 
-void pcsx_mtc0(u32 reg)
+void pcsx_mtc0(u32 reg, u32 val)
 {
-	evprintf("MTC0 %d #%x @%08x %u\n", reg, readmem_word, psxRegs.pc, psxRegs.cycle);
-	MTC0(reg, readmem_word);
+	evprintf("MTC0 %d #%x @%08x %u\n", reg, val, psxRegs.pc, psxRegs.cycle);
+	MTC0(reg, val);
 	gen_interupt();
 }
 
-void pcsx_mtc0_ds(u32 reg)
+void pcsx_mtc0_ds(u32 reg, u32 val)
 {
-	evprintf("MTC0 %d #%x @%08x %u\n", reg, readmem_word, psxRegs.pc, psxRegs.cycle);
-	MTC0(reg, readmem_word);
+	evprintf("MTC0 %d #%x @%08x %u\n", reg, val, psxRegs.pc, psxRegs.cycle);
+	MTC0(reg, val);
 }
 
 void new_dyna_save(void)
@@ -139,6 +139,8 @@ void new_dyna_restore(void)
 	int i;
 	for (i = 0; i < PSXINT_COUNT; i++)
 		event_cycles[i] = psxRegs.intCycle[i].sCycle + psxRegs.intCycle[i].cycle;
+
+	new_dyna_pcsx_mem_load_state();
 }
 
 void *gte_handlers[64];
@@ -154,6 +156,17 @@ void *gte_handlers_nf[64] = {
 	NULL      , NULL       , NULL       , NULL      , NULL     , gteGPF_nf  , gteGPL_nf  , gteNCCT_nf, // 38
 };
 
+const char *gte_regnames[64] = {
+	NULL  , "RTPS" , NULL   , NULL  , NULL , NULL   , "NCLIP", NULL  , // 00
+	NULL  , NULL   , NULL   , NULL  , "OP" , NULL   , NULL   , NULL  , // 08
+	"DPCS", "INTPL", "MVMVA", "NCDS", "CDP", NULL   , "NCDT" , NULL  , // 10
+	NULL  , NULL   , NULL   , "NCCS", "CC" , NULL   , "NCS"  , NULL  , // 18
+	"NCT" , NULL   , NULL   , NULL  , NULL , NULL   , NULL   , NULL  , // 20
+	"SQR" , "DCPL" , "DPCT" , NULL  , NULL , "AVSZ3", "AVSZ4", NULL  , // 28 
+	"RTPT", NULL   , NULL   , NULL  , NULL , NULL   , NULL   , NULL  , // 30
+	NULL  , NULL   , NULL   , NULL  , NULL , "GPF"  , "GPL"  , "NCCT", // 38
+};
+
 /* from gte.txt.. not sure if this is any good. */
 const char gte_cycletab[64] = {
 	/*   1   2   3   4   5   6   7   8   9   a   b   c   d   e   f */
@@ -179,13 +192,19 @@ static int ari64_init()
 #if !defined(DRC_DBG) && !defined(PCNT)
 #ifdef __arm__
 	gte_handlers[0x06] = gteNCLIP_arm;
+	gte_handlers_nf[0x01] = gteRTPS_nf_arm;
+	gte_handlers_nf[0x30] = gteRTPT_nf_arm;
 #endif
 #ifdef __ARM_NEON__
 	// compiler's _nf version is still a lot slower then neon
+	// _nf_arm RTPS is roughly the same, RTPT slower
 	gte_handlers[0x01] = gte_handlers_nf[0x01] = gteRTPS_neon;
 	gte_handlers[0x30] = gte_handlers_nf[0x30] = gteRTPT_neon;
 	gte_handlers[0x12] = gte_handlers_nf[0x12] = gteMVMVA_neon;
 #endif
+#endif
+#ifdef DRC_DBG
+	memcpy(gte_handlers_nf, gte_handlers, sizeof(gte_handlers_nf));
 #endif
 	psxH_ptr = psxH;
 
@@ -283,6 +302,8 @@ unsigned short hword;
 unsigned char byte;
 int pending_exception, stop;
 unsigned int next_interupt;
+int new_dynarec_did_compile;
+int cycle_multiplier;
 void *psxH_ptr;
 void new_dynarec_init() {}
 void new_dyna_start() {}
@@ -292,6 +313,7 @@ void invalidate_all_pages() {}
 void invalidate_block(unsigned int block) {}
 void new_dyna_pcsx_mem_init(void) {}
 void new_dyna_pcsx_mem_reset(void) {}
+void new_dyna_pcsx_mem_load_state(void) {}
 #endif
 
 #ifdef DRC_DBG