X-Git-Url: https://notaz.gp2x.de/cgi-bin/gitweb.cgi?p=pcsx_rearmed.git;a=blobdiff_plain;f=libpcsxcore%2Fnew_dynarec%2Femu_if.c;h=a37f7a279491cf71957b329afa4007344a7f5881;hp=68b0e82213a2f6a4936c10f344fea013b6cb1e46;hb=e4eb18c1d2acc12f429723a3a65687eb2dc7eefb;hpb=4cb76aa4e037a59c85d0fa256fb85fe11d3405af diff --git a/libpcsxcore/new_dynarec/emu_if.c b/libpcsxcore/new_dynarec/emu_if.c index 68b0e822..a37f7a27 100644 --- a/libpcsxcore/new_dynarec/emu_if.c +++ b/libpcsxcore/new_dynarec/emu_if.c @@ -1,20 +1,27 @@ -// pending_exception? -// swi 0 in do_unalignedwritestub? +/* + * (C) Gražvydas "notaz" Ignotas, 2010 + * + * This work is licensed under the terms of GNU GPL version 2 or later. + * See the COPYING file in the top-level directory. + */ + #include #include "emu_if.h" -#include "../psxmem.h" +#include "pcsxmem.h" #include "../psxhle.h" +#include "../r3000a.h" +#include "../cdrom.h" +#include "../psxdma.h" +#include "../mdec.h" #define ARRAY_SIZE(x) (sizeof(x) / sizeof(x[0])) -//#define memprintf printf -#define memprintf(...) //#define evprintf printf #define evprintf(...) char invalid_code[0x100000]; -u32 event_cycles[7]; +u32 event_cycles[PSXINT_COUNT]; static void schedule_timeslice(void) { @@ -43,6 +50,48 @@ static void schedule_timeslice(void) #endif } +typedef void (irq_func)(); + +static irq_func * const irq_funcs[] = { + [PSXINT_SIO] = sioInterrupt, + [PSXINT_CDR] = cdrInterrupt, + [PSXINT_CDREAD] = cdrReadInterrupt, + [PSXINT_GPUDMA] = gpuInterrupt, + [PSXINT_MDECOUTDMA] = mdec1Interrupt, + [PSXINT_SPUDMA] = spuInterrupt, + [PSXINT_MDECINDMA] = mdec0Interrupt, + [PSXINT_GPUOTCDMA] = gpuotcInterrupt, +}; + +/* local dupe of psxBranchTest, using event_cycles */ +static void irq_test(void) +{ + u32 irqs = psxRegs.interrupt; + u32 cycle = psxRegs.cycle; + u32 irq, irq_bits; + + if ((psxRegs.cycle - psxNextsCounter) >= psxNextCounter) + psxRcntUpdate(); + + // irq_funcs() may queue more irqs + psxRegs.interrupt = 0; + + for (irq = 0, irq_bits = irqs; irq_bits != 0; irq++, irq_bits >>= 1) { + if (!(irq_bits & 1)) + continue; + if ((s32)(cycle - event_cycles[irq]) >= 0) { + irqs &= ~(1 << irq); + irq_funcs[irq](); + } + } + psxRegs.interrupt |= irqs; + + if ((psxHu32(0x1070) & psxHu32(0x1074)) && (Status & 0x401) == 0x401) { + psxException(0x400, 0); + pending_exception = 1; + } +} + void gen_interupt() { evprintf(" +ge %08x, %u->%u\n", psxRegs.pc, psxRegs.cycle, next_interupt); @@ -50,78 +99,44 @@ void gen_interupt() psxRegs.cycle += 2; #endif - psxBranchTest(); + irq_test(); + //psxBranchTest(); + //pending_exception = 1; schedule_timeslice(); evprintf(" -ge %08x, %u->%u (%d)\n", psxRegs.pc, psxRegs.cycle, next_interupt, next_interupt - psxRegs.cycle); - - pending_exception = 1; /* FIXME */ -} - -void MTC0_() -{ - extern void psxMTC0(); - - evprintf("ari64 MTC0 %08x %08x %u\n", psxRegs.code, psxRegs.pc, psxRegs.cycle); - psxMTC0(); - gen_interupt(); /* FIXME: checking pending irqs should be enough */ } -void check_interupt() -{ - printf("ari64_check_interupt\n"); -} - -void read_nomem_new() -{ - printf("ari64_read_nomem_new\n"); -} +// from interpreter +extern void MTC0(int reg, u32 val); -static void read_mem8() +void pcsx_mtc0(u32 reg) { - memprintf("ari64_read_mem8 %08x @%08x %u\n", address, psxRegs.pc, psxRegs.cycle); - readmem_word = psxMemRead8(address) & 0xff; + evprintf("MTC0 %d #%x @%08x %u\n", reg, readmem_word, psxRegs.pc, psxRegs.cycle); + MTC0(reg, readmem_word); + gen_interupt(); } -static void read_mem16() +void pcsx_mtc0_ds(u32 reg) { - memprintf("ari64_read_mem16 %08x @%08x %u\n", address, psxRegs.pc, psxRegs.cycle); - readmem_word = psxMemRead16(address) & 0xffff; + evprintf("MTC0 %d #%x @%08x %u\n", reg, readmem_word, psxRegs.pc, psxRegs.cycle); + MTC0(reg, readmem_word); } -static void read_mem32() +void new_dyna_save(void) { - memprintf("ari64_read_mem32 %08x @%08x %u\n", address, psxRegs.pc, psxRegs.cycle); - readmem_word = psxMemRead32(address); + // psxRegs.intCycle is always maintained, no need to convert } -static void write_mem8() +void new_dyna_restore(void) { - memprintf("ari64_write_mem8 %08x, %02x @%08x %u\n", address, byte, psxRegs.pc, psxRegs.cycle); - psxMemWrite8(address, byte); -} - -static void write_mem16() -{ - memprintf("ari64_write_mem16 %08x, %04x @%08x %u\n", address, hword, psxRegs.pc, psxRegs.cycle); - psxMemWrite16(address, hword); -} - -static void write_mem32() -{ - memprintf("ari64_write_mem32 %08x, %08x @%08x %u\n", address, word, psxRegs.pc, psxRegs.cycle); - psxMemWrite32(address, word); + int i; + for (i = 0; i < PSXINT_NEWDRC_CHECK; i++) + event_cycles[i] = psxRegs.intCycle[i].sCycle + psxRegs.intCycle[i].cycle; } -void (*readmem[0x10000])(); -void (*readmemb[0x10000])(); -void (*readmemh[0x10000])(); -void (*writemem[0x10000])(); -void (*writememb[0x10000])(); -void (*writememh[0x10000])(); - void *gte_handlers[64]; /* from gte.txt.. not sure if this is any good. */ @@ -137,34 +152,32 @@ static int ari64_init() { extern void (*psxCP2[64])(); extern void psxNULL(); + extern void *psxH_ptr; size_t i; new_dynarec_init(); - - for (i = 0; i < ARRAY_SIZE(readmem); i++) { - readmemb[i] = read_mem8; - readmemh[i] = read_mem16; - readmem[i] = read_mem32; - writememb[i] = write_mem8; - writememh[i] = write_mem16; - writemem[i] = write_mem32; - } + new_dyna_pcsx_mem_init(); for (i = 0; i < ARRAY_SIZE(gte_handlers); i++) if (psxCP2[i] != psxNULL) gte_handlers[i] = psxCP2[i]; + psxH_ptr = psxH; + return 0; } static void ari64_reset() { printf("ari64_reset\n"); + new_dyna_pcsx_mem_reset(); invalidate_all_pages(); pending_exception = 1; } -static void ari64_execute() +// execute until predefined leave points +// (HLE softcall exit and BIOS fastboot end) +static void ari64_execute_until() { schedule_timeslice(); @@ -177,10 +190,20 @@ static void ari64_execute() psxRegs.cycle, next_interupt, next_interupt - psxRegs.cycle); } +static void ari64_execute() +{ + while (!stop) { + ari64_execute_until(); + evprintf("drc left @%08x\n", psxRegs.pc); + } +} + static void ari64_clear(u32 addr, u32 size) { u32 start, end; + size *= 4; /* PCSX uses DMA units */ + evprintf("ari64_clear %08x %04x\n", addr, size); /* check for RAM mirrors */ @@ -214,9 +237,9 @@ extern void intExecuteBlockT(); R3000Acpu psxRec = { ari64_init, ari64_reset, -#if 1 - ari64_execute, +#if defined(__arm__) ari64_execute, + ari64_execute_until, #else intExecuteT, intExecuteBlockT, @@ -237,11 +260,14 @@ unsigned short hword; unsigned char byte; int pending_exception, stop; unsigned int next_interupt; +void *psxH_ptr; void new_dynarec_init() {} void new_dyna_start() {} void new_dynarec_cleanup() {} void invalidate_all_pages() {} void invalidate_block(unsigned int block) {} +void new_dyna_pcsx_mem_init(void) {} +void new_dyna_pcsx_mem_reset(void) {} #endif #ifdef DRC_DBG @@ -259,6 +285,21 @@ static void dump_mem(const char *fname, void *mem, size_t size) fclose(f1); } +static u32 memcheck_read(u32 a) +{ + if ((a >> 16) == 0x1f80) + // scratchpad/IO + return *(u32 *)(psxH + (a & 0xfffc)); + + if ((a >> 16) == 0x1f00) + // parallel + return *(u32 *)(psxP + (a & 0xfffc)); + +// if ((a & ~0xe0600000) < 0x200000) + // RAM + return *(u32 *)(psxM + (a & 0x1ffffc)); +} + void do_insn_trace(void) { static psxRegisters oldregs; @@ -266,7 +307,7 @@ void do_insn_trace(void) static u32 old_io_data = 0xbad0c0de; u32 *allregs_p = (void *)&psxRegs; u32 *allregs_o = (void *)&oldregs; - u32 *io_data; + u32 io_data; int i; u8 byte; @@ -288,12 +329,12 @@ void do_insn_trace(void) fwrite(&last_io_addr, 1, 4, f); old_io_addr = last_io_addr; } - io_data = (void *)(psxM + (last_io_addr&0x1ffffc)); - if (old_io_data != *io_data) { + io_data = memcheck_read(last_io_addr); + if (old_io_data != io_data) { byte = 0xfe; fwrite(&byte, 1, 1, f); - fwrite(io_data, 1, 4, f); - old_io_data = *io_data; + fwrite(&io_data, 1, 4, f); + old_io_data = io_data; } byte = 0xff; fwrite(&byte, 1, 1, f); @@ -393,16 +434,13 @@ void do_insn_cmp(void) } psxRegs.code = rregs.code; // don't care -psxRegs.cycle = rregs.cycle; -psxRegs.CP0.r[9] = rregs.CP0.r[9]; // Count + psxRegs.cycle = rregs.cycle; + psxRegs.CP0.r[9] = rregs.CP0.r[9]; // Count //if (psxRegs.cycle == 166172) breakme(); -//if (psxRegs.cycle > 11296376) printf("pc=%08x %u %08x\n", psxRegs.pc, psxRegs.cycle, psxRegs.interrupt); - - mem_addr &= 0x1ffffc; if (memcmp(&psxRegs, &rregs, offsetof(psxRegisters, intCycle)) == 0 && - mem_val == *(u32 *)(psxM + mem_addr) + mem_val == memcheck_read(mem_addr) ) { failcount = 0; goto ok; @@ -415,8 +453,8 @@ psxRegs.CP0.r[9] = rregs.CP0.r[9]; // Count } } - if (mem_val != *(u32 *)(psxM + mem_addr)) { - printf("bad mem @%08x: %08x %08x\n", mem_addr, *(u32 *)(psxM + mem_addr), mem_val); + if (mem_val != memcheck_read(mem_addr)) { + printf("bad mem @%08x: %08x %08x\n", mem_addr, memcheck_read(mem_addr), mem_val); goto end; } @@ -438,7 +476,7 @@ end: printf("-- %d\n", bad); for (i = 0; i < 8; i++) printf("r%d=%08x r%2d=%08x r%2d=%08x r%2d=%08x\n", i, allregs_p[i], - i+8, allregs_p[i+8], i+16, allregs_p[i+16], i+24, allregs_p[i+23]); + i+8, allregs_p[i+8], i+16, allregs_p[i+16], i+24, allregs_p[i+24]); printf("PC: %08x/%08x, cycle %u\n", psxRegs.pc, ppc, psxRegs.cycle); dump_mem("/mnt/ntz/dev/pnd/tmp/psxram.dump", psxM, 0x200000); dump_mem("/mnt/ntz/dev/pnd/tmp/psxregs.dump", psxH, 0x10000);