X-Git-Url: https://notaz.gp2x.de/cgi-bin/gitweb.cgi?p=pcsx_rearmed.git;a=blobdiff_plain;f=libpcsxcore%2Fnew_dynarec%2Femu_if.h;h=5783ad3f4acc456a70a9be0baf5c0917029be346;hp=17abab0bd5bacc294dec3cd2685a1d1c4b11e783;hb=be516ebe45e48044b599e9d9f9f2d296c3f3ee62;hpb=dd79da89fc4ddf020bb6f8d8c8a733429249bab3

diff --git a/libpcsxcore/new_dynarec/emu_if.h b/libpcsxcore/new_dynarec/emu_if.h
index 17abab0b..5783ad3f 100644
--- a/libpcsxcore/new_dynarec/emu_if.h
+++ b/libpcsxcore/new_dynarec/emu_if.h
@@ -7,6 +7,8 @@ extern char invalid_code[0x100000];
 #define EAX 0
 #define ECX 1
 
+extern int dynarec_local[];
+
 /* same as psxRegs */
 extern int reg[];
 
@@ -57,9 +59,6 @@ extern const char gte_cycletab[64];
 extern const uint64_t gte_reg_reads[64];
 extern const uint64_t gte_reg_writes[64];
 
-/* dummy */
-extern int FCR0, FCR31;
-
 /* mem */
 extern void *mem_rtab;
 extern void *mem_wtab;
@@ -86,6 +85,7 @@ extern void *zeromem_ptr;
 extern void *scratch_buf_ptr;
 
 // same as invalid_code, just a region for ram write checks (inclusive)
+// (psx/guest address range)
 extern u32 inv_code_start, inv_code_end;
 
 /* cycles/irqs */
@@ -100,7 +100,7 @@ void pcsx_mtc0_ds(u32 reg, u32 val);
 extern void SysPrintf(const char *fmt, ...);
 
 #ifdef RAM_FIXED
-#define rdram ((u_int)0x80000000)
+#define rdram ((u_char *)0x80000000)
 #else
-#define rdram ((u_int)psxM)
+#define rdram ((u_char *)psxM)
 #endif