X-Git-Url: https://notaz.gp2x.de/cgi-bin/gitweb.cgi?p=pcsx_rearmed.git;a=blobdiff_plain;f=libpcsxcore%2Fnew_dynarec%2Femu_if.h;h=88749becee2ab59c1866f40cc054da1fb62479f2;hp=e93fabd02b96246e2e1202bc52092eb3a5f2109d;hb=0c2ca3ba2ca8a191fc3f6d9782dc2420537b1964;hpb=67ba0fb4fa3f120c4156ca7d6155c51b7623e84f

diff --git a/libpcsxcore/new_dynarec/emu_if.h b/libpcsxcore/new_dynarec/emu_if.h
index e93fabd0..88749bec 100644
--- a/libpcsxcore/new_dynarec/emu_if.h
+++ b/libpcsxcore/new_dynarec/emu_if.h
@@ -1,6 +1,10 @@
 #include "new_dynarec.h"
 #include "../r3000a.h"
 
+#ifndef __ARM_ARCH_7A__
+#define ARMv5_ONLY
+#endif
+
 extern char invalid_code[0x100000];
 
 /* weird stuff */
@@ -26,6 +30,8 @@ extern int reg_cop0[];
 /* COP2/GTE */
 extern int reg_cop2d[], reg_cop2c[];
 extern void *gte_handlers[64];
+extern void *gte_handlers_nf[64];
+extern const char *gte_regnames[64];
 extern const char gte_cycletab[64];
 
 /* dummy */
@@ -45,13 +51,18 @@ extern unsigned int word;	/* write */
 extern unsigned short hword;
 extern unsigned char byte;
 
+extern void *psxH_ptr;
+
+// same as invalid_code, just a region for ram write checks (inclusive)
+extern u32 inv_code_start, inv_code_end;
+
 /* cycles/irqs */
 extern unsigned int next_interupt;
 extern int pending_exception;
 
 /* called by drc */
-void MTC0_();
-#define MTC0 MTC0_ /* don't call interpreter with wrong args */
+void pcsx_mtc0(u32 reg);
+void pcsx_mtc0_ds(u32 reg);
 
 /* misc */
 extern void (*psxHLEt[])();