X-Git-Url: https://notaz.gp2x.de/cgi-bin/gitweb.cgi?p=pcsx_rearmed.git;a=blobdiff_plain;f=libpcsxcore%2Fnew_dynarec%2Femu_if.h;h=8acd1f5ac83eeec888c1486d4d02839d1e3e030b;hp=700182a1e4efc15afd4bdcab45fd4a449c5b0aca;hb=a80ae4a0353fce94df700ec84222d3c56c3d813a;hpb=b9b61529b6c9bf30a3146178e2dda31b15ff3614

diff --git a/libpcsxcore/new_dynarec/emu_if.h b/libpcsxcore/new_dynarec/emu_if.h
index 700182a1..8acd1f5a 100644
--- a/libpcsxcore/new_dynarec/emu_if.h
+++ b/libpcsxcore/new_dynarec/emu_if.h
@@ -1,6 +1,10 @@
 #include "new_dynarec.h"
 #include "../r3000a.h"
 
+#ifndef __ARM_ARCH_7A__
+#define ARMv5_ONLY
+#endif
+
 extern char invalid_code[0x100000];
 
 /* weird stuff */
@@ -45,13 +49,18 @@ extern unsigned int word;	/* write */
 extern unsigned short hword;
 extern unsigned char byte;
 
+extern void *psxH_ptr;
+
+// same as invalid_code, just a region for ram write checks (inclusive)
+extern u32 inv_code_start, inv_code_end;
+
 /* cycles/irqs */
 extern unsigned int next_interupt;
 extern int pending_exception;
 
 /* called by drc */
-void MTC0_();
-#define MTC0 MTC0_ /* don't call interpreter with wrong args */
+void pcsx_mtc0(u32 reg);
+void pcsx_mtc0_ds(u32 reg);
 
 /* misc */
-extern void *psxHLEt_addr;
+extern void (*psxHLEt[])();