X-Git-Url: https://notaz.gp2x.de/cgi-bin/gitweb.cgi?p=pcsx_rearmed.git;a=blobdiff_plain;f=libpcsxcore%2Fnew_dynarec%2Femu_if.h;h=e16cca54055fabeacaafa40ac3ef08e36bbb32ea;hp=9e7f710525c192da6e22189eb9d2ff1edcb7ca12;hb=59774ed0120d20c731ee20da88ba6356d184dc8a;hpb=fca1aef29ed173264919b7a0b35f92dbe0d4e521

diff --git a/libpcsxcore/new_dynarec/emu_if.h b/libpcsxcore/new_dynarec/emu_if.h
index 9e7f7105..e16cca54 100644
--- a/libpcsxcore/new_dynarec/emu_if.h
+++ b/libpcsxcore/new_dynarec/emu_if.h
@@ -1,6 +1,10 @@
 #include "new_dynarec.h"
 #include "../r3000a.h"
 
+#ifndef __ARM_ARCH_7A__
+#define ARMv5_ONLY
+#endif
+
 extern char invalid_code[0x100000];
 
 /* weird stuff */
@@ -26,6 +30,7 @@ extern int reg_cop0[];
 /* COP2/GTE */
 extern int reg_cop2d[], reg_cop2c[];
 extern void *gte_handlers[64];
+extern void *gte_handlers_nf[64];
 extern const char gte_cycletab[64];
 
 /* dummy */
@@ -45,6 +50,11 @@ extern unsigned int word;	/* write */
 extern unsigned short hword;
 extern unsigned char byte;
 
+extern void *psxH_ptr;
+
+// same as invalid_code, just a region for ram write checks (inclusive)
+extern u32 inv_code_start, inv_code_end;
+
 /* cycles/irqs */
 extern unsigned int next_interupt;
 extern int pending_exception;