X-Git-Url: https://notaz.gp2x.de/cgi-bin/gitweb.cgi?p=pcsx_rearmed.git;a=blobdiff_plain;f=libpcsxcore%2Fnew_dynarec%2Femu_if.h;h=f71efc4b2e7abff05d6cc43a9cf90245da866ca6;hp=50dc2a8db7ac3649a3abccd6e3350d1db72ccb79;hb=c6c3b1b36e53f576f540cbf99fb9f8d66ae1e92a;hpb=3d624f890e4350179851e958fe071b2fd7a56bec diff --git a/libpcsxcore/new_dynarec/emu_if.h b/libpcsxcore/new_dynarec/emu_if.h index 50dc2a8d..f71efc4b 100644 --- a/libpcsxcore/new_dynarec/emu_if.h +++ b/libpcsxcore/new_dynarec/emu_if.h @@ -1,3 +1,4 @@ +#include "new_dynarec.h" #include "../r3000a.h" extern char invalid_code[0x100000]; @@ -13,35 +14,58 @@ extern int reg[]; extern int hi, lo; /* same as psxRegs.CP0.n.* */ +extern int reg_cop0[]; #define Status psxRegs.CP0.n.Status #define Cause psxRegs.CP0.n.Cause #define EPC psxRegs.CP0.n.EPC #define BadVAddr psxRegs.CP0.n.BadVAddr #define Context psxRegs.CP0.n.Context #define EntryHi psxRegs.CP0.n.EntryHi -#define Count psxRegs.CP0.n.Count +#define Count psxRegs.cycle // psxRegs.CP0.n.Count + +/* COP2/GTE */ +extern int reg_cop2d[], reg_cop2c[]; +extern void *gte_handlers[64]; +extern void *gte_handlers_nf[64]; +extern const char *gte_regnames[64]; +extern const char gte_cycletab[64]; /* dummy */ extern int FCR0, FCR31; /* mem */ +extern void *mem_rtab; +extern void *mem_wtab; + +void jump_handler_read8(u32 addr, u32 *table, u32 cycles); +void jump_handler_read16(u32 addr, u32 *table, u32 cycles); +void jump_handler_read32(u32 addr, u32 *table, u32 cycles); + extern void (*readmem[0x10000])(); extern void (*readmemb[0x10000])(); extern void (*readmemh[0x10000])(); -extern void (*readmemd[0x10000])(); extern void (*writemem[0x10000])(); extern void (*writememb[0x10000])(); extern void (*writememh[0x10000])(); -extern void (*writememd[0x10000])(); -extern unsigned int address, word; -extern unsigned char byte; +extern unsigned int address; +extern unsigned int readmem_word; /* same as readmem_dword */ +extern unsigned int word; /* write */ extern unsigned short hword; +extern unsigned char byte; + +extern void *psxH_ptr; + +// same as invalid_code, just a region for ram write checks (inclusive) +extern u32 inv_code_start, inv_code_end; -/* cycles */ +/* cycles/irqs */ extern unsigned int next_interupt; +extern int pending_exception; /* called by drc */ -void MFC0(); -void MTC0(); +void pcsx_mtc0(u32 reg); +void pcsx_mtc0_ds(u32 reg); +/* misc */ +extern void (*psxHLEt[])();