X-Git-Url: https://notaz.gp2x.de/cgi-bin/gitweb.cgi?p=pcsx_rearmed.git;a=blobdiff_plain;f=libpcsxcore%2Fnew_dynarec%2Flinkage_arm.S;h=778a67f0a679660c0c8af127f7f7a7af3cdd5ee6;hp=95af8b4e5ee77da21c8a8b48a45e46de97b9f851;hb=7c3a5182da4384e21a6ace037583fae399de5a02;hpb=8f2bb0cbd20c00475196d1efb72103b65e57bc66 diff --git a/libpcsxcore/new_dynarec/linkage_arm.S b/libpcsxcore/new_dynarec/linkage_arm.S index 95af8b4e..778a67f0 100644 --- a/libpcsxcore/new_dynarec/linkage_arm.S +++ b/libpcsxcore/new_dynarec/linkage_arm.S @@ -20,6 +20,7 @@ * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * */ #include "arm_features.h" +#include "new_dynarec_config.h" #include "linkage_offsets.h" @@ -58,12 +59,13 @@ DRC_VAR(cycle_count, 4) DRC_VAR(last_count, 4) DRC_VAR(pending_exception, 4) DRC_VAR(stop, 4) -DRC_VAR(invc_ptr, 4) +DRC_VAR(branch_target, 4) DRC_VAR(address, 4) +@DRC_VAR(align0, 4) /* unused/alignment */ DRC_VAR(psxRegs, LO_psxRegs_end - LO_psxRegs) /* psxRegs */ -DRC_VAR(reg, 128) +@DRC_VAR(reg, 128) DRC_VAR(lo, 4) DRC_VAR(hi, 4) DRC_VAR(reg_cop0, 128) @@ -76,23 +78,20 @@ DRC_VAR(pcaddr, 4) @DRC_VAR(intCycle, 256) DRC_VAR(rcnts, 7*4*4) +DRC_VAR(inv_code_start, 4) +DRC_VAR(inv_code_end, 4) DRC_VAR(mem_rtab, 4) DRC_VAR(mem_wtab, 4) DRC_VAR(psxH_ptr, 4) DRC_VAR(zeromem_ptr, 4) -DRC_VAR(inv_code_start, 4) -DRC_VAR(inv_code_end, 4) -DRC_VAR(branch_target, 4) +DRC_VAR(invc_ptr, 4) DRC_VAR(scratch_buf_ptr, 4) -@DRC_VAR(align0, 12) /* unused/alignment */ +@DRC_VAR(align1, 8) /* unused/alignment */ DRC_VAR(mini_ht, 256) DRC_VAR(restore_candidate, 512) -/* unused */ -DRC_VAR(FCR0, 4) -DRC_VAR(FCR31, 4) -#ifdef __MACH__ +#ifdef TEXRELS_FORBIDDEN .data .align 2 ptr_jump_in: @@ -116,21 +115,21 @@ ptr_hash_table: #endif .macro load_varadr reg var -#if defined(HAVE_ARMV7) && !defined(__PIC__) - movw \reg, #:lower16:\var - movt \reg, #:upper16:\var -#elif defined(HAVE_ARMV7) && defined(__MACH__) +#if defined(HAVE_ARMV7) && defined(TEXRELS_FORBIDDEN) movw \reg, #:lower16:(\var-(1678f+8)) movt \reg, #:upper16:(\var-(1678f+8)) 1678: add \reg, pc +#elif defined(HAVE_ARMV7) && !defined(__PIC__) + movw \reg, #:lower16:\var + movt \reg, #:upper16:\var #else ldr \reg, =\var #endif .endm .macro load_varadr_ext reg var -#if defined(HAVE_ARMV7) && defined(__MACH__) && defined(__PIC__) +#if defined(HAVE_ARMV7) && defined(TEXRELS_FORBIDDEN) movw \reg, #:lower16:(ptr_\var-(1678f+8)) movt \reg, #:upper16:(ptr_\var-(1678f+8)) 1678: @@ -160,9 +159,10 @@ ptr_hash_table: #endif .endm +/* r0 = virtual target address */ +/* r1 = instruction to patch */ .macro dyna_linker_main - /* r0 = virtual target address */ - /* r1 = instruction to patch */ +#ifndef NO_WRITE_EXEC load_varadr_ext r3, jump_in /* get_page */ lsr r2, r0, #12 @@ -219,8 +219,8 @@ ptr_hash_table: ldr r5, [r3, r2, lsl #2] ldr r7, [r6, r4]! teq r7, r0 - ldreq pc, [r6, #4] - ldr r7, [r6, #8] + ldreq pc, [r6, #8] + ldr r7, [r6, #4] teq r7, r0 ldreq pc, [r6, #12] /* jump_dirty lookup */ @@ -235,13 +235,18 @@ ptr_hash_table: ldr r1, [r4, #8] /* hash_table insert */ ldr r2, [r6] - ldr r3, [r6, #4] + ldr r3, [r6, #8] str r0, [r6] - str r1, [r6, #4] - str r2, [r6, #8] + str r1, [r6, #8] + str r2, [r6, #4] str r3, [r6, #12] mov pc, r1 8: +#else + /* XXX: should be able to do better than this... */ + bl get_addr_ht + mov pc, r0 +#endif .endm @@ -375,8 +380,8 @@ FUNCTION(jump_vaddr): and r2, r3, r2, lsr #12 ldr r2, [r1, r2]! teq r2, r0 - ldreq pc, [r1, #4] - ldr r2, [r1, #8] + ldreq pc, [r1, #8] + ldr r2, [r1, #4] teq r2, r0 ldreq pc, [r1, #12] str r10, [fp, #LO_cycle_count] @@ -389,7 +394,6 @@ FUNCTION(jump_vaddr): FUNCTION(verify_code_ds): str r8, [fp, #LO_branch_target] -FUNCTION(verify_code_vm): FUNCTION(verify_code): /* r1 = source */ /* r2 = target */ @@ -424,7 +428,7 @@ FUNCTION(verify_code): bl get_addr mov pc, r0 .size verify_code, .-verify_code - .size verify_code_vm, .-verify_code_vm + .size verify_code_ds, .-verify_code_ds .align 2 FUNCTION(cc_interrupt): @@ -651,7 +655,7 @@ invalidate_addr_call: FUNCTION(new_dyna_start): /* ip is stored to conform EABI alignment */ stmfd sp!, {r4, r5, r6, r7, r8, r9, sl, fp, ip, lr} - load_varadr fp, dynarec_local + mov fp, r0 /* dynarec_local */ ldr r0, [fp, #LO_pcaddr] bl get_addr_ht ldr r1, [fp, #LO_next_interupt] @@ -719,10 +723,10 @@ FUNCTION(jump_handler_read32): blx r3 ldr r0, [fp, #LO_next_interupt] - pop {r2, r3} + pop {r2, lr} str r0, [fp, #LO_last_count] sub r0, r2, r0 - bx r3 + bx lr .endm FUNCTION(jump_handler_write8): @@ -747,10 +751,10 @@ FUNCTION(jump_handler_write_h): blx r3 ldr r0, [fp, #LO_next_interupt] - pop {r2, r3} + pop {r2, lr} str r0, [fp, #LO_last_count] sub r0, r2, r0 - bx r3 + bx lr FUNCTION(jump_handle_swl): /* r0 = address, r1 = data, r2 = cycles */