X-Git-Url: https://notaz.gp2x.de/cgi-bin/gitweb.cgi?p=pcsx_rearmed.git;a=blobdiff_plain;f=libpcsxcore%2Fnew_dynarec%2Flinkage_arm.s;h=57fb3d22c4892b8704cc80fbf7d2712554bc472a;hp=7b76aec32dde227a8f08c92664587cadf6677f9a;hb=0bbd14543fec5fd4f5664b676771812663235252;hpb=0d16cda294b8f4655dda849a526b336a5b46aa16

diff --git a/libpcsxcore/new_dynarec/linkage_arm.s b/libpcsxcore/new_dynarec/linkage_arm.s
index 7b76aec3..57fb3d22 100644
--- a/libpcsxcore/new_dynarec/linkage_arm.s
+++ b/libpcsxcore/new_dynarec/linkage_arm.s
@@ -1,6 +1,6 @@
 /* * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * *
  *   linkage_arm.s for PCSX                                                *
- *   Copyright (C) 2009-2010 Ari64                                         *
+ *   Copyright (C) 2009-2011 Ari64                                         *
  *   Copyright (C) 2010-2011 Gražvydas "notaz" Ignotas                     *
  *                                                                         *
  *   This program is free software; you can redistribute it and/or modify  *
@@ -747,6 +747,109 @@ indirect_jump:
 	.size	indirect_jump, .-indirect_jump
 	.size	indirect_jump_indexed, .-indirect_jump_indexed
 
+	.align	2
+	.global	invalidate_addr_r0
+	.type	invalidate_addr_r0, %function
+invalidate_addr_r0:
+	stmia	fp, {r0, r1, r2, r3, r12, lr}
+	lsr	r0, r0, #12	
+	b	invalidate_addr_call
+	.size	invalidate_addr_r0, .-invalidate_addr_r0
+	.align	2
+	.global	invalidate_addr_r1
+	.type	invalidate_addr_r1, %function
+invalidate_addr_r1:
+	stmia	fp, {r0, r1, r2, r3, r12, lr}
+	lsr	r0, r1, #12	
+	b	invalidate_addr_call
+	.size	invalidate_addr_r1, .-invalidate_addr_r1
+	.align	2
+	.global	invalidate_addr_r2
+	.type	invalidate_addr_r2, %function
+invalidate_addr_r2:
+	stmia	fp, {r0, r1, r2, r3, r12, lr}
+	lsr	r0, r2, #12	
+	b	invalidate_addr_call
+	.size	invalidate_addr_r2, .-invalidate_addr_r2
+	.align	2
+	.global	invalidate_addr_r3
+	.type	invalidate_addr_r3, %function
+invalidate_addr_r3:
+	stmia	fp, {r0, r1, r2, r3, r12, lr}
+	lsr	r0, r3, #12	
+	b	invalidate_addr_call
+	.size	invalidate_addr_r3, .-invalidate_addr_r3
+	.align	2
+	.global	invalidate_addr_r4
+	.type	invalidate_addr_r4, %function
+invalidate_addr_r4:
+	stmia	fp, {r0, r1, r2, r3, r12, lr}
+	lsr	r0, r4, #12	
+	b	invalidate_addr_call
+	.size	invalidate_addr_r4, .-invalidate_addr_r4
+	.align	2
+	.global	invalidate_addr_r5
+	.type	invalidate_addr_r5, %function
+invalidate_addr_r5:
+	stmia	fp, {r0, r1, r2, r3, r12, lr}
+	lsr	r0, r5, #12	
+	b	invalidate_addr_call
+	.size	invalidate_addr_r5, .-invalidate_addr_r5
+	.align	2
+	.global	invalidate_addr_r6
+	.type	invalidate_addr_r6, %function
+invalidate_addr_r6:
+	stmia	fp, {r0, r1, r2, r3, r12, lr}
+	lsr	r0, r6, #12	
+	b	invalidate_addr_call
+	.size	invalidate_addr_r6, .-invalidate_addr_r6
+	.align	2
+	.global	invalidate_addr_r7
+	.type	invalidate_addr_r7, %function
+invalidate_addr_r7:
+	stmia	fp, {r0, r1, r2, r3, r12, lr}
+	lsr	r0, r7, #12	
+	b	invalidate_addr_call
+	.size	invalidate_addr_r7, .-invalidate_addr_r7
+	.align	2
+	.global	invalidate_addr_r8
+	.type	invalidate_addr_r8, %function
+invalidate_addr_r8:
+	stmia	fp, {r0, r1, r2, r3, r12, lr}
+	lsr	r0, r8, #12	
+	b	invalidate_addr_call
+	.size	invalidate_addr_r8, .-invalidate_addr_r8
+	.align	2
+	.global	invalidate_addr_r9
+	.type	invalidate_addr_r9, %function
+invalidate_addr_r9:
+	stmia	fp, {r0, r1, r2, r3, r12, lr}
+	lsr	r0, r9, #12	
+	b	invalidate_addr_call
+	.size	invalidate_addr_r9, .-invalidate_addr_r9
+	.align	2
+	.global	invalidate_addr_r10
+	.type	invalidate_addr_r10, %function
+invalidate_addr_r10:
+	stmia	fp, {r0, r1, r2, r3, r12, lr}
+	lsr	r0, r10, #12	
+	b	invalidate_addr_call
+	.size	invalidate_addr_r10, .-invalidate_addr_r10
+	.align	2
+	.global	invalidate_addr_r12
+	.type	invalidate_addr_r12, %function
+invalidate_addr_r12:
+	stmia	fp, {r0, r1, r2, r3, r12, lr}
+	lsr	r0, r12, #12	
+	.size	invalidate_addr_r12, .-invalidate_addr_r12
+	.align	2
+	.global	invalidate_addr_call
+	.type	invalidate_addr_call, %function
+invalidate_addr_call:
+	bl	invalidate_block
+	ldmia	fp, {r0, r1, r2, r3, r12, pc}
+	.size	invalidate_addr_call, .-invalidate_addr_call
+
 	.align	2
 	.global	new_dyna_start
 	.type	new_dyna_start, %function
@@ -1000,13 +1103,23 @@ ari_read_io32:
 	str\pf	r1, [r2, r3]
 	mov	pc, lr
 1:
-.if \tab_shift == 1 @ write16
 	cmp	r2, #0x1c00
 	blo	0b
 	cmp	r2, #0x1e00
+.if \tab_shift != 0
 	ldrlo	pc, [fp, #spu_writef-dynarec_local]
-	nop
+.else
+	@ write32 to SPU - very rare case (is this correct?)
+	bhs	0b
+	add	r2, r0, #2
+	mov	r3, r1, lsr #16
+	push	{r2,r3,lr}
+	mov	lr, pc
+	ldr	pc, [fp, #spu_writef-dynarec_local]
+	pop	{r0,r1,lr}
+	ldr	pc, [fp, #spu_writef-dynarec_local]
 .endif
+	nop
 	b	0b
 .endm