X-Git-Url: https://notaz.gp2x.de/cgi-bin/gitweb.cgi?p=pcsx_rearmed.git;a=blobdiff_plain;f=libpcsxcore%2Fnew_dynarec%2Fnew_dynarec.c;h=2a72711409907e0fe359b9179dccc8c2774d9fa3;hp=55e5ec9fe2453aeb165fabf991fce3b64aac0673;hb=367b1b93e323bd0a8e1b5ad59cc07a4e7f296fd6;hpb=67ba0fb4fa3f120c4156ca7d6155c51b7623e84f diff --git a/libpcsxcore/new_dynarec/new_dynarec.c b/libpcsxcore/new_dynarec/new_dynarec.c index 55e5ec9f..2a727114 100644 --- a/libpcsxcore/new_dynarec/new_dynarec.c +++ b/libpcsxcore/new_dynarec/new_dynarec.c @@ -1908,9 +1908,9 @@ static void pagespan_alloc(struct regstat *current,int i) if(opcode[i]==0&&(opcode2[i]&0x3E)==8) // JR/JALR { alloc_reg(current,i,rs1[i]); - if (rt1[i]==31) { - alloc_reg(current,i,31); - dirty_reg(current,31); + if (rt1[i]!=0) { + alloc_reg(current,i,rt1[i]); + dirty_reg(current,rt1[i]); } } if((opcode[i]&0x2E)==4) // BEQ/BNE/BEQL/BNEL @@ -2717,7 +2717,7 @@ void load_assemble(int i,struct regstat *i_regs) int s,th,tl,addr,map=-1; int offset; int jaddr=0; - int memtarget,c=0; + int memtarget=0,c=0; u_int hr,reglist=0; th=get_reg(i_regs->regmap,rt1[i]|64); tl=get_reg(i_regs->regmap,rt1[i]); @@ -2732,11 +2732,21 @@ void load_assemble(int i,struct regstat *i_regs) memtarget=((signed int)(constmap[i][s]+offset))<(signed int)0x80800000; if(using_tlb&&((signed int)(constmap[i][s]+offset))>=(signed int)0xC0000000) memtarget=1; } - if(offset||s<0||c) addr=tl; - else addr=s; //printf("load_assemble: c=%d\n",c); //if(c) printf("load_assemble: const=%x\n",(int)constmap[i][s]+offset); // FIXME: Even if the load is a NOP, we should check for pagefaults... +#ifdef PCSX + if(tl<0) { + if(!c||(((u_int)constmap[i][s]+offset)>>16)==0x1f80) { + // could be FIFO, must perform the read + assem_debug("(forced read)\n"); + tl=get_reg(i_regs->regmap,-1); + assert(tl>=0); + } + } + if(offset||s<0||c) addr=tl; + else addr=s; +#endif if(tl>=0) { //assert(tl>=0); //assert(rt1[i]); @@ -5076,11 +5086,11 @@ void rjump_assemble(int i,struct regstat *i_regs) wb_invalidate(regs[i].regmap,branch_regs[i].regmap,regs[i].dirty,regs[i].is32, bc_unneeded,bc_unneeded_upper); load_regs(regs[i].regmap,branch_regs[i].regmap,regs[i].was32,rs1[i],CCREG); - if(rt1[i]==31) { + if(rt1[i]!=0) { int rt,return_address; - assert(rt1[i+1]!=31); - assert(rt2[i+1]!=31); - rt=get_reg(branch_regs[i].regmap,31); + assert(rt1[i+1]!=rt1[i]); + assert(rt2[i+1]!=rt1[i]); + rt=get_reg(branch_regs[i].regmap,rt1[i]); assem_debug("branch(%d): eax=%d ecx=%d edx=%d ebx=%d ebp=%d esi=%d edi=%d\n",i,branch_regs[i].regmap[0],branch_regs[i].regmap[1],branch_regs[i].regmap[2],branch_regs[i].regmap[3],branch_regs[i].regmap[5],branch_regs[i].regmap[6],branch_regs[i].regmap[7]); assert(rt>=0); return_address=start+i*4+8; @@ -6196,7 +6206,7 @@ static void pagespan_assemble(int i,struct regstat *i_regs) emit_mov(s1l,addr); if(opcode2[i]==9) // JALR { - int rt=get_reg(i_regs->regmap,31); + int rt=get_reg(i_regs->regmap,rt1[i]); emit_movimm(start+i*4+8,rt); } } @@ -6697,9 +6707,6 @@ void unneeded_registers(int istart,int iend,int r) // Save it unneeded_reg[i]=u; unneeded_reg_upper[i]=uu; -#ifdef FORCE32 - unneeded_reg_upper[i]=-1LL; -#endif /* printf("ur (%d,%d) %x: ",istart,iend,start+i*4); printf("U:"); @@ -6721,6 +6728,12 @@ void unneeded_registers(int istart,int iend,int r) } printf("\n");*/ } +#ifdef FORCE32 + for (i=iend;i>=istart;i--) + { + unneeded_reg_upper[i]=branch_unneeded_reg_upper[i]=-1LL; + } +#endif } // Identify registers which are likely to contain 32-bit values @@ -7518,7 +7531,11 @@ void disassemble_inst(int i) case FJUMP: printf (" %x: %s %8x\n",start+i*4,insn[i],ba[i]);break; case RJUMP: - printf (" %x: %s r%d\n",start+i*4,insn[i],rs1[i]);break; + if (rt1[i]!=31) + printf (" %x: %s r%d,r%d\n",start+i*4,insn[i],rt1[i],rs1[i]); + else + printf (" %x: %s r%d\n",start+i*4,insn[i],rs1[i]); + break; case SPAN: printf (" %x: %s (pagespan) r%d,r%d,%8x\n",start+i*4,insn[i],rs1[i],rs2[i],ba[i]);break; case IMM16: @@ -7704,12 +7721,16 @@ int new_recompile_block(int addr) #ifdef PCSX if (Config.HLE && start == 0x80001000) { // XXX: is this enough? Maybe check hleSoftCall? + u_int beginning=(u_int)out; u_int page=get_page(start); ll_add(jump_in+page,start,out); invalid_code[start>>12]=0; emit_movimm(start,0); emit_writeword(0,(int)&pcaddr); - emit_jmp((int)new_dyna_leave); // enough?? + emit_jmp((int)new_dyna_leave); +#ifdef __arm__ + __clear_cache((void *)beginning,out); +#endif return 0; } else if ((u_int)addr < 0x00200000) { @@ -8134,9 +8155,9 @@ int new_recompile_block(int addr) rs2[i]=0; rt1[i]=0; rt2[i]=0; - // The JALR instruction writes to r31. + // The JALR instruction writes to rd. if (op2&1) { - rt1[i]=31; + rt1[i]=(source[i]>>11)&0x1f; } rs2[i]=CCREG; break; @@ -8300,7 +8321,7 @@ int new_recompile_block(int addr) else ba[i]=-1; /* Is this the end of the block? */ if(i>0&&(itype[i-1]==UJUMP||itype[i-1]==RJUMP||(source[i-1]>>16)==0x1000)) { - if(rt1[i-1]!=31) { // Continue past subroutine call (JAL) + if(rt1[i-1]==0) { // Continue past subroutine call (JAL) done=1; // Does the block continue due to a branch? for(j=i-1;j>=0;j--) @@ -8643,9 +8664,9 @@ int new_recompile_block(int addr) dirty_reg(¤t,CCREG); if(rs1[i]!=rt1[i+1]&&rs1[i]!=rt2[i+1]) { alloc_reg(¤t,i,rs1[i]); - if (rt1[i]==31) { - alloc_reg(¤t,i,31); - dirty_reg(¤t,31); + if (rt1[i]!=0) { + alloc_reg(¤t,i,rt1[i]); + dirty_reg(¤t,rt1[i]); assert(rs1[i+1]!=31&&rs2[i+1]!=31); #ifdef REG_PREFETCH alloc_reg(¤t,i,PTEMP); @@ -9033,10 +9054,10 @@ int new_recompile_block(int addr) alloc_cc(&branch_regs[i-1],i-1); dirty_reg(&branch_regs[i-1],CCREG); alloc_reg(&branch_regs[i-1],i-1,rs1[i-1]); - if(rt1[i-1]==31) { // JALR - alloc_reg(&branch_regs[i-1],i-1,31); - dirty_reg(&branch_regs[i-1],31); - branch_regs[i-1].is32|=1LL<<31; + if(rt1[i-1]!=0) { // JALR + alloc_reg(&branch_regs[i-1],i-1,rt1[i-1]); + dirty_reg(&branch_regs[i-1],rt1[i-1]); + branch_regs[i-1].is32|=1LL<