X-Git-Url: https://notaz.gp2x.de/cgi-bin/gitweb.cgi?p=pcsx_rearmed.git;a=blobdiff_plain;f=libpcsxcore%2Fnew_dynarec%2Fnew_dynarec.c;h=69e829f98565a927fada448f01c9ede2f87f80a1;hp=63e21e17838e99ce9051f2af5a6cb1fab3e0348d;hb=a64911708df86674a7a64e42782bf467abe9f0aa;hpb=1e973cb0a85b35524ccc99766b8510534659ff65 diff --git a/libpcsxcore/new_dynarec/new_dynarec.c b/libpcsxcore/new_dynarec/new_dynarec.c index 63e21e17..69e829f9 100644 --- a/libpcsxcore/new_dynarec/new_dynarec.c +++ b/libpcsxcore/new_dynarec/new_dynarec.c @@ -5650,7 +5650,6 @@ void sjump_assemble(int i,struct regstat *i_regs) // First test branch condition, then execute delay slot, then branch ooo=0; } - assert(opcode2[i]<0x10||ooo); // FIXME (BxxZALL) if(ooo) { s1l=get_reg(branch_regs[i].regmap,rs1[i]); @@ -5837,18 +5836,32 @@ void sjump_assemble(int i,struct regstat *i_regs) // In-order execution (branch first) //printf("IOE\n"); int nottaken=0; + if(rt1[i]==31) { + int rt,return_address; + assert(rt1[i+1]!=31); + assert(rt2[i+1]!=31); + rt=get_reg(branch_regs[i].regmap,31); + if(rt>=0) { + // Save the PC even if the branch is not taken + return_address=start+i*4+8; + emit_movimm(return_address,rt); // PC into link register + #ifdef IMM_PREFETCH + emit_prefetch(hash_table[((return_address>>16)^return_address)&0xFFFF]); + #endif + } + } if(!unconditional) { //printf("branch(%d): eax=%d ecx=%d edx=%d ebx=%d ebp=%d esi=%d edi=%d\n",i,branch_regs[i].regmap[0],branch_regs[i].regmap[1],branch_regs[i].regmap[2],branch_regs[i].regmap[3],branch_regs[i].regmap[5],branch_regs[i].regmap[6],branch_regs[i].regmap[7]); if(!only32) { assert(s1h>=0); - if((opcode2[i]&0x1d)==0) // BLTZ/BLTZL + if((opcode2[i]&0x0d)==0) // BLTZ/BLTZL/BLTZAL/BLTZALL { emit_test(s1h,s1h); nottaken=(int)out; emit_jns(1); } - if((opcode2[i]&0x1d)==1) // BGEZ/BGEZL + if((opcode2[i]&0x0d)==1) // BGEZ/BGEZL/BGEZAL/BGEZALL { emit_test(s1h,s1h); nottaken=(int)out; @@ -5858,13 +5871,13 @@ void sjump_assemble(int i,struct regstat *i_regs) else { assert(s1l>=0); - if((opcode2[i]&0x1d)==0) // BLTZ/BLTZL + if((opcode2[i]&0x0d)==0) // BLTZ/BLTZL/BLTZAL/BLTZALL { emit_test(s1l,s1l); nottaken=(int)out; emit_jns(1); } - if((opcode2[i]&0x1d)==1) // BGEZ/BGEZL + if((opcode2[i]&0x0d)==1) // BGEZ/BGEZL/BGEZAL/BGEZALL { emit_test(s1l,s1l); nottaken=(int)out; @@ -8084,11 +8097,11 @@ int new_recompile_block(int addr) break; } break; +#ifndef FORCE32 case 0x14: strcpy(insn[i],"BEQL"); type=CJUMP; break; case 0x15: strcpy(insn[i],"BNEL"); type=CJUMP; break; case 0x16: strcpy(insn[i],"BLEZL"); type=CJUMP; break; case 0x17: strcpy(insn[i],"BGTZL"); type=CJUMP; break; -#ifndef FORCE32 case 0x18: strcpy(insn[i],"DADDI"); type=IMM16; break; case 0x19: strcpy(insn[i],"DADDIU"); type=IMM16; break; case 0x1A: strcpy(insn[i],"LDL"); type=LOADLR; break; @@ -8128,19 +8141,20 @@ int new_recompile_block(int addr) #endif #ifdef PCSX case 0x12: strcpy(insn[i],"COP2"); type=NI; + // note: COP MIPS-1 encoding differs from MIPS32 op2=(source[i]>>21)&0x1f; - switch(op2) + if (source[i]&0x3f) { + if (gte_handlers[source[i]&0x3f]!=NULL) { + snprintf(insn[i], sizeof(insn[i]), "COP2 %x", source[i]&0x3f); + type=C2OP; + } + } + else switch(op2) { case 0x00: strcpy(insn[i],"MFC2"); type=COP2; break; case 0x02: strcpy(insn[i],"CFC2"); type=COP2; break; case 0x04: strcpy(insn[i],"MTC2"); type=COP2; break; case 0x06: strcpy(insn[i],"CTC2"); type=COP2; break; - default: - if (gte_handlers[source[i]&0x3f]!=NULL) { - snprintf(insn[i], sizeof(insn[i]), "COP2 %x", source[i]&0x3f); - type=C2OP; - } - break; } break; case 0x32: strcpy(insn[i],"LWC2"); type=C2LS; break;