X-Git-Url: https://notaz.gp2x.de/cgi-bin/gitweb.cgi?p=pcsx_rearmed.git;a=blobdiff_plain;f=libpcsxcore%2Fnew_dynarec%2Fnew_dynarec.c;h=8d3688b1dc12d8fa5ad01c9cdb8113b648b1d087;hp=62250d91721e52e543b944b402815e80c65a65ea;hb=df894a3a5000bf0f1460767f64c3b78a79f3a457;hpb=b9b61529b6c9bf30a3146178e2dda31b15ff3614

diff --git a/libpcsxcore/new_dynarec/new_dynarec.c b/libpcsxcore/new_dynarec/new_dynarec.c
index 62250d91..8d3688b1 100644
--- a/libpcsxcore/new_dynarec/new_dynarec.c
+++ b/libpcsxcore/new_dynarec/new_dynarec.c
@@ -680,8 +680,8 @@ void lsn(u_char hsn[], int i, int *preferred_reg)
   if(itype[i]==LOADLR) {
     hsn[FTEMP]=0;
   }
-  // Also 64-bit SDL/SDR
-  if(opcode[i]==0x2c||opcode[i]==0x2d) {
+  // Also SWL/SWR/SDL/SDR
+  if(opcode[i]==0x2a||opcode[i]==0x2e||opcode[i]==0x2c||opcode[i]==0x2d) {
     hsn[FTEMP]=0;
   }
   // Don't remove the TLB registers either
@@ -1076,25 +1076,37 @@ void ll_clear(struct ll_entry **head)
 // Dereference the pointers and remove if it matches
 void ll_kill_pointers(struct ll_entry *head,int addr,int shift)
 {
+  u_int old_host_addr=0;
   while(head) {
     int ptr=get_pointer(head->addr);
     inv_debug("EXP: Lookup pointer to %x at %x (%x)\n",(int)ptr,(int)head->addr,head->vaddr);
     if(((ptr>>shift)==(addr>>shift)) ||
        (((ptr-MAX_OUTPUT_BLOCK_SIZE)>>shift)==(addr>>shift)))
     {
-      inv_debug("EXP: Kill pointer at %x (%x)\n",(int)head->addr,head->vaddr);
-      kill_pointer(head->addr);
+      printf("EXP: Kill pointer at %x (%x)\n",(int)head->addr,head->vaddr);
+      u_int host_addr=(u_int)kill_pointer(head->addr);
+
+      if((host_addr>>12)!=(old_host_addr>>12)) {
+        #ifdef __arm__
+        __clear_cache((void *)(old_host_addr&~0xfff),(void *)(old_host_addr|0xfff));
+        #endif
+        old_host_addr=host_addr;
+      }
     }
     head=head->next;
   }
+  #ifdef __arm__
+  if (old_host_addr)
+    __clear_cache((void *)(old_host_addr&~0xfff),(void *)(old_host_addr|0xfff));
+  #endif
 }
 
 // This is called when we write to a compiled block (see do_invstub)
-int invalidate_page(u_int page)
+void invalidate_page(u_int page)
 {
-  int modified=0;
   struct ll_entry *head;
   struct ll_entry *next;
+  u_int old_host_addr=0;
   head=jump_in[page];
   jump_in[page]=0;
   while(head!=NULL) {
@@ -1108,17 +1120,25 @@ int invalidate_page(u_int page)
   jump_out[page]=0;
   while(head!=NULL) {
     inv_debug("INVALIDATE: kill pointer to %x (%x)\n",head->vaddr,(int)head->addr);
-    kill_pointer(head->addr);
-    modified=1;
+    u_int host_addr=(u_int)kill_pointer(head->addr);
+
+    if((host_addr>>12)!=(old_host_addr>>12)) {
+      #ifdef __arm__
+      __clear_cache((void *)(old_host_addr&~0xfff),(void *)(old_host_addr|0xfff));
+      #endif
+      old_host_addr=host_addr;
+    }
     next=head->next;
     free(head);
     head=next;
   }
-  return modified;
+  #ifdef __arm__
+  if (old_host_addr)
+    __clear_cache((void *)(old_host_addr&~0xfff),(void *)(old_host_addr|0xfff));
+  #endif
 }
 void invalidate_block(u_int block)
 {
-  int modified;
   u_int page=get_page(block<<12);
   u_int vpage=get_vpage(block<<12);
   inv_debug("INVALIDATE: %x (%d)\n",block<<12,page);
@@ -1133,7 +1153,7 @@ void invalidate_block(u_int block)
     if(vpage>2047||(head->vaddr>>12)==block) { // Ignore vaddr hash collision
       get_bounds((int)head->addr,&start,&end);
       //printf("start: %x end: %x\n",start,end);
-      if(page<2048&&start>=0x80000000&&end<0x80800000) {
+      if(page<2048&&start>=0x80000000&&end<0x80000000+RAM_SIZE) {
         if(((start-(u_int)rdram)>>12)<=page&&((end-1-(u_int)rdram)>>12)>=page) {
           if((((start-(u_int)rdram)>>12)&2047)<first) first=((start-(u_int)rdram)>>12)&2047;
           if((((end-1-(u_int)rdram)>>12)&2047)>last) last=((end-1-(u_int)rdram)>>12)&2047;
@@ -1151,7 +1171,7 @@ void invalidate_block(u_int block)
     head=head->next;
   }
   //printf("first=%d last=%d\n",first,last);
-  modified=invalidate_page(page);
+  invalidate_page(page);
   assert(first+5>page); // NB: this assumes MAXBLOCK<=4096 (4 pages)
   assert(last<page+5);
   // Invalidate the adjacent pages if a block crosses a 4K boundary
@@ -1177,10 +1197,7 @@ void invalidate_block(u_int block)
   }
   else if(block>=0x80000&&block<0x80800) memory_map[block]=((u_int)rdram-0x80000000)>>2;
 #endif
-  #ifdef __arm__
-  if(modified)
-    __clear_cache((void *)BASE_ADDR,(void *)BASE_ADDR+(1<<TARGET_SIZE_2));
-  #endif
+
   #ifdef USE_MINI_HT
   memset(mini_ht,-1,sizeof(mini_ht));
   #endif
@@ -1249,7 +1266,7 @@ void clean_blocks(u_int page)
           u_int i;
           u_int inv=0;
           get_bounds((int)head->addr,&start,&end);
-          if(start-(u_int)rdram<0x800000) {
+          if(start-(u_int)rdram<RAM_SIZE) {
             for(i=(start-(u_int)rdram+0x80000000)>>12;i<=(end-1-(u_int)rdram+0x80000000)>>12;i++) {
               inv|=invalid_code[i];
             }
@@ -1259,7 +1276,7 @@ void clean_blocks(u_int page)
             //printf("addr=%x start=%x end=%x\n",addr,start,end);
             if(addr<start||addr>=end) inv=1;
           }
-          else if((signed int)head->vaddr>=(signed int)0x80800000) {
+          else if((signed int)head->vaddr>=(signed int)0x80000000+RAM_SIZE) {
             inv=1;
           }
           if(!inv) {
@@ -1621,7 +1638,7 @@ void store_alloc(struct regstat *current,int i)
   // On CPUs without 32-bit immediates we need a pointer to invalid_code
   else alloc_reg(current,i,INVCP);
   #endif
-  if(opcode[i]==0x2c||opcode[i]==0x2d) { // 64-bit SDL/SDR
+  if(opcode[i]==0x2a||opcode[i]==0x2e||opcode[i]==0x2c||opcode[i]==0x2d) { // SWL/SWL/SDL/SDR
     alloc_reg(current,i,FTEMP);
   }
   // We need a temporary register for address generation
@@ -1908,9 +1925,9 @@ static void pagespan_alloc(struct regstat *current,int i)
   if(opcode[i]==0&&(opcode2[i]&0x3E)==8) // JR/JALR
   {
     alloc_reg(current,i,rs1[i]);
-    if (rt1[i]==31) {
-      alloc_reg(current,i,31);
-      dirty_reg(current,31);
+    if (rt1[i]!=0) {
+      alloc_reg(current,i,rt1[i]);
+      dirty_reg(current,rt1[i]);
     }
   }
   if((opcode[i]&0x2E)==4) // BEQ/BNE/BEQL/BNEL
@@ -2717,7 +2734,7 @@ void load_assemble(int i,struct regstat *i_regs)
   int s,th,tl,addr,map=-1;
   int offset;
   int jaddr=0;
-  int memtarget,c=0;
+  int memtarget=0,c=0;
   u_int hr,reglist=0;
   th=get_reg(i_regs->regmap,rt1[i]|64);
   tl=get_reg(i_regs->regmap,rt1[i]);
@@ -2729,14 +2746,24 @@ void load_assemble(int i,struct regstat *i_regs)
   if(i_regs->regmap[HOST_CCREG]==CCREG) reglist&=~(1<<HOST_CCREG);
   if(s>=0) {
     c=(i_regs->wasconst>>s)&1;
-    memtarget=((signed int)(constmap[i][s]+offset))<(signed int)0x80800000;
+    memtarget=((signed int)(constmap[i][s]+offset))<(signed int)0x80000000+RAM_SIZE;
     if(using_tlb&&((signed int)(constmap[i][s]+offset))>=(signed int)0xC0000000) memtarget=1;
   }
-  if(offset||s<0||c) addr=tl;
-  else addr=s;
   //printf("load_assemble: c=%d\n",c);
   //if(c) printf("load_assemble: const=%x\n",(int)constmap[i][s]+offset);
   // FIXME: Even if the load is a NOP, we should check for pagefaults...
+#ifdef PCSX
+  if(tl<0) {
+    if(!c||(((u_int)constmap[i][s]+offset)>>16)==0x1f80) {
+      // could be FIFO, must perform the read
+      assem_debug("(forced read)\n");
+      tl=get_reg(i_regs->regmap,-1);
+      assert(tl>=0);
+    }
+  }
+  if(offset||s<0||c) addr=tl;
+  else addr=s;
+#endif
   if(tl>=0) {
     //assert(tl>=0);
     //assert(rt1[i]);
@@ -2747,10 +2774,10 @@ void load_assemble(int i,struct regstat *i_regs)
 //#define R29_HACK 1
         #ifdef R29_HACK
         // Strmnnrmn's speed hack
-        if(rs1[i]!=29||start<0x80001000||start>=0x80800000)
+        if(rs1[i]!=29||start<0x80001000||start>=0x80000000+RAM_SIZE)
         #endif
         {
-          emit_cmpimm(addr,0x800000);
+          emit_cmpimm(addr,RAM_SIZE);
           jaddr=(int)out;
           #ifdef CORTEX_A8_BRANCH_PREDICTION_HACK
           // Hint to branch predictor that the branch is unlikely to be taken
@@ -2993,7 +3020,7 @@ void store_assemble(int i,struct regstat *i_regs)
   offset=imm[i];
   if(s>=0) {
     c=(i_regs->wasconst>>s)&1;
-    memtarget=((signed int)(constmap[i][s]+offset))<(signed int)0x80800000;
+    memtarget=((signed int)(constmap[i][s]+offset))<(signed int)0x80000000+RAM_SIZE;
     if(using_tlb&&((signed int)(constmap[i][s]+offset))>=(signed int)0xC0000000) memtarget=1;
   }
   assert(tl>=0);
@@ -3009,14 +3036,14 @@ void store_assemble(int i,struct regstat *i_regs)
       #ifdef R29_HACK
       // Strmnnrmn's speed hack
       memtarget=1;
-      if(rs1[i]!=29||start<0x80001000||start>=0x80800000)
+      if(rs1[i]!=29||start<0x80001000||start>=0x80000000+RAM_SIZE)
       #endif
-      emit_cmpimm(addr,0x800000);
+      emit_cmpimm(addr,RAM_SIZE);
       #ifdef DESTRUCTIVE_SHIFT
       if(s==addr) emit_mov(s,temp);
       #endif
       #ifdef R29_HACK
-      if(rs1[i]!=29||start<0x80001000||start>=0x80800000)
+      if(rs1[i]!=29||start<0x80001000||start>=0x80000000+RAM_SIZE)
       #endif
       {
         jaddr=(int)out;
@@ -3166,15 +3193,17 @@ void storelr_assemble(int i,struct regstat *i_regs)
   int case1,case2,case3;
   int done0,done1,done2;
   int memtarget,c=0;
+  int agr=AGEN1+(i&1);
   u_int hr,reglist=0;
   th=get_reg(i_regs->regmap,rs2[i]|64);
   tl=get_reg(i_regs->regmap,rs2[i]);
   s=get_reg(i_regs->regmap,rs1[i]);
-  temp=get_reg(i_regs->regmap,-1);
+  temp=get_reg(i_regs->regmap,agr);
+  if(temp<0) temp=get_reg(i_regs->regmap,-1);
   offset=imm[i];
   if(s>=0) {
     c=(i_regs->isconst>>s)&1;
-    memtarget=((signed int)(constmap[i][s]+offset))<(signed int)0x80800000;
+    memtarget=((signed int)(constmap[i][s]+offset))<(signed int)0x80000000+RAM_SIZE;
     if(using_tlb&&((signed int)(constmap[i][s]+offset))>=(signed int)0xC0000000) memtarget=1;
   }
   assert(tl>=0);
@@ -3185,7 +3214,7 @@ void storelr_assemble(int i,struct regstat *i_regs)
     assert(temp>=0);
     if(!using_tlb) {
       if(!c) {
-        emit_cmpimm(s<0||offset?temp:s,0x800000);
+        emit_cmpimm(s<0||offset?temp:s,RAM_SIZE);
         if(!offset&&s!=temp) emit_mov(s,temp);
         jaddr=(int)out;
         emit_jno(0);
@@ -3352,7 +3381,7 @@ void storelr_assemble(int i,struct regstat *i_regs)
       set_jump_target(done0,(int)out);
     }
     if(!c||!memtarget)
-      add_stub(STORELR_STUB,jaddr,(int)out,0,(int)i_regs,rs2[i],ccadj[i],reglist);
+      add_stub(STORELR_STUB,jaddr,(int)out,i,(int)i_regs,temp,ccadj[i],reglist);
   }
   if(!using_tlb) {
     emit_addimm_no_flags((u_int)0x80000000-(u_int)rdram,temp);
@@ -3437,7 +3466,7 @@ void c1ls_assemble(int i,struct regstat *i_regs)
   // Generate address + offset
   if(!using_tlb) {
     if(!c)
-      emit_cmpimm(offset||c||s<0?ar:s,0x800000);
+      emit_cmpimm(offset||c||s<0?ar:s,RAM_SIZE);
   }
   else
   {
@@ -3468,7 +3497,7 @@ void c1ls_assemble(int i,struct regstat *i_regs)
       jaddr2=(int)out;
       emit_jno(0);
     }
-    else if(((signed int)(constmap[i][s]+offset))>=(signed int)0x80800000) {
+    else if(((signed int)(constmap[i][s]+offset))>=(signed int)0x80000000+RAM_SIZE) {
       jaddr2=(int)out;
       emit_jmp(0); // inline_readstub/inline_writestub?  Very rare case
     }
@@ -3603,11 +3632,11 @@ void c2ls_assemble(int i,struct regstat *i_regs)
   }
   if(s>=0) c=(i_regs->wasconst>>s)&1;
   if(!c) {
-    emit_cmpimm(offset||c||s<0?ar:s,0x800000);
+    emit_cmpimm(offset||c||s<0?ar:s,RAM_SIZE);
     jaddr2=(int)out;
     emit_jno(0);
   }
-  else if(((signed int)(constmap[i][s]+offset))>=(signed int)0x80800000) {
+  else if(((signed int)(constmap[i][s]+offset))>=(signed int)0x80000000+RAM_SIZE) {
     jaddr2=(int)out;
     emit_jmp(0); // inline_readstub/inline_writestub?  Very rare case
   }
@@ -3708,9 +3737,9 @@ void hlecall_assemble(int i,struct regstat *i_regs)
   assert(ccreg==HOST_CCREG);
   assert(!is_delayslot);
   emit_movimm(start+i*4+4,0); // Get PC
-  emit_movimm(source[i],1); // opcode
+  emit_movimm((int)psxHLEt[source[i]&7],1);
   emit_addimm(HOST_CCREG,CLOCK_DIVIDER*ccadj[i],HOST_CCREG); // XXX
-  emit_jmp((int)jump_hlecall); // XXX
+  emit_jmp((int)jump_hlecall);
 }
 
 void ds_assemble(int i,struct regstat *i_regs)
@@ -3975,7 +4004,7 @@ void address_generation(int i,struct regstat *i_regs,signed char entry[])
               // Stores to memory go thru the mapper to detect self-modifying
               // code, loads don't.
               if((unsigned int)(constmap[i][rs]+offset)>=0xC0000000 ||
-                 (unsigned int)(constmap[i][rs]+offset)<0x80800000 )
+                 (unsigned int)(constmap[i][rs]+offset)<0x80000000+RAM_SIZE )
                 generate_map_const(constmap[i][rs]+offset,rm);
             }else{
               if((signed int)(constmap[i][rs]+offset)>=(signed int)0xC0000000)
@@ -4025,7 +4054,7 @@ void address_generation(int i,struct regstat *i_regs,signed char entry[])
           // Stores to memory go thru the mapper to detect self-modifying
           // code, loads don't.
           if((unsigned int)(constmap[i+1][rs]+offset)>=0xC0000000 ||
-             (unsigned int)(constmap[i+1][rs]+offset)<0x80800000 )
+             (unsigned int)(constmap[i+1][rs]+offset)<0x80000000+RAM_SIZE )
             generate_map_const(constmap[i+1][rs]+offset,ra);
         }else{
           if((signed int)(constmap[i+1][rs]+offset)>=(signed int)0xC0000000)
@@ -5076,11 +5105,11 @@ void rjump_assemble(int i,struct regstat *i_regs)
   wb_invalidate(regs[i].regmap,branch_regs[i].regmap,regs[i].dirty,regs[i].is32,
                 bc_unneeded,bc_unneeded_upper);
   load_regs(regs[i].regmap,branch_regs[i].regmap,regs[i].was32,rs1[i],CCREG);
-  if(rt1[i]==31) {
+  if(rt1[i]!=0) {
     int rt,return_address;
-    assert(rt1[i+1]!=31);
-    assert(rt2[i+1]!=31);
-    rt=get_reg(branch_regs[i].regmap,31);
+    assert(rt1[i+1]!=rt1[i]);
+    assert(rt2[i+1]!=rt1[i]);
+    rt=get_reg(branch_regs[i].regmap,rt1[i]);
     assem_debug("branch(%d): eax=%d ecx=%d edx=%d ebx=%d ebp=%d esi=%d edi=%d\n",i,branch_regs[i].regmap[0],branch_regs[i].regmap[1],branch_regs[i].regmap[2],branch_regs[i].regmap[3],branch_regs[i].regmap[5],branch_regs[i].regmap[6],branch_regs[i].regmap[7]);
     assert(rt>=0);
     return_address=start+i*4+8;
@@ -5592,7 +5621,7 @@ void sjump_assemble(int i,struct regstat *i_regs)
   #endif
 
   //if(opcode2[i]>=0x10) return; // FIXME (BxxZAL)
-  assert(opcode2[i]<0x10||rs1[i]==0); // FIXME (BxxZAL)
+  //assert(opcode2[i]<0x10||rs1[i]==0); // FIXME (BxxZAL)
 
   if(ooo)
     if(rs1[i]&&(rs1[i]==rt1[i+1]||rs1[i]==rt2[i+1]))
@@ -5601,8 +5630,7 @@ void sjump_assemble(int i,struct regstat *i_regs)
     // First test branch condition, then execute delay slot, then branch
     ooo=0;
   }
-  // TODO: Conditional branches w/link must execute in-order so that
-  // condition test and write to r31 occur before cycle count test
+  assert(opcode2[i]<0x10||ooo); // FIXME (BxxZALL)
 
   if(ooo) {
     s1l=get_reg(branch_regs[i].regmap,rs1[i]);
@@ -5697,7 +5725,7 @@ void sjump_assemble(int i,struct regstat *i_regs)
       if(!only32)
       {
         assert(s1h>=0);
-        if(opcode2[i]==0) // BLTZ
+        if((opcode2[i]&0xf)==0) // BLTZ/BLTZAL
         {
           emit_test(s1h,s1h);
           if(invert){
@@ -5708,7 +5736,7 @@ void sjump_assemble(int i,struct regstat *i_regs)
             emit_js(0);
           }
         }
-        if(opcode2[i]==1) // BGEZ
+        if((opcode2[i]&0xf)==1) // BGEZ/BLTZAL
         {
           emit_test(s1h,s1h);
           if(invert){
@@ -5723,7 +5751,7 @@ void sjump_assemble(int i,struct regstat *i_regs)
       else
       {
         assert(s1l>=0);
-        if(opcode2[i]==0) // BLTZ
+        if((opcode2[i]&0xf)==0) // BLTZ/BLTZAL
         {
           emit_test(s1l,s1l);
           if(invert){
@@ -5734,7 +5762,7 @@ void sjump_assemble(int i,struct regstat *i_regs)
             emit_js(0);
           }
         }
-        if(opcode2[i]==1) // BGEZ
+        if((opcode2[i]&0xf)==1) // BGEZ/BLTZAL
         {
           emit_test(s1l,s1l);
           if(invert){
@@ -6196,7 +6224,7 @@ static void pagespan_assemble(int i,struct regstat *i_regs)
     emit_mov(s1l,addr);
     if(opcode2[i]==9) // JALR
     {
-      int rt=get_reg(i_regs->regmap,31);
+      int rt=get_reg(i_regs->regmap,rt1[i]);
       emit_movimm(start+i*4+8,rt);
     }
   }
@@ -6508,7 +6536,7 @@ void unneeded_registers(int istart,int iend,int r)
         {
           uu=u=0x300C0F3; // Discard at, a0-a3, t6-t9
         }
-        if(start>0x80000400&&start<0x80800000) {
+        if(start>0x80000400&&start<0x80000000+RAM_SIZE) {
           if(itype[i]==UJUMP&&rt1[i]==31)
           {
             //uu=u=0x30300FF0FLL; // Discard at, v0-v1, t0-t9, lo, hi
@@ -6697,9 +6725,6 @@ void unneeded_registers(int istart,int iend,int r)
     // Save it
     unneeded_reg[i]=u;
     unneeded_reg_upper[i]=uu;
-#ifdef FORCE32
-    unneeded_reg_upper[i]=-1LL;
-#endif
     /*
     printf("ur (%d,%d) %x: ",istart,iend,start+i*4);
     printf("U:");
@@ -6721,6 +6746,12 @@ void unneeded_registers(int istart,int iend,int r)
     }
     printf("\n");*/
   }
+#ifdef FORCE32
+  for (i=iend;i>=istart;i--)
+  {
+    unneeded_reg_upper[i]=branch_unneeded_reg_upper[i]=-1LL;
+  }
+#endif
 }
 
 // Identify registers which are likely to contain 32-bit values
@@ -7518,7 +7549,11 @@ void disassemble_inst(int i)
       case FJUMP:
         printf (" %x: %s %8x\n",start+i*4,insn[i],ba[i]);break;
       case RJUMP:
-        printf (" %x: %s r%d\n",start+i*4,insn[i],rs1[i]);break;
+        if (rt1[i]!=31)
+          printf (" %x: %s r%d,r%d\n",start+i*4,insn[i],rt1[i],rs1[i]);
+        else
+          printf (" %x: %s r%d\n",start+i*4,insn[i],rs1[i]);
+        break;
       case SPAN:
         printf (" %x: %s (pagespan) r%d,r%d,%8x\n",start+i*4,insn[i],rs1[i],rs2[i],ba[i]);break;
       case IMM16:
@@ -7704,12 +7739,16 @@ int new_recompile_block(int addr)
 #ifdef PCSX
   if (Config.HLE && start == 0x80001000) {
     // XXX: is this enough? Maybe check hleSoftCall?
+    u_int beginning=(u_int)out;
     u_int page=get_page(start);
     ll_add(jump_in+page,start,out);
     invalid_code[start>>12]=0;
     emit_movimm(start,0);
     emit_writeword(0,(int)&pcaddr);
-    emit_jmp((int)new_dyna_leave); // enough??
+    emit_jmp((int)new_dyna_leave);
+#ifdef __arm__
+    __clear_cache((void *)beginning,out);
+#endif
     return 0;
   }
   else if ((u_int)addr < 0x00200000) {
@@ -7726,9 +7765,9 @@ int new_recompile_block(int addr)
   }
   else
 #endif
-  if ((int)addr >= 0x80000000 && (int)addr < 0x80800000) {
+  if ((int)addr >= 0x80000000 && (int)addr < 0x80000000+RAM_SIZE) {
     source = (u_int *)((u_int)rdram+start-0x80000000);
-    pagelimit = 0x80800000;
+    pagelimit = 0x80000000+RAM_SIZE;
   }
 #ifndef DISABLE_TLB
   else if ((signed int)addr >= (signed int)0xC0000000) {
@@ -8012,10 +8051,12 @@ int new_recompile_block(int addr)
       case 0x15: strcpy(insn[i],"BNEL"); type=CJUMP; break;
       case 0x16: strcpy(insn[i],"BLEZL"); type=CJUMP; break;
       case 0x17: strcpy(insn[i],"BGTZL"); type=CJUMP; break;
+#ifndef FORCE32
       case 0x18: strcpy(insn[i],"DADDI"); type=IMM16; break;
       case 0x19: strcpy(insn[i],"DADDIU"); type=IMM16; break;
       case 0x1A: strcpy(insn[i],"LDL"); type=LOADLR; break;
       case 0x1B: strcpy(insn[i],"LDR"); type=LOADLR; break;
+#endif
       case 0x20: strcpy(insn[i],"LB"); type=LOAD; break;
       case 0x21: strcpy(insn[i],"LH"); type=LOAD; break;
       case 0x22: strcpy(insn[i],"LWL"); type=LOADLR; break;
@@ -8028,20 +8069,26 @@ int new_recompile_block(int addr)
       case 0x29: strcpy(insn[i],"SH"); type=STORE; break;
       case 0x2A: strcpy(insn[i],"SWL"); type=STORELR; break;
       case 0x2B: strcpy(insn[i],"SW"); type=STORE; break;
+#ifndef FORCE32
       case 0x2C: strcpy(insn[i],"SDL"); type=STORELR; break;
       case 0x2D: strcpy(insn[i],"SDR"); type=STORELR; break;
+#endif
       case 0x2E: strcpy(insn[i],"SWR"); type=STORELR; break;
       case 0x2F: strcpy(insn[i],"CACHE"); type=NOP; break;
       case 0x30: strcpy(insn[i],"LL"); type=NI; break;
       case 0x31: strcpy(insn[i],"LWC1"); type=C1LS; break;
+#ifndef FORCE32
       case 0x34: strcpy(insn[i],"LLD"); type=NI; break;
       case 0x35: strcpy(insn[i],"LDC1"); type=C1LS; break;
       case 0x37: strcpy(insn[i],"LD"); type=LOAD; break;
+#endif
       case 0x38: strcpy(insn[i],"SC"); type=NI; break;
       case 0x39: strcpy(insn[i],"SWC1"); type=C1LS; break;
+#ifndef FORCE32
       case 0x3C: strcpy(insn[i],"SCD"); type=NI; break;
       case 0x3D: strcpy(insn[i],"SDC1"); type=C1LS; break;
       case 0x3F: strcpy(insn[i],"SD"); type=STORE; break;
+#endif
 #ifdef PCSX
       case 0x12: strcpy(insn[i],"COP2"); type=NI;
         op2=(source[i]>>21)&0x1f;
@@ -8064,7 +8111,7 @@ int new_recompile_block(int addr)
       case 0x3B: strcpy(insn[i],"HLECALL"); type=HLECALL; break;
 #endif
       default: strcpy(insn[i],"???"); type=NI;
-        printf("NI %08x @%08x\n", source[i], addr + i*4);
+        printf("NI %08x @%08x (%08x)\n", source[i], addr + i*4, addr);
         break;
     }
     itype[i]=type;
@@ -8134,9 +8181,9 @@ int new_recompile_block(int addr)
         rs2[i]=0;
         rt1[i]=0;
         rt2[i]=0;
-        // The JALR instruction writes to r31.
+        // The JALR instruction writes to rd.
         if (op2&1) {
-          rt1[i]=31;   
+          rt1[i]=(source[i]>>11)&0x1f;
         }
         rs2[i]=CCREG;
         break;
@@ -8300,7 +8347,7 @@ int new_recompile_block(int addr)
     else ba[i]=-1;
     /* Is this the end of the block? */
     if(i>0&&(itype[i-1]==UJUMP||itype[i-1]==RJUMP||(source[i-1]>>16)==0x1000)) {
-      if(rt1[i-1]!=31) { // Continue past subroutine call (JAL)
+      if(rt1[i-1]==0) { // Continue past subroutine call (JAL)
         done=1;
         // Does the block continue due to a branch?
         for(j=i-1;j>=0;j--)
@@ -8319,9 +8366,9 @@ int new_recompile_block(int addr)
       // Don't get too close to the limit
       if(i>MAXBLOCK/2) done=1;
     }
-    if(i>0&&itype[i-1]==SYSCALL&&stop_after_jal) done=1;
-    if(itype[i-1]==HLECALL) done=1;
-    assert(i<MAXBLOCK-1);
+    if(itype[i]==SYSCALL&&stop_after_jal) done=1;
+    if(itype[i]==HLECALL) done=1;
+    //assert(i<MAXBLOCK-1);
     if(start+i*4==pagelimit-4) done=1;
     assert(start+i*4<pagelimit);
     if (i==MAXBLOCK-1) done=1;
@@ -8643,9 +8690,9 @@ int new_recompile_block(int addr)
           dirty_reg(&current,CCREG);
           if(rs1[i]!=rt1[i+1]&&rs1[i]!=rt2[i+1]) {
             alloc_reg(&current,i,rs1[i]);
-            if (rt1[i]==31) {
-              alloc_reg(&current,i,31);
-              dirty_reg(&current,31);
+            if (rt1[i]!=0) {
+              alloc_reg(&current,i,rt1[i]);
+              dirty_reg(&current,rt1[i]);
               assert(rs1[i+1]!=31&&rs2[i+1]!=31);
               #ifdef REG_PREFETCH
               alloc_reg(&current,i,PTEMP);
@@ -9033,10 +9080,10 @@ int new_recompile_block(int addr)
           alloc_cc(&branch_regs[i-1],i-1);
           dirty_reg(&branch_regs[i-1],CCREG);
           alloc_reg(&branch_regs[i-1],i-1,rs1[i-1]);
-          if(rt1[i-1]==31) { // JALR
-            alloc_reg(&branch_regs[i-1],i-1,31);
-            dirty_reg(&branch_regs[i-1],31);
-            branch_regs[i-1].is32|=1LL<<31;
+          if(rt1[i-1]!=0) { // JALR
+            alloc_reg(&branch_regs[i-1],i-1,rt1[i-1]);
+            dirty_reg(&branch_regs[i-1],rt1[i-1]);
+            branch_regs[i-1].is32|=1LL<<rt1[i-1];
           }
           #ifdef USE_MINI_HT
           if(rs1[i-1]==31) { // JALR
@@ -10791,10 +10838,6 @@ int new_recompile_block(int addr)
         break;
       case 3:
         // Clear jump_out
-        #ifdef __arm__
-        if((expirep&2047)==0)
-          __clear_cache((void *)BASE_ADDR,(void *)BASE_ADDR+(1<<TARGET_SIZE_2));
-        #endif
         ll_remove_matching_addrs(jump_out+(expirep&2047),base,shift);
         ll_remove_matching_addrs(jump_out+2048+(expirep&2047),base,shift);
         break;