X-Git-Url: https://notaz.gp2x.de/cgi-bin/gitweb.cgi?p=pcsx_rearmed.git;a=blobdiff_plain;f=libpcsxcore%2Fnew_dynarec%2Fnew_dynarec.c;h=99598be77e27e40d78acf279deb484068979eb4e;hp=641c673dcda5c1b98e31b8da869033e77ea9a19f;hb=6ebf4adfcb5e513944828191ca7795ed53eaa638;hpb=c22b95ab8ab42f87d0af5ce8333b5b6b386b98ee diff --git a/libpcsxcore/new_dynarec/new_dynarec.c b/libpcsxcore/new_dynarec/new_dynarec.c index 641c673d..99598be7 100644 --- a/libpcsxcore/new_dynarec/new_dynarec.c +++ b/libpcsxcore/new_dynarec/new_dynarec.c @@ -8490,9 +8490,10 @@ int new_recompile_block(int addr) int ds=0; int cc=0; int hr; - + +#ifndef FORCE32 provisional_32bit(); - +#endif if((u_int)addr&1) { // First instruction is delay slot cc=-1; @@ -8534,6 +8535,7 @@ int new_recompile_block(int addr) } } } +#ifndef FORCE32 // If something jumps here with 64-bit values // then promote those registers to 64 bits if(bt[i]) @@ -8568,8 +8570,7 @@ int new_recompile_block(int addr) current.is32=temp_is32; } } -#ifdef FORCE32 - memset(p32, 0xff, sizeof(p32)); +#else current.is32=-1LL; #endif @@ -8577,7 +8578,7 @@ int new_recompile_block(int addr) regs[i].wasconst=current.isconst; regs[i].was32=current.is32; regs[i].wasdirty=current.dirty; - #ifdef DESTRUCTIVE_WRITEBACK + #if defined(DESTRUCTIVE_WRITEBACK) && !defined(FORCE32) // To change a dirty register from 32 to 64 bits, we must write // it out during the previous cycle (for branches, 2 cycles) if(i